From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 05372E72 for ; Thu, 2 Jul 2015 18:51:56 +0200 (CEST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP; 02 Jul 2015 09:51:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,394,1432623600"; d="scan'208";a="517904410" Received: from irsmsx106.ger.corp.intel.com ([163.33.3.31]) by FMSMGA003.fm.intel.com with ESMTP; 02 Jul 2015 09:51:55 -0700 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.245]) by IRSMSX106.ger.corp.intel.com ([169.254.8.121]) with mapi id 14.03.0224.002; Thu, 2 Jul 2015 17:51:54 +0100 From: "Ananyev, Konstantin" To: WangDong , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH 1/2] eal:Introduce rte_dma_wmb/rte_dma_rmb. Thread-Index: AQHQsbZ2BjPm8gm0j0K/TAWDWf+Slp3IWjIAgAAQ1RA= Date: Thu, 2 Jul 2015 16:51:53 +0000 Message-ID: <2601191342CEEE43887BDE71AB97725836A21C12@irsmsx105.ger.corp.intel.com> References: Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.180] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 1/2] eal:Introduce rte_dma_wmb/rte_dma_rmb. X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 Jul 2015 16:51:57 -0000 > -----Original Message----- > From: Ananyev, Konstantin > Sent: Thursday, July 02, 2015 4:52 PM > To: 'WangDong'; dev@dpdk.org > Subject: RE: [dpdk-dev] [PATCH 1/2] eal:Introduce rte_dma_wmb/rte_dma_rmb= . >=20 > Hi Dong, >=20 > > -----Original Message----- > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of WangDong > > Sent: Sunday, June 28, 2015 4:23 PM > > To: dev@dpdk.org > > Subject: [dpdk-dev] [PATCH 1/2] eal:Introduce rte_dma_wmb/rte_dma_rmb. > > > > These macro can be used to replace current PMD's compiler memory barrie= r (volatile varible) and rte_wmb. > > In x86, they implement to compiler memory barrier. > > In power, they implement to processor memory barrier. > > > > --- > > .../common/include/arch/ppc_64/rte_atomic.h | 4 ++++ > > .../common/include/arch/x86/rte_atomic.h | 4 ++++ > > lib/librte_eal/common/include/generic/rte_atomic.h | 25 ++++++++++++++= ++++++++ > > 3 files changed, 33 insertions(+) > > > > diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h b/l= ib/librte_eal/common/include/arch/ppc_64/rte_atomic.h > > index fb7af2b..8f4129d 100644 > > --- a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h > > +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h > > @@ -72,6 +72,10 @@ extern "C" { > > */ > > #define rte_rmb() {asm volatile("sync" : : : "memory"); } > > > > +#define rte_dma_wmb() {asm volatile("sync" : : : "memory"); } > > + > > +#define rte_dma_rmb() {asm volatile("sync" : : : "memory"); >=20 > As a nit, probably better: >=20 > +#define rte_dma_wmb() rte_rmb() > +#define rte_dma_rmb() rte_wmb() >=20 > Here? >=20 > Konstantin BTW, forgot to mention, git am threw a warning when I applied tha patch: $ git am patchv1/5884 Applying: eal:Introduce rte_dma_wmb/rte_dma_rmb. /local/kananye1/dpdk.org-asmb1/.git/rebase-apply/patch:17: trailing whitesp= ace. #define rte_dma_rmb() {asm volatile("sync" : : : "memory"); warning: 1 line adds whitespace errors. =20 Konstantin >=20 > > + > > /*------------------------- 16 bit atomic operations -----------------= --------*/ > > /* To be compatible with Power7, use GCC built-in functions for 16 bit > > * operations */ > > diff --git a/lib/librte_eal/common/include/arch/x86/rte_atomic.h b/lib/= librte_eal/common/include/arch/x86/rte_atomic.h > > index e93e8ee..7cfbe8f 100644 > > --- a/lib/librte_eal/common/include/arch/x86/rte_atomic.h > > +++ b/lib/librte_eal/common/include/arch/x86/rte_atomic.h > > @@ -53,6 +53,10 @@ extern "C" { > > > > #define rte_rmb() _mm_lfence() > > > > +#define rte_dma_wmb() rte_compiler_barrier() > > + > > +#define rte_dma_rmb() rte_compiler_barrier() > > + > > /*------------------------- 16 bit atomic operations -----------------= --------*/ > > > > #ifndef RTE_FORCE_INTRINSICS > > diff --git a/lib/librte_eal/common/include/generic/rte_atomic.h b/lib/l= ibrte_eal/common/include/generic/rte_atomic.h > > index 6c7581a..a51eeee 100644 > > --- a/lib/librte_eal/common/include/generic/rte_atomic.h > > +++ b/lib/librte_eal/common/include/generic/rte_atomic.h > > @@ -72,6 +72,31 @@ static inline void rte_wmb(void); > > */ > > static inline void rte_rmb(void); > > > > +/** > > + * Write memory barrier for DMA. > > + * > > + * Be used in PMD, unlike rte_wmb() which use processor memory barrier= , > > + * this memory barrier focus on performance, if compiler memory barrie= r > > + * is sufficient for guarantee memory ordering, this function will > > + * use compiler memory barrier. > > + * > > + * This function is architecture dependent. > > + */ > > +static inline void rte_dma_wmb(void); > > + > > +/** > > + * Read memory barrier for DMA. > > + * > > + * Be used in PMD, unlike rte_rmb() which use processor memory barrier= , > > + * this memory barrier focus on performance, if compiler memory barrie= r > > + * is sufficient for guarantee memory ordering, this function will > > + * use compiler memory barrier. > > + * > > + * This function is architecture dependent. > > + */ > > +static inline void rte_dma_rmb(void); > > + > > + > > #endif /* __DOXYGEN__ */ > > > > /** > > -- > > 2.1.0