From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 1163C2934 for ; Thu, 8 Dec 2016 10:26:23 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP; 08 Dec 2016 01:26:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,318,1477983600"; d="scan'208";a="910015851" Received: from irsmsx103.ger.corp.intel.com ([163.33.3.157]) by orsmga003.jf.intel.com with ESMTP; 08 Dec 2016 01:26:19 -0800 Received: from irsmsx111.ger.corp.intel.com (10.108.20.4) by IRSMSX103.ger.corp.intel.com (163.33.3.157) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 8 Dec 2016 09:26:19 +0000 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.43]) by irsmsx111.ger.corp.intel.com ([169.254.2.55]) with mapi id 14.03.0248.002; Thu, 8 Dec 2016 09:26:18 +0000 From: "Ananyev, Konstantin" To: "Yang, Zhiyong" , Thomas Monjalon CC: "dev@dpdk.org" , "yuanhan.liu@linux.intel.com" , "Richardson, Bruce" , "De Lara Guarch, Pablo" Thread-Topic: [dpdk-dev] [PATCH 1/4] eal/common: introduce rte_memset on IA platform Thread-Index: AQHSTHcpRTnyVY6QF0Gsm+MMelrW8KD0c9uAgAlAQICAABxAEA== Date: Thu, 8 Dec 2016 09:26:17 +0000 Message-ID: <2601191342CEEE43887BDE71AB9772583F0E55B0@irsmsx105.ger.corp.intel.com> References: <1480926387-63838-1-git-send-email-zhiyong.yang@intel.com> <1480926387-63838-2-git-send-email-zhiyong.yang@intel.com> <7223515.9TZuZb6buy@xps13> In-Reply-To: Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.180] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 1/4] eal/common: introduce rte_memset on IA platform X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Dec 2016 09:26:24 -0000 Hi Zhiyong, >=20 > HI, Thomas: > Sorry for late reply. I have been being always considering your suggesti= on. >=20 > > -----Original Message----- > > From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com] > > Sent: Friday, December 2, 2016 6:25 PM > > To: Yang, Zhiyong > > Cc: dev@dpdk.org; yuanhan.liu@linux.intel.com; Richardson, Bruce > > ; Ananyev, Konstantin > > ; De Lara Guarch, Pablo > > > > Subject: Re: [dpdk-dev] [PATCH 1/4] eal/common: introduce rte_memset on > > IA platform > > > > 2016-12-05 16:26, Zhiyong Yang: > > > +#ifndef _RTE_MEMSET_X86_64_H_ > > > > Is this implementation specific to 64-bit? > > >=20 > Yes. >=20 > > > + > > > +#define rte_memset memset > > > + > > > +#else > > > + > > > +static void * > > > +rte_memset(void *dst, int a, size_t n); > > > + > > > +#endif > > > > If I understand well, rte_memset (as rte_memcpy) is using the most rece= nt > > instructions available (and enabled) when compiling. > > It is not adapting the instructions to the run-time CPU. > > There is no need to downgrade at run-time the instruction set as it is > > obviously not a supported case, but it would be nice to be able to upgr= ade a > > "default compilation" at run-time as it is done in rte_acl. > > I explain this case more clearly for reference: > > > > We can have AVX512 supported in the compiler but disable it when compil= ing > > (CONFIG_RTE_MACHINE=3Dsnb) in order to build a binary running almost > > everywhere. > > When running this binary on a CPU having AVX512 support, it will not be= nefit > > of the AVX512 improvement. > > Though, we can compile an AVX512 version of some functions and use them > > only if the running CPU is capable. > > This kind of miracle can be achieved in two ways: > > > > 1/ For generic C code compiled with a recent GCC, a function can be bui= lt for > > several CPUs thanks to the attribute target_clones. > > > > 2/ For manually optimized functions using CPU-specific intrinsics or as= m, it is > > possible to build them with non-default flags thanks to the attribute t= arget. > > > > 3/ For manually optimized files using CPU-specific intrinsics or asm, w= e use > > specifics flags in the makefile. > > > > The function clone in case 1/ is dynamically chosen at run-time through= ifunc > > resolver. > > The specific functions in cases 2/ and 3/ must chosen at run-time by > > initializing a function pointer thanks to rte_cpu_get_flag_enabled(). > > > > Note that rte_hash and software crypto PMDs have a run-time check with > > rte_cpu_get_flag_enabled() but do not override CFLAGS in the Makefile. > > Next step for these libraries? > > > > Back to rte_memset, I think you should try the solution 2/. >=20 > I have read the ACL code, if I understand well , for complex algo impleme= ntation, > it is good idea, but Choosing functions at run time will bring some overh= ead. For frequently called function > Which consumes small cycles, the overhead maybe is more than the gains o= ptimizations brings > For example, for most applications in dpdk, memset only set N =3D 10 or 1= 2bytes. It consumes fewer cycles. But then what the point to have an rte_memset() using vector instructions a= t all? >>From what you are saying the most common case is even less then SSE registe= r size. Konstantin >=20 > Thanks > Zhiyong