From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 7D515A84F for ; Wed, 17 Jan 2018 12:34:28 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Jan 2018 03:34:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,372,1511856000"; d="scan'208";a="10928354" Received: from irsmsx110.ger.corp.intel.com ([163.33.3.25]) by fmsmga007.fm.intel.com with ESMTP; 17 Jan 2018 03:34:27 -0800 Received: from irsmsx155.ger.corp.intel.com (163.33.192.3) by irsmsx110.ger.corp.intel.com (163.33.3.25) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 17 Jan 2018 11:34:25 +0000 Received: from irsmsx105.ger.corp.intel.com ([169.254.7.236]) by irsmsx155.ger.corp.intel.com ([169.254.14.169]) with mapi id 14.03.0319.002; Wed, 17 Jan 2018 11:34:25 +0000 From: "Ananyev, Konstantin" To: "Nicolau, Radu" , "dev@dpdk.org" CC: "Lu, Wenzhuo" , "Zhao, XinfengX" , "De Lara Guarch, Pablo" Thread-Topic: [PATCH] net/ixgbe: check if security capabilities are enabled by HW Thread-Index: AQHTj4XQ9QQDah/LeE2MZdqj2Pmgb6N37dEQ Date: Wed, 17 Jan 2018 11:34:25 +0000 Message-ID: <2601191342CEEE43887BDE71AB9772588627EE87@irsmsx105.ger.corp.intel.com> References: <1516187946-30607-1-git-send-email-radu.nicolau@intel.com> In-Reply-To: <1516187946-30607-1-git-send-email-radu.nicolau@intel.com> Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNjM1YjUwYTAtNGFmNi00YWJiLWE5MmItNWVkOTJmMmU1OTExIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6IkdsY2UzY0hRXC9EUWRXSUFJcFhrZzd4ZVRXMXRvRjBpWWIzZTczYVVXQ2NRPSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [163.33.239.180] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] net/ixgbe: check if security capabilities are enabled by HW X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Jan 2018 11:34:30 -0000 Hi Radu, > -----Original Message----- > From: Nicolau, Radu > Sent: Wednesday, January 17, 2018 11:19 AM > To: dev@dpdk.org > Cc: Lu, Wenzhuo ; Ananyev, Konstantin ; Zhao, XinfengX > ; De Lara Guarch, Pablo ; Nicolau, Radu > Subject: [PATCH] net/ixgbe: check if security capabilities are enabled by= HW >=20 > Check if the security enable bits are not fused before setting > offload capabilities for security In theory dev_info_get() - could be called at any stage of device configura= tion or even when RX/TX is active. Do you really want to assert SECRXCTRL at that moment? Probably better to do this only once at init time and then just use some st= ored value? =20 Konstantin >=20 > Signed-off-by: Radu Nicolau > --- > drivers/net/ixgbe/ixgbe_ethdev.c | 6 ++++-- > drivers/net/ixgbe/ixgbe_ipsec.c | 15 +++++++++++++++ > drivers/net/ixgbe/ixgbe_ipsec.h | 1 + > 3 files changed, 20 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_e= thdev.c > index 43e0132..4f2ab2f 100644 > --- a/drivers/net/ixgbe/ixgbe_ethdev.c > +++ b/drivers/net/ixgbe/ixgbe_ethdev.c > @@ -3685,8 +3685,10 @@ ixgbe_dev_info_get(struct rte_eth_dev *dev, struct= rte_eth_dev_info *dev_info) > dev_info->tx_offload_capa |=3D DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM; >=20 > #ifdef RTE_LIBRTE_SECURITY > - dev_info->rx_offload_capa |=3D DEV_RX_OFFLOAD_SECURITY; > - dev_info->tx_offload_capa |=3D DEV_TX_OFFLOAD_SECURITY; > + if (ixgbe_crypto_capable(dev)) { > + dev_info->rx_offload_capa |=3D DEV_RX_OFFLOAD_SECURITY; > + dev_info->tx_offload_capa |=3D DEV_TX_OFFLOAD_SECURITY; > + } > #endif >=20 > dev_info->default_rxconf =3D (struct rte_eth_rxconf) { > diff --git a/drivers/net/ixgbe/ixgbe_ipsec.c b/drivers/net/ixgbe/ixgbe_ip= sec.c > index 97f025a8..a495679 100644 > --- a/drivers/net/ixgbe/ixgbe_ipsec.c > +++ b/drivers/net/ixgbe/ixgbe_ipsec.c > @@ -602,6 +602,21 @@ ixgbe_crypto_capabilities_get(void *device __rte_unu= sed) >=20 >=20 > int > +ixgbe_crypto_capable(struct rte_eth_dev *dev) > +{ > + struct ixgbe_hw *hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private)= ; > + uint32_t reg_i, reg, capable =3D 1; > + /* test if rx crypto can be enabled and then write back initial value*/ > + reg_i =3D IXGBE_READ_REG(hw, IXGBE_SECRXCTRL); > + IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, 0); > + reg =3D IXGBE_READ_REG(hw, IXGBE_SECRXCTRL); > + if (reg !=3D 0) > + capable =3D 0; > + IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, reg_i); > + return capable; > +} > + > +int > ixgbe_crypto_enable_ipsec(struct rte_eth_dev *dev) > { > struct ixgbe_hw *hw =3D IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private)= ; > diff --git a/drivers/net/ixgbe/ixgbe_ipsec.h b/drivers/net/ixgbe/ixgbe_ip= sec.h > index acd9f3e..eeba39f 100644 > --- a/drivers/net/ixgbe/ixgbe_ipsec.h > +++ b/drivers/net/ixgbe/ixgbe_ipsec.h > @@ -112,6 +112,7 @@ struct ixgbe_ipsec { >=20 > struct rte_security_ctx * > ixgbe_ipsec_ctx_create(struct rte_eth_dev *dev); > +int ixgbe_crypto_capable(struct rte_eth_dev *dev); > int ixgbe_crypto_enable_ipsec(struct rte_eth_dev *dev); > int ixgbe_crypto_add_ingress_sa_from_flow(const void *sess, > const void *ip_spec, > -- > 2.7.5