From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <konstantin.ananyev@intel.com>
Received: from mga06.intel.com (mga06.intel.com [134.134.136.31])
 by dpdk.org (Postfix) with ESMTP id 7A65E5F2A
 for <dev@dpdk.org>; Wed, 14 Mar 2018 13:36:02 +0100 (CET)
X-Amp-Result: SKIPPED(no attachment in message)
X-Amp-File-Uploaded: False
Received: from orsmga002.jf.intel.com ([10.7.209.21])
 by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;
 14 Mar 2018 05:36:01 -0700
X-ExtLoop1: 1
X-IronPort-AV: E=Sophos;i="5.47,470,1515484800"; d="scan'208";a="41938274"
Received: from irsmsx154.ger.corp.intel.com ([163.33.192.96])
 by orsmga002.jf.intel.com with ESMTP; 14 Mar 2018 05:36:00 -0700
Received: from irsmsx105.ger.corp.intel.com ([169.254.7.221]) by
 IRSMSX154.ger.corp.intel.com ([169.254.12.108]) with mapi id 14.03.0319.002;
 Wed, 14 Mar 2018 12:35:59 +0000
From: "Ananyev, Konstantin" <konstantin.ananyev@intel.com>
To: "Zhang, Qi Z" <qi.z.zhang@intel.com>, "thomas@monjalon.net"
 <thomas@monjalon.net>
CC: "dev@dpdk.org" <dev@dpdk.org>, "Xing, Beilei" <beilei.xing@intel.com>,
 "Wu, Jingjing" <jingjing.wu@intel.com>, "Lu, Wenzhuo" <wenzhuo.lu@intel.com>, 
 "Zhang, Qi Z" <qi.z.zhang@intel.com>
Thread-Topic: [dpdk-dev] [PATCH v2 4/4] net/i40e: enable deferred queue setup
Thread-Index: AQHTsdzniCAjXGTwQUq3PD1jD08qQaPPvVLQ
Date: Wed, 14 Mar 2018 12:35:59 +0000
Message-ID: <2601191342CEEE43887BDE71AB9772589E28FA78@irsmsx105.ger.corp.intel.com>
References: <20180212045314.171616-1-qi.z.zhang@intel.com>
 <20180302041306.90324-1-qi.z.zhang@intel.com>
 <20180302041306.90324-5-qi.z.zhang@intel.com>
In-Reply-To: <20180302041306.90324-5-qi.z.zhang@intel.com>
Accept-Language: en-IE, en-US
Content-Language: en-US
X-MS-Has-Attach: 
X-MS-TNEF-Correlator: 
x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNTlhMGY0MGUtZjM4Ny00Y2Q5LWEzZmQtMDJmMGE3MjAzZmUxIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6IlwvSCtoaEJjSjljYSsxYkUzaEVHQ2Q0VTdjK0Y2djdDazIxZ0pzc0RDVytjPSJ9
x-ctpclassification: CTP_NT
dlp-product: dlpe-windows
dlp-version: 11.0.0.116
dlp-reaction: no-action
x-originating-ip: [163.33.239.180]
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
Subject: Re: [dpdk-dev] [PATCH v2 4/4] net/i40e: enable deferred queue setup
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://dpdk.org/ml/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://dpdk.org/ml/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://dpdk.org/ml/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
X-List-Received-Date: Wed, 14 Mar 2018 12:36:03 -0000



> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Qi Zhang
> Sent: Friday, March 2, 2018 4:13 AM
> To: thomas@monjalon.net
> Cc: dev@dpdk.org; Xing, Beilei <beilei.xing@intel.com>; Wu, Jingjing <jin=
gjing.wu@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com>;
> Zhang, Qi Z <qi.z.zhang@intel.com>
> Subject: [dpdk-dev] [PATCH v2 4/4] net/i40e: enable deferred queue setup
>=20
> Expose the deferred queue configuration capability and enhance
> i40e_dev_[rx|tx]_queue_[setup|release] to handle the situation when
> device already started.
>=20
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> ---
>  drivers/net/i40e/i40e_ethdev.c |  6 ++++
>  drivers/net/i40e/i40e_rxtx.c   | 62 ++++++++++++++++++++++++++++++++++++=
++++--
>  2 files changed, 66 insertions(+), 2 deletions(-)
>=20
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethde=
v.c
> index 06b0f03a1..843a0c42a 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -3195,6 +3195,12 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct =
rte_eth_dev_info *dev_info)
>  		DEV_TX_OFFLOAD_GRE_TNL_TSO |
>  		DEV_TX_OFFLOAD_IPIP_TNL_TSO |
>  		DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
> +	dev_info->deferred_queue_config_capa =3D
> +		DEV_DEFERRED_RX_QUEUE_SETUP |
> +		DEV_DEFERRED_TX_QUEUE_SETUP |
> +		DEV_DEFERRED_RX_QUEUE_RELEASE |
> +		DEV_DEFERRED_TX_QUEUE_RELEASE;
> +
>  	dev_info->hash_key_size =3D (I40E_PFQF_HKEY_MAX_INDEX + 1) *
>  						sizeof(uint32_t);
>  	dev_info->reta_size =3D pf->hash_lut_size;
> diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
> index 1217e5a61..e5f532cf7 100644
> --- a/drivers/net/i40e/i40e_rxtx.c
> +++ b/drivers/net/i40e/i40e_rxtx.c
> @@ -1712,6 +1712,7 @@ i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
>  	uint16_t len, i;
>  	uint16_t reg_idx, base, bsf, tc_mapping;
>  	int q_offset, use_def_burst_func =3D 1;
> +	int ret =3D 0;
>=20
>  	if (hw->mac.type =3D=3D I40E_MAC_VF || hw->mac.type =3D=3D I40E_MAC_X72=
2_VF) {
>  		vf =3D I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
> @@ -1841,6 +1842,25 @@ i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
>  			rxq->dcb_tc =3D i;
>  	}
>=20
> +	if (dev->data->dev_started) {
> +		ret =3D i40e_rx_queue_init(rxq);
> +		if (ret !=3D I40E_SUCCESS) {
> +			PMD_DRV_LOG(ERR,
> +				    "Failed to do RX queue initialization");
> +			return ret;
> +		}
> +		if (ad->rx_vec_allowed)

Better to check what rx function is installed right now.

> +			i40e_rxq_vec_setup(rxq);
> +		if (!rxq->rx_deferred_start) {
> +			ret =3D i40e_dev_rx_queue_start(dev, queue_idx);

I don't think it is a good idea to start/stop queue inside queue_setup/queu=
e_release.
There is special API (queue_start/queue_stop) to do this.
Konstantin

> +			if (ret !=3D I40E_SUCCESS) {
> +				PMD_DRV_LOG(ERR,
> +					    "Failed to start RX queue");
> +				return ret;
> +			}
> +		}
> +	}
> +
>  	return 0;
>  }
>=20
> @@ -1848,13 +1868,21 @@ void
>  i40e_dev_rx_queue_release(void *rxq)
>  {
>  	struct i40e_rx_queue *q =3D (struct i40e_rx_queue *)rxq;
> +	struct rte_eth_dev *dev =3D &rte_eth_devices[q->port_id];
>=20
>  	if (!q) {
>  		PMD_DRV_LOG(DEBUG, "Pointer to rxq is NULL");
>  		return;
>  	}
>=20
> -	i40e_rx_queue_release_mbufs(q);
> +	if (dev->data->dev_started) {
> +		if (dev->data->rx_queue_state[q->queue_id] =3D=3D
> +			RTE_ETH_QUEUE_STATE_STARTED)
> +			i40e_dev_rx_queue_stop(dev, q->queue_id);
> +	} else {
> +		i40e_rx_queue_release_mbufs(q);
> +	}
> +
>  	rte_free(q->sw_ring);
>  	rte_free(q);
>  }
> @@ -1980,6 +2008,8 @@ i40e_dev_tx_queue_setup(struct rte_eth_dev *dev,
>  			const struct rte_eth_txconf *tx_conf)
>  {
>  	struct i40e_hw *hw =3D I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> +	struct i40e_adapter *ad =3D
> +		I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
>  	struct i40e_vsi *vsi;
>  	struct i40e_pf *pf =3D NULL;
>  	struct i40e_vf *vf =3D NULL;
> @@ -1989,6 +2019,7 @@ i40e_dev_tx_queue_setup(struct rte_eth_dev *dev,
>  	uint16_t tx_rs_thresh, tx_free_thresh;
>  	uint16_t reg_idx, i, base, bsf, tc_mapping;
>  	int q_offset;
> +	int ret =3D 0;
>=20
>  	if (hw->mac.type =3D=3D I40E_MAC_VF || hw->mac.type =3D=3D I40E_MAC_X72=
2_VF) {
>  		vf =3D I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
> @@ -2162,6 +2193,25 @@ i40e_dev_tx_queue_setup(struct rte_eth_dev *dev,
>  			txq->dcb_tc =3D i;
>  	}
>=20
> +	if (dev->data->dev_started) {
> +		ret =3D i40e_tx_queue_init(txq);
> +		if (ret !=3D I40E_SUCCESS) {
> +			PMD_DRV_LOG(ERR,
> +				    "Failed to do TX queue initialization");
> +			return ret;
> +		}
> +		if (ad->tx_vec_allowed)
> +			i40e_txq_vec_setup(txq);
> +		if (!txq->tx_deferred_start) {
> +			ret =3D i40e_dev_tx_queue_start(dev, queue_idx);
> +			if (ret !=3D I40E_SUCCESS) {
> +				PMD_DRV_LOG(ERR,
> +					    "Failed to start TX queue");
> +				return ret;
> +			}
> +		}
> +	}
> +
>  	return 0;
>  }
>=20
> @@ -2169,13 +2219,21 @@ void
>  i40e_dev_tx_queue_release(void *txq)
>  {
>  	struct i40e_tx_queue *q =3D (struct i40e_tx_queue *)txq;
> +	struct rte_eth_dev *dev =3D &rte_eth_devices[q->port_id];
>=20
>  	if (!q) {
>  		PMD_DRV_LOG(DEBUG, "Pointer to TX queue is NULL");
>  		return;
>  	}
>=20
> -	i40e_tx_queue_release_mbufs(q);
> +	if (dev->data->dev_started) {
> +		if (dev->data->tx_queue_state[q->queue_id] =3D=3D
> +			RTE_ETH_QUEUE_STATE_STARTED)
> +			i40e_dev_tx_queue_stop(dev, q->queue_id);
> +	} else {
> +		i40e_tx_queue_release_mbufs(q);
> +	}
> +
>  	rte_free(q->sw_ring);
>  	rte_free(q);
>  }
> --
> 2.13.6