From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F1265439B6; Wed, 24 Jan 2024 14:00:51 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A283340294; Wed, 24 Jan 2024 14:00:51 +0100 (CET) Received: from out2-smtp.messagingengine.com (out2-smtp.messagingengine.com [66.111.4.26]) by mails.dpdk.org (Postfix) with ESMTP id 850004026F for ; Wed, 24 Jan 2024 14:00:50 +0100 (CET) Received: from compute6.internal (compute6.nyi.internal [10.202.2.47]) by mailout.nyi.internal (Postfix) with ESMTP id 228895C00E1; Wed, 24 Jan 2024 08:00:48 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute6.internal (MEProxy); Wed, 24 Jan 2024 08:00:48 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to; s=fm3; t=1706101248; x=1706187648; bh=PDhJNIY9V5Jh1LQGD58A2LZ2yqdmkO4IwMNlU5+1Gcw=; b= Sqj2VM0XSJ/EH48vvzP7ktJdNxBKNfhNzInXwyPgR5RYz5/lH9FRv+IfnwJl5X5l ttUaLgvjXTF+DQKkpeCJuT/GCk+4V5vhn468IAUxErVCfqkKpr3KkEyP8xxm2AFB 67PZ20gbUcniYOOH0/R7gvREBD5OkQH2OqDZNHkumAh/JWHL2x2Y4PsH6Y4Wqhuw wzp7XhVtrwnL74N6d4+tHr3Jqe0ETIqJAoerJ1aezSnUB5Z0bXPhbuODrslnt4ZT Ed6SaiY9IaTPTcvreHbyAGSaDsPE39/OyP2zZYyLIZXMjfU15RqdcT8vD+6H0V+a C2yuB0C5KWw7V92jrNL7bg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm3; t=1706101248; x= 1706187648; bh=PDhJNIY9V5Jh1LQGD58A2LZ2yqdmkO4IwMNlU5+1Gcw=; b=F n4+hBoxIiAcWTczGnSjWQKd1kX8SKnr/8JzgDhQ+t38AO+CHxXbkAoApRh1Lym9o n3rBoOBh4TZw3iPY7T+JRB5i66izTNmGv0vCKNR/0iJ7NJYFfszNEC7c31XED45G eS9b9oCfX8B/5tNXP7BQ+VCE3QqO+9udMs2a1XAXQA2iEudeyfienacveH1/4BsN wUbo0YKX8zMikep0dM01cKuHoIvMyIG+h/Is1cbZ4InRpWoNW7ju8vSP7CnPuL0b Zd8UgTbXadzTRpleaqnlzk7U5IoyR55WKI/WYmH8bkB9BdbfTOtILBYY19zWHo2n y+sbguvh02xFyAf4kqZlA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvkedrvdeluddggeehucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhm rghsucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenuc ggtffrrghtthgvrhhnpedtjeeiieefhedtfffgvdelteeufeefheeujefgueetfedttdei kefgkeduhedtgfenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfh hrohhmpehthhhomhgrshesmhhonhhjrghlohhnrdhnvght X-ME-Proxy: Feedback-ID: i47234305:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 24 Jan 2024 08:00:46 -0500 (EST) From: Thomas Monjalon To: Chengwen Feng Cc: dev@dpdk.org, ferruh.yigit@amd.com, stephen@networkplumber.org, tangkunshan@huawei.com Subject: Re: [PATCH 01/12] eal: introduce more macro for bit definition Date: Wed, 24 Jan 2024 14:00:44 +0100 Message-ID: <2683314.Isy0gbHreE@thomas> In-Reply-To: <20240122035802.31491-2-fengchengwen@huawei.com> References: <20231121122651.7078-1-fengchengwen@huawei.com> <20240122035802.31491-1-fengchengwen@huawei.com> <20240122035802.31491-2-fengchengwen@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 22/01/2024 04:57, Chengwen Feng: > Introduce macros: RTE_MBIT64/RTE_MBIT32, RTE_GENMASK64/RTE_GENMASK32, > and RTE_FIELD_GET64/RTE_FIELD_GET32. A bit of context and description would help. > +/** > + * Get the uint64_t value for a multiple bits set. > + * > + * @param val > + * The value may not all 1s. > + * @param nr > + * The bit number in range of 0 to (64 - width of val). > + */ > +#define RTE_MBIT64(val, nr) (UINT64_C(val) << (nr)) I don't understand this macro. I think you mean that val is shifted by nr. Please revise the description.