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From: Thomas Monjalon <thomas@monjalon.net>
To: Phil Yang <phil.yang@arm.com>
Cc: erik.g.carrillo@intel.com, dev@dpdk.org, david.marchand@redhat.com,
 rsanford@akamai.com, Honnappa.Nagarahalli@arm.com, Gavin.Hu@arm.com,
 nd@arm.com
Date: Sun, 26 Apr 2020 22:06:49 +0200
Message-ID: <2791852.BQQF58Tnoo@thomas>
In-Reply-To: <1587912315-1819-1-git-send-email-phil.yang@arm.com>
References: <1587713042-527-1-git-send-email-phil.yang@arm.com>
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Subject: Re: [dpdk-dev] [PATCH v4] lib/timer: relax barrier for status update
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26/04/2020 16:45, Phil Yang:
> Volatile has no ordering semantics. The rte_timer structure defines
> timer status as a volatile variable and uses the rte_r/wmb barrier
> to guarantee inter-thread visibility.
> 
> This patch optimized the volatile operation with c11 atomic operations
> and one-way barrier to save the performance penalty. According to the
> timer_perf_autotest benchmarking results, this patch can uplift 10%~16%
> timer appending performance, 3%~20% timer resetting performance and 45%
> timer callbacks scheduling performance on aarch64 and no loss in
> performance for x86.
> 
> Suggested-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> Signed-off-by: Phil Yang <phil.yang@arm.com>
> Reviewed-by: Gavin Hu <gavin.hu@arm.com>
> Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>

Applied, thanks