From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 200B343CB8; Fri, 15 Mar 2024 12:17:11 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B8C6B42E8B; Fri, 15 Mar 2024 12:17:10 +0100 (CET) Received: from wfhigh5-smtp.messagingengine.com (wfhigh5-smtp.messagingengine.com [64.147.123.156]) by mails.dpdk.org (Postfix) with ESMTP id CB69D42E6B for ; Fri, 15 Mar 2024 12:17:09 +0100 (CET) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailfhigh.west.internal (Postfix) with ESMTP id 7907218000BA; Fri, 15 Mar 2024 07:17:05 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Fri, 15 Mar 2024 07:17:06 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to; s=fm1; t=1710501424; x=1710587824; bh=gKrbe0/Ol86ataQsabpiXn3KWi51LIdr2k3nyscCAhc=; b= pMrVfQnm0Gr6zO4zF+PDMcI1LQn6n6twBE8qQgWyykggcdytoiVoAZ259o2w6iFD f70fiexr3TQPG5w1P8lzG71ffMyk8VvhNok44aOrWp2sHtrFo2623IBA2Qlt3Rph 35jAsbgOnPrEr8u9QFqbv8zu52+crC6YMTMQ47A0U0/o0nwc5Z9cEcXLfyz0C+tJ CfjOZFNXI9PSIgmwNXN54cr6afUu6jZVCrYkYzpLDYcn+A5SXJbaWbjWodFD2nM4 9SKfECscodr297kGIEk1boCRvfntsmQpG6XxF6IUPv3FjuFIJHnN8uS/2ZeUUSzZ Ms/VHIeR3ouXCFAFUsa9Ww== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm1; t=1710501424; x= 1710587824; bh=gKrbe0/Ol86ataQsabpiXn3KWi51LIdr2k3nyscCAhc=; b=U tiEylhQMMbIE/yEuXd/aXdQc1IUYKnEf6yxOuowXHBd8i7CbFk3D0+0oQKsZ+Iwm f/rc2aOO0hCvwYiIi19RnlY9JXAy9+EzPJyfJlDb43Bg8+2MDMxLD7/XurAhfDI/ LNLrDTFh6BkpBuqnwv/SJCEa6naCbq/2SeLh/6Nz1tfvMuoZEB3hDVmRXcsVqtbi 1d+dPrJSJvS74G4KVUd2QqZPufljy8tPCfKotxyb+PRq+RHJ6UERoOkJh4WJ3X1Y V1dtLJkGCz7K5G93g5df+1adsajej4c35QaX5ZxtrAptkdnPdCuM05bnsjyJ+h08 yYnVpg7rYy0HubEeBdo9g== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrjeelgddvhecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvfevufffkfgjfhgggfgtsehtqhertddttdejnecuhfhrohhmpefvhhhomhgr shcuofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecugg ftrfgrthhtvghrnhepgedttdeljeejgeffkeekkedtjeevtdehvedtkeeivdeuuedviedu vdelveejueejnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepthhhohhmrghssehmohhnjhgrlhhonhdrnhgvth X-ME-Proxy: Feedback-ID: i47234305:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 15 Mar 2024 07:17:03 -0400 (EDT) From: Thomas Monjalon To: Pavan Nikhilesh Cc: jerinj@marvell.com, juraj.linkes@pantheon.tech, nd@arm.com, wathsala.vithanage@arm.com, Ruifeng Wang , Bruce Richardson , dev@dpdk.org Subject: Re: [PATCH v8 1/5] config/arm: avoid mcpu and march conflicts Date: Fri, 15 Mar 2024 12:17:00 +0100 Message-ID: <2962307.VdNmn5OnKV@thomas> In-Reply-To: <20240314113829.2511-1-pbhagavatula@marvell.com> References: <20240306154957.750-1-pbhagavatula@marvell.com> <20240314113829.2511-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 14/03/2024 12:38, pbhagavatula@marvell.com: > From: Pavan Nikhilesh >=20 > The compiler options march and mtune are a subset > of mcpu and will lead to conflicts if improper march > is chosen for a given mcpu. > To avoid conflicts, discard part number march when > mcpu is available and is supported by the compiler. >=20 > Example: > march =3D armv9-a > mcpu =3D neoverse-n2 >=20 > mcpu supported, march supported > machine_args =3D ['-mcpu=3Dneoverse-n2'] >=20 > mcpu supported, march not supported > machine_args =3D ['-mcpu=3Dneoverse-n2'] >=20 > mcpu not supported, march supported > machine_args =3D ['-march=3Darmv9-a'] >=20 > mcpu not supported, march not supported > machine_args =3D ['-march=3Darmv8.6-a'] >=20 > Signed-off-by: Pavan Nikhilesh > Reviewed-by: Juraj Linke=C5=A1 > --- > v2 Changes: > - Cleanup march inconsistencies. (Juraj Linkes) > - Unify fallback march selection. (Juraj Linkes) > - Tag along ARM WFE patch. > v3 Changes: > - Fix missing 'fallback_march' key check. > v4 Changes: > - Discard march when mcpu is supported. > v5 Changes: > - Consolidate mcpu and march checks. (Juraj Linkes) > - Fix unintentionally skipping fallback march (Juraj Linkes) > v6 Changes: > - Remove compiler support check when march is forced. (Juraj Linkes) > - Simplify fallback march configuration. > v7 Changes: > - Rebase on master. > v8 Changes: > - Split patches to be more explicit about changes. Applied, thanks for the split.