From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 53B4543E43; Thu, 11 Apr 2024 13:57:45 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DDD3D4029C; Thu, 11 Apr 2024 13:57:44 +0200 (CEST) Received: from szxga06-in.huawei.com (szxga06-in.huawei.com [45.249.212.32]) by mails.dpdk.org (Postfix) with ESMTP id C27FB40268 for ; Thu, 11 Apr 2024 13:57:42 +0200 (CEST) Received: from mail.maildlp.com (unknown [172.19.88.163]) by szxga06-in.huawei.com (SkyGuard) with ESMTP id 4VFdTQ23cKz1wr3m; Thu, 11 Apr 2024 19:56:42 +0800 (CST) Received: from dggpeml500024.china.huawei.com (unknown [7.185.36.10]) by mail.maildlp.com (Postfix) with ESMTPS id 3218018001A; Thu, 11 Apr 2024 19:57:38 +0800 (CST) Received: from [10.67.121.161] (10.67.121.161) by dggpeml500024.china.huawei.com (7.185.36.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Thu, 11 Apr 2024 19:57:37 +0800 Subject: Re: [PATCH] ethdev: fix strict aliasing lead to link cannot be up To: =?UTF-8?Q?Morten_Br=c3=b8rup?= , , CC: , , , References: <20240411030749.41874-1-fengchengwen@huawei.com> <98CBD80474FA8B44BF855DF32C47DC35E9F394@smartserver.smartshare.dk> From: fengchengwen Message-ID: <2987eb7f-5439-9ecc-494c-b968f059da50@huawei.com> Date: Thu, 11 Apr 2024 19:57:37 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <98CBD80474FA8B44BF855DF32C47DC35E9F394@smartserver.smartshare.dk> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [10.67.121.161] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To dggpeml500024.china.huawei.com (7.185.36.10) X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi Morten, On 2024/4/11 14:58, Morten Brørup wrote: >> From: Chengwen Feng [mailto:fengchengwen@huawei.com] >> Sent: Thursday, 11 April 2024 05.08 >> >> Fix a problem introduced by a compiler upgrade (from gcc10 to gcc12.3), >> which will lead the hns3 NIC can't link up. The root cause is strict >> aliasing violation in rte_eth_linkstatus_set() with hns3 driver, see >> [1] for more details. >> >> This commit use union to avoid such aliasing violation. >> >> [1] Strict aliasing problem with rte_eth_linkstatus_set() >> https://marc.info/?l=dpdk-dev&m=171274148514777&w=3 >> >> Cc: stable@dpdk.org >> >> Signed-off-by: Chengwen Feng >> Signed-off-by: Dengdui Huang >> --- > > The patch mixes atomic and non-atomic access. > This is not new for DPDK, which used to rely on compiler built-in atomics. > > I'm not sure it needs to be changed, but my suggestion is inline below. > I don't think it makes any practical different for 64 bit arch, but it might for 32 bit arch. > >> lib/ethdev/ethdev_driver.h | 23 +++++++---------------- >> lib/ethdev/rte_ethdev.h | 16 ++++++++++------ >> 2 files changed, 17 insertions(+), 22 deletions(-) >> >> diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h >> index 0dbf2dd6a2..9d831d5c84 100644 >> --- a/lib/ethdev/ethdev_driver.h >> +++ b/lib/ethdev/ethdev_driver.h >> @@ -1674,18 +1674,13 @@ static inline int >> rte_eth_linkstatus_set(struct rte_eth_dev *dev, >> const struct rte_eth_link *new_link) >> { >> - RTE_ATOMIC(uint64_t) *dev_link = (uint64_t __rte_atomic *)&(dev- >>> data->dev_link); >> - union { >> - uint64_t val64; >> - struct rte_eth_link link; >> - } orig; >> - >> - RTE_BUILD_BUG_ON(sizeof(*new_link) != sizeof(uint64_t)); >> + struct rte_eth_link old_link; >> >> - orig.val64 = rte_atomic_exchange_explicit(dev_link, *(const >> uint64_t *)new_link, >> - rte_memory_order_seq_cst); >> + old_link.val64 = rte_atomic_exchange_explicit(&dev->data- >>> dev_link.val64, > > old_link.val64 should be written using: > rte_atomic_store_explicit(&old_link.val64, ..., rte_memory_order_seq_cst) I'm afraid I don't agree this, the &dev->data->dev_link.val64 should use atomic not the stack variable old_link. > >> + new_link->val64, > > new_link->val64 should be read using: > rte_atomic_load_explicit(&new_link->val64, rte_memory_order_seq_cst) The same reason with above. > >> + rte_memory_order_seq_cst); > >> >> - return (orig.link.link_status == new_link->link_status) ? -1 : 0; >> + return (old_link.link_status == new_link->link_status) ? -1 : 0; >> } >> >> /** >> @@ -1701,12 +1696,8 @@ static inline void >> rte_eth_linkstatus_get(const struct rte_eth_dev *dev, >> struct rte_eth_link *link) >> { >> - RTE_ATOMIC(uint64_t) *src = (uint64_t __rte_atomic *)&(dev->data- >>> dev_link); >> - uint64_t *dst = (uint64_t *)link; >> - >> - RTE_BUILD_BUG_ON(sizeof(*link) != sizeof(uint64_t)); >> - >> - *dst = rte_atomic_load_explicit(src, rte_memory_order_seq_cst); >> + link->val64 = rte_atomic_load_explicit(&dev->data->dev_link.val64, > > link->val64 should be written using: > rte_atomic_store_explicit(&link->val64, ..., rte_memory_order_seq_cst) The same reason with above, the &dev->data->dev_link.val64 should use atomic not the stack variable link. > >> + rte_memory_order_seq_cst); >> } >> >> /** >> diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h >> index 147257d6a2..0b5d3d2318 100644 >> --- a/lib/ethdev/rte_ethdev.h >> +++ b/lib/ethdev/rte_ethdev.h >> @@ -332,12 +332,16 @@ struct rte_eth_stats { >> /** >> * A structure used to retrieve link-level information of an Ethernet >> port. >> */ >> -__extension__ >> -struct __rte_aligned(8) rte_eth_link { /**< aligned for atomic64 >> read/write */ >> - uint32_t link_speed; /**< RTE_ETH_SPEED_NUM_ */ >> - uint16_t link_duplex : 1; /**< RTE_ETH_LINK_[HALF/FULL]_DUPLEX >> */ >> - uint16_t link_autoneg : 1; /**< RTE_ETH_LINK_[AUTONEG/FIXED] */ >> - uint16_t link_status : 1; /**< RTE_ETH_LINK_[DOWN/UP] */ >> +struct rte_eth_link { >> + union { >> + uint64_t val64; /**< used for atomic64 read/write */ > > The type of val64 should be: > RTE_ATOMIC(uint64_t) ack Plus: yes, this patch mixes atomic and non-atomic access, but the main reason is that we want to simplify the implementation. If we want to separate it clearly, maybe we should defined as this: struct rte_eth_link { union { RTE_ATOMIC(uint64_t) atomic64; /**< used for atomic64 read/write */ struct { uint64_t val64; }; struct { uint32_t link_speed; /**< RTE_ETH_SPEED_NUM_ */ uint16_t link_duplex : 1; /**< RTE_ETH_LINK_[HALF/FULL]_DUPLEX */ uint16_t link_autoneg : 1; /**< RTE_ETH_LINK_[AUTONEG/FIXED] */ uint16_t link_status : 1; /**< RTE_ETH_LINK_[DOWN/UP] */ }; }; }; Thanks > >> + struct { >> + uint32_t link_speed; /**< RTE_ETH_SPEED_NUM_ >> */ >> + uint16_t link_duplex : 1; /**< >> RTE_ETH_LINK_[HALF/FULL]_DUPLEX */ >> + uint16_t link_autoneg : 1; /**< >> RTE_ETH_LINK_[AUTONEG/FIXED] */ >> + uint16_t link_status : 1; /**< >> RTE_ETH_LINK_[DOWN/UP] */ >> + }; >> + }; >> }; >> >> /**@{@name Link negotiation >> -- >> 2.17.1 > > . >