From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CDD24A0A0E; Thu, 29 Apr 2021 05:20:35 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9664C4067E; Thu, 29 Apr 2021 05:20:35 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 148FC4003E for ; Thu, 29 Apr 2021 05:20:33 +0200 (CEST) IronPort-SDR: qSn+bSqP6q1ehuUlqxJV2bDsUWCi89T6McFIpC0008U2t8YaPqKx7tUGUgTHs1RCRDlZ/L5oF4 oa89U9+3iU+Q== X-IronPort-AV: E=McAfee;i="6200,9189,9968"; a="196962194" X-IronPort-AV: E=Sophos;i="5.82,258,1613462400"; d="scan'208";a="196962194" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Apr 2021 20:20:32 -0700 IronPort-SDR: gd+g/Oy93iS96eNUUdhgccW4jx1SxcV1dbY+yYO1S89bERP+Cgrpg98iug7cs7czDCsvK49eSA RkJRIyk08K2Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,258,1613462400"; d="scan'208";a="393708241" Received: from fmsmsx604.amr.corp.intel.com ([10.18.126.84]) by fmsmga007.fm.intel.com with ESMTP; 28 Apr 2021 20:20:32 -0700 Received: from shsmsx606.ccr.corp.intel.com (10.109.6.216) by fmsmsx604.amr.corp.intel.com (10.18.126.84) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Wed, 28 Apr 2021 20:20:31 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX606.ccr.corp.intel.com (10.109.6.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Thu, 29 Apr 2021 11:20:29 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.2106.013; Thu, 29 Apr 2021 11:20:29 +0800 From: "Zhang, Qi Z" To: "Lu, Wenzhuo" , "dev@dpdk.org" CC: "Lu, Wenzhuo" Thread-Topic: [dpdk-dev] [PATCH] net/iavf: fix performance drop Thread-Index: AQHXOl1AdFJRx8jiXEa2nY87MeuTbKrKNJqAgACjxCA= Date: Thu, 29 Apr 2021 03:20:29 +0000 Message-ID: <2bf08cdaca1c4d009f5af13a679d3404@intel.com> References: <1619414983-131070-1-git-send-email-wenzhuo.lu@intel.com> <1619660037-33334-1-git-send-email-wenzhuo.lu@intel.com> In-Reply-To: <1619660037-33334-1-git-send-email-wenzhuo.lu@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.5.1.3 dlp-product: dlpe-windows x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] net/iavf: fix performance drop X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: dev On Behalf Of Wenzhuo Lu > Sent: Thursday, April 29, 2021 9:34 AM > To: dev@dpdk.org > Cc: Lu, Wenzhuo > Subject: [dpdk-dev] [PATCH] net/iavf: fix performance drop >=20 > The performance drop is caused by that the RX scalar path is selected whe= n > AVX512 is disabled and some HW offload is enabled. > Actaully, the HW offload is supported by AVX2 and SSE. > In this scenario AVX2 path should be chosen. >=20 > This patch removes the offload related check for SSE and AVX2 as SSE and = AVX2 > do support the offload features. > No implement change about the data path. >=20 > Fixes: eff56a7b9f97 ("net/iavf: add offload path for Rx AVX512") >=20 > Signed-off-by: Wenzhuo Lu > --- > drivers/net/iavf/iavf_rxtx.c | 12 +++++------- > 1 file changed, 5 insertions(+), 7 deletions(-) >=20 > diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c = index > 3f3cf63..0ba19dbf 100644 > --- a/drivers/net/iavf/iavf_rxtx.c > +++ b/drivers/net/iavf/iavf_rxtx.c > @@ -2401,13 +2401,11 @@ > check_ret =3D iavf_rx_vec_dev_check(dev); > if (check_ret >=3D 0 && > rte_vect_get_max_simd_bitwidth() >=3D RTE_VECT_SIMD_128) { > - if (check_ret =3D=3D IAVF_VECTOR_PATH) { > - use_sse =3D true; > - if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) =3D=3D 1 || > - rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) =3D=3D 1) > && > - rte_vect_get_max_simd_bitwidth() >=3D > RTE_VECT_SIMD_256) > - use_avx2 =3D true; > - } > + use_sse =3D true; > + if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) =3D=3D 1 || > + rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) =3D=3D 1) && > + rte_vect_get_max_simd_bitwidth() >=3D RTE_VECT_SIMD_256) > + use_avx2 =3D true; >=20 > #ifdef CC_AVX512_SUPPORT > if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) =3D=3D 1 && > -- > 1.9.3 Acked-by: Qi Zhang Applied to dpdk-next-net-intel. Thanks Qi