From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id E49D1370 for ; Tue, 29 Nov 2016 17:07:36 +0100 (CET) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP; 29 Nov 2016 08:07:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,717,1473145200"; d="scan'208";a="35504116" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.237.220.29]) ([10.237.220.29]) by orsmga004.jf.intel.com with ESMTP; 29 Nov 2016 08:07:34 -0800 To: Jingjing Wu , dev@dpdk.org References: <1480239317-7827-1-git-send-email-jingjing.wu@intel.com> Cc: helin.zhang@intel.com From: Ferruh Yigit Message-ID: <2c330ced-2d11-446e-0e2b-c6dd5aa49f8b@intel.com> Date: Tue, 29 Nov 2016 16:07:33 +0000 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.5.0 MIME-Version: 1.0 In-Reply-To: <1480239317-7827-1-git-send-email-jingjing.wu@intel.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH] net/i40evf: fix casting between structs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 29 Nov 2016 16:07:37 -0000 On 11/27/2016 9:35 AM, Jingjing Wu wrote: > Casting from structs which lay out data in typed members > to structs which have flat memory buffers, will cause > problems if the alignment of the former isn't as expected. > This patch removes the casting between structs. > > Fixes: ae19955e7c86 ("i40evf: support reporting PF reset") > Signed-off-by: Jingjing Wu > --- > drivers/net/i40e/i40e_ethdev_vf.c | 27 +++++++++++++++------------ > 1 file changed, 15 insertions(+), 12 deletions(-) > > diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c > index aa306d6..53d7c87 100644 > --- a/drivers/net/i40e/i40e_ethdev_vf.c > +++ b/drivers/net/i40e/i40e_ethdev_vf.c > @@ -1336,8 +1336,9 @@ i40evf_handle_aq_msg(struct rte_eth_dev *dev) > struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); > struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); > struct i40e_arq_event_info info; > - struct i40e_virtchnl_msg *v_msg; > - uint16_t pending, opcode; > + uint16_t pending, aq_opc; > + enum i40e_virtchnl_ops msg_opc; > + enum i40e_status_code msg_ret; > int ret; > > info.buf_len = I40E_AQ_BUF_SZ; > @@ -1346,7 +1347,6 @@ i40evf_handle_aq_msg(struct rte_eth_dev *dev) > return; > } > info.msg_buf = vf->aq_resp; > - v_msg = (struct i40e_virtchnl_msg *)&info.desc; > > pending = 1; > while (pending) { > @@ -1357,32 +1357,35 @@ i40evf_handle_aq_msg(struct rte_eth_dev *dev) > "ret: %d", ret); > break; > } > - opcode = rte_le_to_cpu_16(info.desc.opcode); > - > - switch (opcode) { > + aq_opc = rte_le_to_cpu_16(info.desc.opcode); > + msg_opc = (enum i40e_virtchnl_ops)rte_le_to_cpu_32( > + info.desc.cookie_high); > + msg_ret = (enum i40e_status_code)rte_le_to_cpu_32( > + info.desc.cookie_low); What do you think commenting cookie_high is opcode and cookie_low is return_value? > + switch (aq_opc) { > case i40e_aqc_opc_send_msg_to_vf: > - if (v_msg->v_opcode == I40E_VIRTCHNL_OP_EVENT) > + if (msg_opc == I40E_VIRTCHNL_OP_EVENT) > /* process event*/ > i40evf_handle_pf_event(dev, info.msg_buf, > info.msg_len); > else { > /* read message and it's expected one */ > - if (v_msg->v_opcode == vf->pend_cmd) { > - vf->cmd_retval = v_msg->v_retval; > + if (msg_opc == vf->pend_cmd) { > + vf->cmd_retval = msg_ret; > /* prevent compiler reordering */ > rte_compiler_barrier(); > _clear_cmd(vf); > } else > PMD_DRV_LOG(ERR, "command mismatch," > "expect %u, get %u", > - vf->pend_cmd, v_msg->v_opcode); > + vf->pend_cmd, msg_ret); s/msg_ret/msg_opc/ ? > PMD_DRV_LOG(DEBUG, "adminq response is received," > - " opcode = %d\n", v_msg->v_opcode); > + " opcode = %d\n", msg_ret); s/msg_ret/msg_opc/ ? > } > break; > default: > PMD_DRV_LOG(ERR, "Request %u is not supported yet", > - opcode); > + aq_opc); > break; > } > } >