From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3CDD7A00C3; Sat, 16 May 2020 23:03:47 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DDAF31D6D0; Sat, 16 May 2020 23:03:40 +0200 (CEST) Received: from CNSHJSMIN05.NOKIA-SBELL.COM (cnshjsmin05.app.nokia-sbell.com [116.246.26.45]) by dpdk.org (Postfix) with ESMTP id D46321D927 for ; Fri, 15 May 2020 13:12:31 +0200 (CEST) X-AuditID: ac18929d-87fff7000001e41d-bf-5ebe791cd542 Received: from CNSHPPEXCH1610.nsn-intra.net (Unknown_Domain [135.251.51.110]) (using TLS with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client did not present a certificate) by CNSHJSMIN05.NOKIA-SBELL.COM (Symantec Messaging Gateway) with SMTP id A9.F5.58397.C197EBE5; Fri, 15 May 2020 19:12:28 +0800 (HKT) Received: from CNSHPPEXCH1601.nsn-intra.net (135.251.51.101) by CNSHPPEXCH1610.nsn-intra.net (135.251.51.110) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1847.3; Fri, 15 May 2020 19:12:27 +0800 Received: from CNSHPPEXCH1601.nsn-intra.net ([135.251.51.101]) by CNSHPPEXCH1601.nsn-intra.net ([135.251.51.101]) with mapi id 15.01.1847.007; Fri, 15 May 2020 19:12:27 +0800 From: "Yan, Xiaoping (NSB - CN/Hangzhou)" To: "dev@dpdk.org" Thread-Topic: incorrect vlan_tci in rte mbuf Thread-Index: AdYqp2VSjUoJKifNSDyWYgDBzswvoQ== Date: Fri, 15 May 2020 11:12:27 +0000 Message-ID: <301f18faf1184d7fb3b3958f1dbb1675@nokia-sbell.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [135.251.51.115] MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrFLMWRmVeSWpSXmKPExsXS/ts4T1emcl+cQdsmY4t3n7YzOTB6/Fqw lDWAMYrLJiU1J7MstUjfLoEr40PTBbaC2VkVi5duYWpgnBjTxcjJISFgIvFyyTLmLkYuDiGB Q0wSzzpWMoIkhAT+Mkr8bueESGxilJjy8iIbSIJNwEPixYmtzCC2iICixPSJk8HiwgLqEqfm L2ODiOtIPFh8hAnC1pNo3/gbLM4ioCpxcEEfaxcjBwevgJ3E1Cn+IGFGAVmJaY/ug5UzC4hL 3HoynwniOAGJJXvOM0PYohIvH/8Da5UQUJLo2wBVnirRvqAHzOYVEJQ4OfMJywRGoVlIJs1C UjYLSRlEXEdiwe5PbBC2tsSyha+ZYewzBx4zIYsvYGRfxSjt7Bfs4RXs6+lnYKrn5+/t6agb 7OTq46Pn7O+7iREYHWskJs3dwdg084PeIUYmDsZDjBIczEoivH7rd8cJ8aYkVlalFuXHF5Xm pBYfYpTmYFES511nvDJOSCA9sSQ1OzW1ILUIJsvEwSnVwFRu94m9rPnWpO1/DtmKJd9v2Nu0 X/HBqbfy/+eU6Thlu26ft86sf6L501PFgceyuAROtDOFijydeH2PyzZ/lx0iDx3Ucg6aK8iG bb+1eRs3q6vPXhspJ+OFr9oKxbh+Mj376Kxh3H9UctPEtOjgB9eZGfasltuuavmocJGu1eaw va8yv1Zt+j3j9cKfM+byfthxJ9XZhneqP+f5kP5VK28+8/s1KUPhzY+m4ud9R/gmKDBXrb/m 6S3DwqL0NW7WAu45yfWLJq4PNujgqlG40f7pwuLOnXVc2zWqhHcIRWzoee3NsfFL+dzQRUma LMzbU5Oljykdvfnk5U4nv95T84IYIrd/VvzOqbGQ5xOPw2olluKMREMt5qLiRADBC5Yd/QIA AA== X-Mailman-Approved-At: Sat, 16 May 2020 23:03:39 +0200 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: [dpdk-dev] incorrect vlan_tci in rte mbuf X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, I'm using i40e vf, dpdk 18.11, x86_64 CPU (rx function in use is i40e_recv_= scattered_pkts_vec_avx2) When enable hw vlan strip: * If packet fit in one mbuf segment, the vlan_tci field is correct * If packets are stored in several mbuf segment, the vlan_tci of last s= egment is correct, vlan_tci of other segments are invalid It seems i40e_recv_scattered_pkts has correctly set the vlan_tci, by callin= g i40e_rxd_to_vlan_tci(first_seg, &rxd); Is this a bug in i40e_recv_scattered_pkts_vec_avx2? (I didn't find setting vlan_tci for first segment, but it's a bit difficult= for me to understand codes in i40e_recv_scattered_pkts_vec_avx2, so I'm no= t quite sure) I checked the latest dpdk version 20.02 http://lxr.dpdk.org/dpdk/latest/sou= rce/drivers/net/i40e/i40e_rxtx_vec_avx2.c#L791 But seems no change for this. Any comment please? Thank you. ps lscpu log in case helpful: [cranuser2@controller-3 ~]$ lscpu Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 20 On-line CPU(s) list: 0-19 Thread(s) per core: 1 Core(s) per socket: 20 Socket(s): 1 NUMA node(s): 1 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 6148 CPU @ 2.40GHz Stepping: 4 CPU MHz: 1903.044 CPU max MHz: 2400.0000 CPU min MHz: 1000.0000 BogoMIPS: 4800.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 28160K NUMA node0 CPU(s): 0-19 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge m= ca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall n= x pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xt= opology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vm= x smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic m= ovbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowp= refetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single pti intel_ppin ssbd mb= a ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc= _adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx5= 12dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xs= aveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_lo= cal dtherm arat pln pts pku ospke md_clear flush_l1d Best regards Yan Xiaoping