From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id C94BBA04B5; Thu, 29 Oct 2020 06:53:31 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D688172E6; Thu, 29 Oct 2020 06:53:29 +0100 (CET) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id 3FAA872E5 for ; Thu, 29 Oct 2020 06:53:28 +0100 (CET) IronPort-SDR: HdnXKT8Kg3DHogfMc/kMOIUhEbhgW8hUcRRocSWxaD3C3QrI+StOTokMxayt/RQzr6ahJXGZEZ RPbecxVXgyOA== X-IronPort-AV: E=McAfee;i="6000,8403,9788"; a="253083798" X-IronPort-AV: E=Sophos;i="5.77,429,1596524400"; d="scan'208";a="253083798" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2020 22:53:26 -0700 IronPort-SDR: Gge6rSP6C+pXN7tyC+NFRXqgRKIYKB39VwFaY72XoDTyqYbQhV7QbMSjsmyC4WtV7Fw2gs3sx5 ob9h/ibyMN5g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,429,1596524400"; d="scan'208";a="526609952" Received: from fmsmsx604.amr.corp.intel.com ([10.18.126.84]) by fmsmga005.fm.intel.com with ESMTP; 28 Oct 2020 22:53:26 -0700 Received: from shsmsx603.ccr.corp.intel.com (10.109.6.143) by fmsmsx604.amr.corp.intel.com (10.18.126.84) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 28 Oct 2020 22:53:25 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX603.ccr.corp.intel.com (10.109.6.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Thu, 29 Oct 2020 13:53:23 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.1713.004; Thu, 29 Oct 2020 13:53:23 +0800 From: "Zhang, Qi Z" To: "Zhu, TaoX" , "Yang, Qiming" CC: "dev@dpdk.org" , "Zhu, TaoX" Thread-Topic: [PATCH v2] net/ice: support show RSS hash configuration Thread-Index: AQHWrbMRvYQ+h3Wy50COQybwO4rirqmuEvpg Date: Thu, 29 Oct 2020 05:53:23 +0000 Message-ID: <323100ffaa6741a6b304bc5e834c9f76@intel.com> References: <20201029050550.645-1-taox.zhu@intel.com> <20201029051129.784-1-taox.zhu@intel.com> In-Reply-To: <20201029051129.784-1-taox.zhu@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.5.1.3 dlp-product: dlpe-windows x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] net/ice: support show RSS hash configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: taox.zhu@intel.com > Sent: Thursday, October 29, 2020 1:11 PM > To: Yang, Qiming ; Zhang, Qi Z > > Cc: dev@dpdk.org; Zhu, TaoX > Subject: [PATCH v2] net/ice: support show RSS hash configuration >=20 > From: Zhu Tao >=20 > Implement interface 'ice_rss_hash_conf_get' to support show RSS hash > configuration. >=20 > Note: > Not support the same time setting RSS with RTE and classify API. Only return rss_hf from latest dev_configure or dev_rss_hash_update.=20 All configures from rte_flow are ignored. And better to add above notes in ice_rss_hash_conf_get also. Otherwise Acked-by: Qi Zhang >=20 > Signed-off-by: Zhu Tao > --- > drivers/net/ice/ice_ethdev.c | 15 +++++++++++++-- > drivers/net/ice/ice_ethdev.h | 1 + > 2 files changed, 14 insertions(+), 2 deletions(-) >=20 > v2 changes: > Committed log. >=20 > diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c = index > d51f3faba..ff8106317 100644 > --- a/drivers/net/ice/ice_ethdev.c > +++ b/drivers/net/ice/ice_ethdev.c > @@ -2923,6 +2923,16 @@ ice_rss_hash_set(struct ice_pf *pf, uint64_t rss_h= f) > struct ice_vsi *vsi =3D pf->main_vsi; > int ret; >=20 > +#define ICE_RSS_HF_ALL ( \ > + ETH_RSS_IPV4 | \ > + ETH_RSS_IPV6 | \ > + ETH_RSS_NONFRAG_IPV4_UDP | \ > + ETH_RSS_NONFRAG_IPV6_UDP | \ > + ETH_RSS_NONFRAG_IPV4_TCP | \ > + ETH_RSS_NONFRAG_IPV6_TCP | \ > + ETH_RSS_NONFRAG_IPV4_SCTP | \ > + ETH_RSS_NONFRAG_IPV6_SCTP) > + > /* Configure RSS for IPv4 with src/dst addr as input set */ > if (rss_hf & ETH_RSS_IPV4) { > ret =3D ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4, @@ > -3216,6 +3226,8 @@ ice_rss_hash_set(struct ice_pf *pf, uint64_t rss_hf) > PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6_SCTP rss flow fail %d", > __func__, ret); > } > + > + pf->rss_hf =3D rss_hf & ICE_RSS_HF_ALL; > } >=20 > static int ice_init_rss(struct ice_pf *pf) @@ -4439,8 +4451,7 @@ > ice_rss_hash_conf_get(struct rte_eth_dev *dev, > ice_get_rss_key(vsi, rss_conf->rss_key, > &rss_conf->rss_key_len); >=20 > - /* TODO: default set to 0 as hf config is not supported now */ > - rss_conf->rss_hf =3D 0; > + rss_conf->rss_hf =3D pf->rss_hf; > return 0; > } >=20 > diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h = index > 05218af05..452fd9050 100644 > --- a/drivers/net/ice/ice_ethdev.h > +++ b/drivers/net/ice/ice_ethdev.h > @@ -457,6 +457,7 @@ struct ice_pf { > uint64_t old_rx_bytes; > uint64_t old_tx_bytes; > uint64_t supported_rxdid; /* bitmap for supported RXDID */ > + uint64_t rss_hf; > }; >=20 > #define ICE_MAX_QUEUE_NUM 2048 > -- > 2.18.4