From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wg0-f53.google.com (mail-wg0-f53.google.com [74.125.82.53]) by dpdk.org (Postfix) with ESMTP id 386777EB0 for ; Thu, 4 Dec 2014 10:04:14 +0100 (CET) Received: by mail-wg0-f53.google.com with SMTP id l18so22122366wgh.12 for ; Thu, 04 Dec 2014 01:04:14 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:organization :user-agent:in-reply-to:references:mime-version :content-transfer-encoding:content-type; bh=BhUB7P8RhJ1Ym44JnRqHJ7eA5YXGHrQaXymu8D3Gz+I=; b=V7jPIz646hy4RzKBzJ+QTO2hIEK8zJCrODSoaITYZqYM6xRzVHJK9n26aWrk/HDwtq 539cqUsOQCsZMMeKpyTofI9hKWBTr3YGxBPxWGJ90H1KzC3akuFiQABpDAQ+oU0LgD/1 vBHjKDptqYtcci8n1ISwUfNdnJMN2hH47VTEHKpuAzcY3kdPzV/mepZUQzpC8lo/MaTp agxI4eC9SWc0gIfXAEiFQ+wIZ9QvoRthbT374sHlc4fX8FKqfi8t9FixVIadHGW3My2K p9+cRKSqznnDp9WVFDZAgqVVzAexsxnI9dL8ub16nPwuHaoL4zeKhjOjXlEEvXRxBzrL ZtLA== X-Gm-Message-State: ALoCoQmiE4PsZMLWqGE6RyNAIEOLoz9oAYlZwjlTlw3rKa3CMqT+SEb2owOPGdZCUHBzzy4uZbgB X-Received: by 10.180.96.42 with SMTP id dp10mr99392516wib.38.1417683854021; Thu, 04 Dec 2014 01:04:14 -0800 (PST) Received: from xps13.localnet (136-92-190-109.dsl.ovh.fr. [109.190.92.136]) by mx.google.com with ESMTPSA id qg11sm33588956wic.17.2014.12.04.01.04.12 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 04 Dec 2014 01:04:13 -0800 (PST) From: Thomas Monjalon To: "Qiu, Michael" Date: Thu, 04 Dec 2014 10:03:49 +0100 Message-ID: <3274707.l214P3fVjn@xps13> Organization: 6WIND User-Agent: KMail/4.14.3 (Linux/3.17.4-1-ARCH; KDE/4.14.3; x86_64; ; ) In-Reply-To: <533710CFB86FA344BFBF2D6802E60286C9C8C7@SHSMSX101.ccr.corp.intel.com> References: <1417329845-7482-1-git-send-email-michael.qiu@intel.com> <20141203154029.GA6340@bricha3-MOBL3> <533710CFB86FA344BFBF2D6802E60286C9C8C7@SHSMSX101.ccr.corp.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Cc: dev@dpdk.org, chaozhu@linux.vnet.ibm.com Subject: Re: [dpdk-dev] [PATCH v2] Fix two compile issues with i686 platform X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Dec 2014 09:04:14 -0000 2014-12-04 02:49, Qiu, Michael: > On 12/3/2014 11:40 PM, Richardson, Bruce wrote: > > On Wed, Dec 03, 2014 at 04:10:23PM +0800, Michael Qiu wrote: > >> lib/librte_eal/linuxapp/eal/eal_memory.c:324:4: error: comparison > >> is always false due to limited range of data type [-Werror=type-limits] > >> || (hugepage_sz == RTE_PGSIZE_16G)) { > >> ^ > >> cc1: all warnings being treated as errors > >> > >> lib/librte_eal/linuxapp/eal/eal.c(461): error #2259: non-pointer > >> conversion from "long long" to "void *" may lose significant bits > >> RTE_PTR_ALIGN_CEIL((uintptr_t)addr, RTE_PGSIZE_16M); > >> > >> This was introuduced by commit b77b5639: > >> mem: add huge page sizes for IBM Power > >> > >> The root cause is that size_t and uintptr_t are 32-bit in i686 > >> platform, but RTE_PGSIZE_16M and RTE_PGSIZE_16G are always 64-bit. > >> > >> Define RTE_PGSIZE_16G only in 64 bit platform to avoid > >> this issue. > >> > >> Signed-off-by: Michael Qiu > > Minor comment below. > > > > Acked-by: Bruce Richardson > > > >> --- > >> app/test/test_memzone.c | 18 ++++++++++++------ > >> lib/librte_eal/common/eal_common_memzone.c | 2 ++ > >> lib/librte_eal/common/include/rte_memory.h | 14 ++++++++------ > >> lib/librte_eal/linuxapp/eal/eal_memory.c | 12 +++++------- > >> 4 files changed, 27 insertions(+), 19 deletions(-) > >> > > ... snip ... > >> --- a/lib/librte_eal/common/include/rte_memory.h > >> +++ b/lib/librte_eal/common/include/rte_memory.h > >> @@ -53,12 +53,14 @@ extern "C" { > >> #endif > >> > >> enum rte_page_sizes { > >> - RTE_PGSIZE_4K = 1ULL << 12, > >> - RTE_PGSIZE_2M = 1ULL << 21, > >> - RTE_PGSIZE_1G = 1ULL << 30, > >> - RTE_PGSIZE_64K = 1ULL << 16, > >> - RTE_PGSIZE_16M = 1ULL << 24, > >> - RTE_PGSIZE_16G = 1ULL << 34 > >> + RTE_PGSIZE_4K = 1UL << 12, > >> + RTE_PGSIZE_2M = 1UL << 21, > >> + RTE_PGSIZE_1G = 1UL << 30, > >> + RTE_PGSIZE_64K = 1UL << 16, > >> + RTE_PGSIZE_16M = 1UL << 24, > >> +#ifdef RTE_ARCH_64 > >> + RTE_PGSIZE_16G = 1ULL << 34 > > you don't need the "LL" here as long type is 64-bits on 64-bit systems. Changing > > it to 1UL << 34 will keep all entries consistent. > > Hi Thomas, > > Should I resend V3 patch to modify this or you can do it when you plan > to merge this patch? I could do the change by myself. But given that you had some problems to send the patch to the mailing list, please send the v3 to everyone. Then a review from Chao would be appreciated. Thanks -- Thomas