Re: [PATCH v8 4/5] ethdev: format module EEPROM for SFF-8472

[Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>]

On 5/25/22 06:14, Robin Zhang wrote:
> This patch implements format module EEPROM information for
> SFF-8472 Rev 12.0
> 
> Signed-off-by: Robin Zhang <robinx.zhang@intel.com>

[snip]

> diff --git a/lib/ethdev/sff_8472.c b/lib/ethdev/sff_8472.c
> new file mode 100644
> index 0000000000..98e31e9262
> --- /dev/null
> +++ b/lib/ethdev/sff_8472.c
> @@ -0,0 +1,286 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2022 Intel Corporation
> + *
> + * Implements SFF-8472 optics diagnostics.
> + *
> + */
> +
> +#include <stdio.h>
> +#include <math.h>
> +#include <rte_mbuf.h>
> +#include <rte_ethdev.h>
> +#include <rte_flow.h>
> +#include "sff_common.h"
> +#include "ethdev_sff_telemetry.h"

Please, fix includes in accordance with previous patches
review notes.

> +
> +/* Offsets in decimal, for direct comparison with the SFF specs */
> +
> +/* A0-based EEPROM offsets for DOM support checks */
> +#define SFF_A0_DOM                        92
> +#define SFF_A0_OPTIONS                    93
> +#define SFF_A0_COMP                       94
> +
> +/* EEPROM bit values for various registers */
> +#define SFF_A0_DOM_EXTCAL                 (1 << 4)
> +#define SFF_A0_DOM_INTCAL                 (1 << 5)
> +#define SFF_A0_DOM_IMPL                   (1 << 6)
> +#define SFF_A0_DOM_PWRT                   (1 << 3)
> +
> +#define SFF_A0_OPTIONS_AW                 (1 << 7)

RTE_BIT32 ?

> +
> +/*
> + * This is the offset at which the A2 page is in the EEPROM
> + * blob returned by the kernel.
> + */
> +#define SFF_A2_BASE                       0x100
> +
> +/* A2-based offsets for DOM */
> +#define SFF_A2_TEMP                       96
> +#define SFF_A2_TEMP_HALRM                 0
> +#define SFF_A2_TEMP_LALRM                 2
> +#define SFF_A2_TEMP_HWARN                 4
> +#define SFF_A2_TEMP_LWARN                 6
> +
> +#define SFF_A2_VCC                        98
> +#define SFF_A2_VCC_HALRM                  8
> +#define SFF_A2_VCC_LALRM                  10
> +#define SFF_A2_VCC_HWARN                  12
> +#define SFF_A2_VCC_LWARN                  14
> +
> +#define SFF_A2_BIAS                       100
> +#define SFF_A2_BIAS_HALRM                 16
> +#define SFF_A2_BIAS_LALRM                 18
> +#define SFF_A2_BIAS_HWARN                 20
> +#define SFF_A2_BIAS_LWARN                 22
> +
> +#define SFF_A2_TX_PWR                     102
> +#define SFF_A2_TX_PWR_HALRM               24
> +#define SFF_A2_TX_PWR_LALRM               26
> +#define SFF_A2_TX_PWR_HWARN               28
> +#define SFF_A2_TX_PWR_LWARN               30
> +
> +#define SFF_A2_RX_PWR                     104
> +#define SFF_A2_RX_PWR_HALRM               32
> +#define SFF_A2_RX_PWR_LALRM               34
> +#define SFF_A2_RX_PWR_HWARN               36
> +#define SFF_A2_RX_PWR_LWARN               38
> +
> +#define SFF_A2_ALRM_FLG                   112
> +#define SFF_A2_WARN_FLG                   116
> +
> +/* 32-bit little-endian calibration constants */
> +#define SFF_A2_CAL_RXPWR4                 56
> +#define SFF_A2_CAL_RXPWR3                 60
> +#define SFF_A2_CAL_RXPWR2                 64
> +#define SFF_A2_CAL_RXPWR1                 68
> +#define SFF_A2_CAL_RXPWR0                 72
> +
> +/* 16-bit little endian calibration constants */
> +#define SFF_A2_CAL_TXI_SLP                76
> +#define SFF_A2_CAL_TXI_OFF                78
> +#define SFF_A2_CAL_TXPWR_SLP              80
> +#define SFF_A2_CAL_TXPWR_OFF              82
> +#define SFF_A2_CAL_T_SLP                  84
> +#define SFF_A2_CAL_T_OFF                  86
> +#define SFF_A2_CAL_V_SLP                  88
> +#define SFF_A2_CAL_V_OFF                  90
> +
> +static struct sff_8472_aw_flags {
> +	const char *str;        /* Human-readable string, null at the end */
> +	int offset;             /* A2-relative address offset */
> +	uint8_t value;          /* Alarm is on if (offset & value) != 0. */
> +} sff_8472_aw_flags[] = {
> +	{ "Laser bias current high alarm",   SFF_A2_ALRM_FLG, (1 << 3) },

RTE_BIT32 here and below?

> +	{ "Laser bias current low alarm",    SFF_A2_ALRM_FLG, (1 << 2) },
> +	{ "Laser bias current high warning", SFF_A2_WARN_FLG, (1 << 3) },
> +	{ "Laser bias current low warning",  SFF_A2_WARN_FLG, (1 << 2) },
> +
> +	{ "Laser output power high alarm",   SFF_A2_ALRM_FLG, (1 << 1) },
> +	{ "Laser output power low alarm",    SFF_A2_ALRM_FLG, (1 << 0) },
> +	{ "Laser output power high warning", SFF_A2_WARN_FLG, (1 << 1) },
> +	{ "Laser output power low warning",  SFF_A2_WARN_FLG, (1 << 0) },
> +
> +	{ "Module temperature high alarm",   SFF_A2_ALRM_FLG, (1 << 7) },
> +	{ "Module temperature low alarm",    SFF_A2_ALRM_FLG, (1 << 6) },
> +	{ "Module temperature high warning", SFF_A2_WARN_FLG, (1 << 7) },
> +	{ "Module temperature low warning",  SFF_A2_WARN_FLG, (1 << 6) },
> +
> +	{ "Module voltage high alarm",   SFF_A2_ALRM_FLG, (1 << 5) },
> +	{ "Module voltage low alarm",    SFF_A2_ALRM_FLG, (1 << 4) },
> +	{ "Module voltage high warning", SFF_A2_WARN_FLG, (1 << 5) },
> +	{ "Module voltage low warning",  SFF_A2_WARN_FLG, (1 << 4) },
> +
> +	{ "Laser rx power high alarm",   SFF_A2_ALRM_FLG + 1, (1 << 7) },
> +	{ "Laser rx power low alarm",    SFF_A2_ALRM_FLG + 1, (1 << 6) },
> +	{ "Laser rx power high warning", SFF_A2_WARN_FLG + 1, (1 << 7) },
> +	{ "Laser rx power low warning",  SFF_A2_WARN_FLG + 1, (1 << 6) },
> +
> +	{ NULL, 0, 0 },
> +};