From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: <fiona.trahe@intel.com> Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 7D2EA558B for <dev@dpdk.org>; Wed, 12 Oct 2016 20:26:10 +0200 (CEST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP; 12 Oct 2016 11:26:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,336,1473145200"; d="scan'208";a="889358937" Received: from irsmsx104.ger.corp.intel.com ([163.33.3.159]) by orsmga003.jf.intel.com with ESMTP; 12 Oct 2016 11:26:08 -0700 Received: from irsmsx101.ger.corp.intel.com ([169.254.1.224]) by IRSMSX104.ger.corp.intel.com ([163.33.3.159]) with mapi id 14.03.0248.002; Wed, 12 Oct 2016 19:26:07 +0100 From: "Trahe, Fiona" <fiona.trahe@intel.com> To: "akhil.goyal@nxp.com" <akhil.goyal@nxp.com>, "Kusztal, ArkadiuszX" <arkadiuszx.kusztal@intel.com>, "Doherty, Declan" <declan.doherty@intel.com> CC: "Griffin, John" <john.griffin@intel.com>, "Jain, Deepak K" <deepak.k.jain@intel.com>, "dev@dpdk.org" <dev@dpdk.org>, "Trahe, Fiona" <fiona.trahe@intel.com> Thread-Topic: [PATCH v3] test_cryptodev_perf: IV and digest should be stored at a DMAeble address Thread-Index: AQHSJExSodYxnB0/00eRwtMm7ULQcqClIy7g Date: Wed, 12 Oct 2016 18:26:06 +0000 Message-ID: <348A99DA5F5B7549AA880327E580B435890F1832@IRSMSX101.ger.corp.intel.com> References: <20161007170608.27685-1-akhil.goyal@nxp.com> <20161012111629.14126-1-akhil.goyal@nxp.com> In-Reply-To: <20161012111629.14126-1-akhil.goyal@nxp.com> Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYzkzZTMxZWEtZTQzYS00ZTk1LWE0NDEtNTBmNmEwNjFiODBiIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6Ik1XXC9pYmlRd2ZVQzdzdCsxRGFRUE5VM2ltWjg0dFRtS1F1bElNK0RqblwvST0ifQ== x-ctpclassification: CTP_IC x-originating-ip: [163.33.239.181] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3] test_cryptodev_perf: IV and digest should be stored at a DMAeble address X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK <dev.dpdk.org> List-Unsubscribe: <http://dpdk.org/ml/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://dpdk.org/ml/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <http://dpdk.org/ml/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> X-List-Received-Date: Wed, 12 Oct 2016 18:26:10 -0000 > -----Original Message----- > From: akhil.goyal@nxp.com [mailto:akhil.goyal@nxp.com] > Sent: Wednesday, October 12, 2016 12:16 PM > To: Kusztal, ArkadiuszX <arkadiuszx.kusztal@intel.com>; Doherty, Declan > <declan.doherty@intel.com> > Cc: Griffin, John <john.griffin@intel.com>; Trahe, Fiona > <fiona.trahe@intel.com>; Jain, Deepak K <deepak.k.jain@intel.com>; > dev@dpdk.org; Akhil Goyal <akhil.goyal@nxp.com> > Subject: [PATCH v3] test_cryptodev_perf: IV and digest should be stored a= t a > DMAeble address >=20 > From: Akhil Goyal <akhil.goyal@nxp.com> >=20 > For physical crypto devices, IV and digest are processed by the crypto de= vice > which need the contents to be written on some DMA able address. >=20 > So in order to do that, IV and digest are accomodated in the packet. >=20 > Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com> > v2: patch rebased > v3: fix broken compilation > --- > app/test/test_cryptodev_perf.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) >=20 > diff --git a/app/test/test_cryptodev_perf.c b/app/test/test_cryptodev_per= f.c > index 4aee9af..d498195 100644 > --- a/app/test/test_cryptodev_perf.c > +++ b/app/test/test_cryptodev_perf.c > @@ -2722,9 +2722,12 @@ test_perf_set_crypto_op_aes(struct > rte_crypto_op *op, struct rte_mbuf *m, > op->sym->auth.aad.length =3D AES_CIPHER_IV_LENGTH; >=20 > /* Cipher Parameters */ > - op->sym->cipher.iv.data =3D aes_iv; > + op->sym->cipher.iv.data =3D (uint8_t *)m->buf_addr + m->data_off; > + op->sym->cipher.iv.phys_addr =3D rte_pktmbuf_mtophys(m); > op->sym->cipher.iv.length =3D AES_CIPHER_IV_LENGTH; >=20 > + rte_memcpy(op->sym->cipher.iv.data, aes_iv, > AES_CIPHER_IV_LENGTH); > + > /* Data lengths/offsets Parameters */ > op->sym->auth.data.offset =3D 0; > op->sym->auth.data.length =3D data_len; > @@ -2893,7 +2896,9 @@ test_perf_aes_sha(uint8_t dev_id, uint16_t > queue_id, > rte_pktmbuf_free(mbufs[k]); > return -1; > } > - > + /* Make room for Digest and IV in mbuf */ > + rte_pktmbuf_append(mbufs[i], digest_length); > + rte_pktmbuf_prepend(mbufs[i], AES_CIPHER_IV_LENGTH); > } >=20 >=20 > -- > 2.9.3 Acked-by: Fiona Trahe <fiona.trahe@intel.com>