From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id D4BD1AAD3 for ; Tue, 8 May 2018 17:00:05 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 May 2018 08:00:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,378,1520924400"; d="scan'208";a="44174566" Received: from irsmsx110.ger.corp.intel.com ([163.33.3.25]) by fmsmga002.fm.intel.com with ESMTP; 08 May 2018 08:00:02 -0700 Received: from irsmsx155.ger.corp.intel.com (163.33.192.3) by irsmsx110.ger.corp.intel.com (163.33.3.25) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 8 May 2018 16:00:01 +0100 Received: from irsmsx103.ger.corp.intel.com ([169.254.3.179]) by irsmsx155.ger.corp.intel.com ([169.254.14.95]) with mapi id 14.03.0319.002; Tue, 8 May 2018 16:00:01 +0100 From: "Trahe, Fiona" To: Shally Verma , "De Lara Guarch, Pablo" CC: "Doherty, Declan" , "pathreya@caviumnetworks.com" , "ssahu@caviumnetworks.com" , "agupta@caviumnetworks.com" , "dev@dpdk.org" , Sunila Sahu , Ashish Gupta Thread-Topic: [PATCH v2 3/6] lib/cryptodev: add asymmetric crypto capability in cryptodev Thread-Index: AQHTzNDpo41mSZcvpUaMkqak3OhOyqQmHpLw Date: Tue, 8 May 2018 15:00:00 +0000 Message-ID: <348A99DA5F5B7549AA880327E580B4358947CD5D@IRSMSX103.ger.corp.intel.com> References: <1522927489-23668-1-git-send-email-shally.verma@caviumnetworks.com> <1522927489-23668-4-git-send-email-shally.verma@caviumnetworks.com> In-Reply-To: <1522927489-23668-4-git-send-email-shally.verma@caviumnetworks.com> Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMzAyOTZiNWEtMmU4Mi00MGFiLWFhOTAtMzMxMDVmOGYxYzEwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6Inh2Z09STXdTMHhKXC8yYTNSMDg5SkNDeitURlJzcGdsb2FmTzdTU01leUl3PSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.200.100 dlp-reaction: no-action x-originating-ip: [163.33.239.182] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 3/6] lib/cryptodev: add asymmetric crypto capability in cryptodev X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 08 May 2018 15:00:06 -0000 Hi Shally, > -----Original Message----- > From: Shally Verma [mailto:shally.verma@caviumnetworks.com] > Sent: Thursday, April 5, 2018 12:25 PM > To: De Lara Guarch, Pablo > Cc: Doherty, Declan ; Trahe, Fiona ; > pathreya@caviumnetworks.com; ssahu@caviumnetworks.com; agupta@caviumnetwo= rks.com; > dev@dpdk.org; Sunila Sahu ; Ashish Gupta > > Subject: [PATCH v2 3/6] lib/cryptodev: add asymmetric crypto capability i= n cryptodev >=20 > Extend cryptodev with asymmetric capability APIs and > definitions. >=20 > Signed-off-by: Shally Verma > Signed-off-by: Sunila Sahu > Signed-off-by: Ashish Gupta >=20 > --- /// snip /// > +int __rte_experimental > +rte_cryptodev_asym_xfrm_capability_check_modlen( > + const struct rte_cryptodev_asymmetric_xfrm_capability *capability, > + uint16_t modlen) > +{ > + /* handle special case of 0 which mean PMD define no limit defined */ [Fiona] grammar. Maybe "which means PMD doesn't define any limit" > + if ((capability->modlen.min !=3D 0) && > + ((modlen < capability->modlen.min) || > + (capability->modlen.increment !=3D 0 && > + (modlen % (capability->modlen.increment))))) > + return -1; > + if ((capability->modlen.max !=3D 0) && > + ((modlen > capability->modlen.max) || > + (capability->modlen.increment !=3D 0 && > + (modlen % (capability->modlen.increment))))) > + return -1; > + > + return 0; > +} > + >=20 > const char * > rte_cryptodev_get_feature_name(uint64_t flag) > diff --git a/lib/librte_cryptodev/rte_cryptodev.h b/lib/librte_cryptodev/= rte_cryptodev.h > index 68d1ae1..deae3d6 100644 > --- a/lib/librte_cryptodev/rte_cryptodev.h > +++ b/lib/librte_cryptodev/rte_cryptodev.h > @@ -178,6 +178,37 @@ struct rte_cryptodev_symmetric_capability { > }; > }; >=20 > +/** > + * Asymmetric Xform Crypto Capability > + * > + */ > +struct rte_cryptodev_asymmetric_xfrm_capability { > + enum rte_crypto_asym_xform_type xform_type; > + /**< Transform type: RSA/MODEXP/DH/DSA/MODINV */ > + > + uint32_t op_types; > + /**< bitmask for supported rte_crypto_asym_op_type */ > + > + __extension__ > + union { > + struct rte_crypto_param_range modlen; > + /**< Range of modulus length supported by modulus based xform. > + * Value 0 mean implementation default > + */ > + }; > +}; > + > +/** > + * Asymmetric Crypto Capability > + * > + */ > +struct rte_cryptodev_asymmetric_capability { > + enum rte_crypto_asym_xform_type xform_type; > + /**< Transform type: RSA/MODEXP/DH/DSA/MODINV */ > + struct rte_cryptodev_asymmetric_xfrm_capability xfrm_capa; > +}; [Fiona] Is it necessary to have xform_type in both above structures? Seems like duplication. Or would it be better if both are combined into 1 s= truct? > + > + > /** Structure used to capture a capability of a crypto device */ > struct rte_cryptodev_capabilities { > enum rte_crypto_op_type op; > @@ -187,6 +218,8 @@ struct rte_cryptodev_capabilities { > union { > struct rte_cryptodev_symmetric_capability sym; > /**< Symmetric operation capability parameters */ > + struct rte_cryptodev_asymmetric_capability asym; > + /**< Asymmetric operation capability parameters */ > }; > }; /// snip ///