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From: "Trahe, Fiona" <fiona.trahe@intel.com>
To: Dmitry Eremin-Solenikov <dmitry.ereminsolenikov@linaro.org>,
	"dev@dpdk.org" <dev@dpdk.org>
Cc: "Trahe, Fiona" <fiona.trahe@intel.com>
Subject: Re: [dpdk-dev] [PATCH] qat: fix checks for 3gpp algorithms vs bit mode
Date: Wed, 11 Jul 2018 18:04:15 +0000	[thread overview]
Message-ID: <348A99DA5F5B7549AA880327E580B435895D816A@IRSMSX101.ger.corp.intel.com> (raw)
In-Reply-To: <20180711122432.14658-1-dmitry.ereminsolenikov@linaro.org>

Hi Dmitri,

Thanks for debugging this. 
However the below fix can truncate the data - I'll send an alternative fix shortly.
Fiona

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Dmitry Eremin-Solenikov
> Sent: Wednesday, July 11, 2018 1:25 PM
> To: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH] qat: fix checks for 3gpp algorithms vs bit mode
> 
> QAT driver checks byte alignment for KASUMI/SNOW 3G/ZUC algorithms using
> cipher/auth_param, which are not initialized at this moment yet. Use
> operation params instead.
> 
> Signed-off-by: Dmitry Eremin-Solenikov <dmitry.ereminsolenikov@linaro.org>
> ---
>  drivers/crypto/qat/qat_sym.c | 22 +++++++++++-----------
>  1 file changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c
> index 17d63eb1ee35..0ede2c23d54f 100644
> --- a/drivers/crypto/qat/qat_sym.c
> +++ b/drivers/crypto/qat/qat_sym.c
> @@ -224,18 +224,16 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,
>  			ctx->qat_cipher_alg ==
>  				ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3) {
> 
> -			if (unlikely(
> -				(cipher_param->cipher_length % BYTE_LENGTH != 0)
> -				 || (cipher_param->cipher_offset
> -							% BYTE_LENGTH != 0))) {
> +			cipher_len = op->sym->cipher.data.length >> 3;
> +			cipher_ofs = op->sym->cipher.data.offset >> 3;
> +
> +			if (unlikely((cipher_len % BYTE_LENGTH != 0)
> +				|| (cipher_ofs % BYTE_LENGTH != 0))) {
>  				QAT_DP_LOG(ERR,
>  		  "SNOW3G/KASUMI/ZUC in QAT PMD only supports byte aligned values");
>  				op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
>  				return -EINVAL;
>  			}
> -			cipher_len = op->sym->cipher.data.length >> 3;
> -			cipher_ofs = op->sym->cipher.data.offset >> 3;
> -
>  		} else if (ctx->bpi_ctx) {
>  			/* DOCSIS - only send complete blocks to device
>  			 * Process any partial block using CFB mode.
> @@ -260,15 +258,17 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,
>  			ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9 ||
>  			ctx->qat_hash_alg ==
>  				ICP_QAT_HW_AUTH_ALGO_ZUC_3G_128_EIA3) {
> -			if (unlikely((auth_param->auth_off % BYTE_LENGTH != 0)
> -				|| (auth_param->auth_len % BYTE_LENGTH != 0))) {
> +
> +			auth_ofs = op->sym->auth.data.offset >> 3;
> +			auth_len = op->sym->auth.data.length >> 3;
> +
> +			if (unlikely((auth_off % BYTE_LENGTH != 0)
> +				|| (auth_len % BYTE_LENGTH != 0))) {
>  				QAT_DP_LOG(ERR,
>  		"For SNOW3G/KASUMI/ZUC, QAT PMD only supports byte aligned values");
>  				op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
>  				return -EINVAL;
>  			}
> -			auth_ofs = op->sym->auth.data.offset >> 3;
> -			auth_len = op->sym->auth.data.length >> 3;
> 
>  			auth_param->u1.aad_adr =
>  					rte_crypto_op_ctophys_offset(op,
> --
> 2.18.0

  parent reply	other threads:[~2018-07-11 18:04 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-11 12:24 Dmitry Eremin-Solenikov
2018-07-11 18:02 ` [dpdk-dev] [PATCH v2] crypto/qat: fix checks for 3gpp algo bit params Fiona Trahe
2018-07-12  8:19   ` Dmitry Eremin-Solenikov
2018-07-13 14:15   ` De Lara Guarch, Pablo
2018-07-13 14:31     ` De Lara Guarch, Pablo
2018-07-11 18:04 ` Trahe, Fiona [this message]
2018-07-13 13:02   ` [dpdk-dev] [PATCH] qat: fix checks for 3gpp algorithms vs bit mode De Lara Guarch, Pablo

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