From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E795943B08; Tue, 13 Feb 2024 16:14:33 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BF1FD402D8; Tue, 13 Feb 2024 16:14:33 +0100 (CET) Received: from fout5-smtp.messagingengine.com (fout5-smtp.messagingengine.com [103.168.172.148]) by mails.dpdk.org (Postfix) with ESMTP id AC54B40294; Tue, 13 Feb 2024 16:14:31 +0100 (CET) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailfout.nyi.internal (Postfix) with ESMTP id 1E01013800D2; Tue, 13 Feb 2024 10:14:31 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute4.internal (MEProxy); Tue, 13 Feb 2024 10:14:31 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to; s=fm3; t=1707837271; x=1707923671; bh=Oz4VfzY7DYtdGz9qwDQlIP2KaKWD+2a5ETUZHnvnutk=; b= gpZvuCcBLbQZHLUGi3C+2JHi2bnykYQFNMgj+DDnrxUMbrYlUJI1YHSLuW5MBpaO +ok116fq62Sg/VuCiA87bSz1FdURPp1YxLS8pb8lEHnRdWdoq7o8fN5QoYhQoncg yNOfbqGd3dar/B0tj+XwC2cMCtJ4ldrOjeqMZhnucfAYnsnIaF4H587H8yiQxCWQ fDifKqy5xT/fm06zogo9WfuDUABE3FWw4VJVAt3wkRhceCr0wv0m2xaIL2YL72DL RWWBbVt9FVceW+uFxEM/e6+QGKLhgUujgzw66n7Hv0A1NyCce/ut5rpzTvAdZ8hu hbx1xcYBsNX7V+oNhRjfDg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm3; t=1707837271; x= 1707923671; bh=Oz4VfzY7DYtdGz9qwDQlIP2KaKWD+2a5ETUZHnvnutk=; b=w Yb7bok/uv6PEZ2szIohy6BnP4aFLxiGL09u2ja0zmVrzS7c3GIwNuTkjvKKcxSFu LOEQHAONJmoWaoRheBfUYH7lkKXxrss15d2qiWoSSxgkD+aWCZJ5GVePpTHffW+Q KN4UNdq/FGuODnzLLg6ERobhzPQ9WrwHjSPezyugqKuAzd8yIwSSsC07F93zpE2B J8/RJLJ3Booz+uhHMLABKuXju7hh3UFlG66rO2uiEgUm0os5W0Ifew0x/iPThXR/ XCQdNVwQrDRKWLKrvj2DLxlywrszIqxjQt5ZNraVWPoeBH/WoCDfr8Yl2a4ZsqqG D5KJ1jcA5Ds1kV8er1G3A== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrudehgdejgecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvfevufffkfgjfhgggfgtsehtufertddttddvnecuhfhrohhmpefvhhhomhgr shcuofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecugg ftrfgrthhtvghrnheptdejieeifeehtdffgfdvleetueeffeehueejgfeuteeftddtieek gfekudehtdfgnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepthhhohhmrghssehmohhnjhgrlhhonhdrnhgvth X-ME-Proxy: Feedback-ID: i47234305:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Tue, 13 Feb 2024 10:14:29 -0500 (EST) From: Thomas Monjalon To: Sivaprasad Tummala Cc: bruce.richardson@intel.com, konstantin.v.ananyev@yandex.ru, dev@dpdk.org, david.marchand@redhat.com, jerin.jacob@caviumnetworks.com, stable@dpdk.org, Ferruh Yigit , Morten =?ISO-8859-1?Q?Br=F8rup?= , Tyler Retzlaff Subject: Re: [PATCH v2] eal/x86: add AMD vendor check to choose TSC calibration Date: Tue, 13 Feb 2024 16:14:27 +0100 Message-ID: <3542447.usQuhbGJ8B@thomas> In-Reply-To: References: <20231109052820.2129745-1-sivaprasad.tummala@amd.com> <20231123072730.22948-1-sivaprasad.tummala@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 23/11/2023 11:29, Ferruh Yigit: > On 11/23/2023 7:27 AM, Sivaprasad Tummala wrote: > > AMD Epyc processors doesn't support get_tsc_freq_arch(). > > The patch allows graceful return to allow fallback to > > alternate TSC calibration. > > > > Fixes: 3dbc565e81a0 ("timer: honor arch-specific TSC frequency query") > > Cc: jerin.jacob@caviumnetworks.com > > Cc: stable@dpdk.org > > > > Signed-off-by: Sivaprasad Tummala > > Acked-by: Ferruh Yigit Applied I don't want to block longer this fix, but I am not satisfied with the implementation. David, Ferruh, Bruce and Morten were proposing some abstractions for CPU features identification. I think we should start a new enum in rte_cpuflags.h defining some common CPU features, example is timer calibration here. The function get_tsc_freq_arch() was already doing some __cpuid calls, so it's one more, but please could you work on abstracting it in EAL? Thank you