From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 439F537B4 for ; Fri, 10 Mar 2017 19:37:42 +0100 (CET) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Mar 2017 10:37:34 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,142,1486454400"; d="scan'208";a="75217525" Received: from irsmsx103.ger.corp.intel.com ([163.33.3.157]) by fmsmga006.fm.intel.com with ESMTP; 10 Mar 2017 10:37:33 -0800 Received: from irsmsx156.ger.corp.intel.com (10.108.20.68) by IRSMSX103.ger.corp.intel.com (163.33.3.157) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 10 Mar 2017 18:37:32 +0000 Received: from irsmsx108.ger.corp.intel.com ([169.254.11.173]) by IRSMSX156.ger.corp.intel.com ([169.254.3.104]) with mapi id 14.03.0248.002; Fri, 10 Mar 2017 18:37:32 +0000 From: "Dumitrescu, Cristian" To: "O'Driscoll, Tim" , Thomas Monjalon CC: "dev@dpdk.org" , "jerin.jacob@caviumnetworks.com" , "balasubramanian.manoharan@cavium.com" , "hemant.agrawal@nxp.com" , "shreyansh.jain@nxp.com" , "Wiles, Keith" , "Richardson, Bruce" Thread-Topic: [PATCH v3 2/2] ethdev: add hierarchical scheduler API Thread-Index: AQHSlmXkX5aIvTYL1U6GZzZccGSDv6GIAuLQgAA63gCAAYJR4IAA9luAgAOvgTA= Date: Fri, 10 Mar 2017 18:37:30 +0000 Message-ID: <3EB4FA525960D640B5BDFFD6A3D891265275E105@IRSMSX108.ger.corp.intel.com> References: <1488589820-206947-1-git-send-email-cristian.dumitrescu@intel.com> <6158991.OypYtkqGNY@xps13> <3EB4FA525960D640B5BDFFD6A3D891265275A053@IRSMSX108.ger.corp.intel.com> <3752751.fl3uBnnZGo@xps13> <3EB4FA525960D640B5BDFFD6A3D891265275BDC0@IRSMSX108.ger.corp.intel.com> <26FA93C7ED1EAA44AB77D62FBE1D27BA7231952B@IRSMSX108.ger.corp.intel.com> In-Reply-To: <26FA93C7ED1EAA44AB77D62FBE1D27BA7231952B@IRSMSX108.ger.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYWM2MTkwNjUtMjM0NC00OGUzLWFjOWItNzA3YjJjMTBjZDQzIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6ImdGS0QrcXhDYXR6Q2pJcHBOSGFKSmZXMldkTGs2OWczNE1kclRvYWRKQ3c9In0= x-ctpclassification: CTP_IC x-originating-ip: [163.33.239.181] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 2/2] ethdev: add hierarchical scheduler API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Mar 2017 18:37:42 -0000 > -----Original Message----- > From: O'Driscoll, Tim > Sent: Wednesday, March 8, 2017 9:52 AM > To: Dumitrescu, Cristian ; Thomas Monjalon > > Cc: dev@dpdk.org; jerin.jacob@caviumnetworks.com; > balasubramanian.manoharan@cavium.com; hemant.agrawal@nxp.com; > shreyansh.jain@nxp.com; Wiles, Keith ; Richardson, > Bruce > Subject: RE: [PATCH v3 2/2] ethdev: add hierarchical scheduler API >=20 > > From: Dumitrescu, Cristian > > ... > > > OK I better understand now. > > > You should add this level of explanation in your patch. > > > > > > However I am reluctant to add an API if there is no user. > > > I think we should wait to have at least one existing driver > > implementing > > > this API before integrating it. > > > It was the approach of eventdev which has a dedicated next- tree. > > > > The next-tree solution could work, but IMO is not the best for this > > case, as this is purely driver development. This is just a TX offload > > feature that is well understood, as opposed to a new library with a hug= e > > design effort required like eventdev. > > > > I think we are reasonably close to get agreement on the API from Cavium= , > > Intel and NXP. When this is done, how about including it in DPDK with > > the experimental tag attached to it until several drivers implement it? > > > > From Intel side, there are solid plans to implement it for ixgbe and > > i40e drivers in next DPDK releases, I am CC-ing Tim to confirm this. >=20 > That's correct. We plan to add support for this in the ixgbe and i40e dri= vers in > 17.08. Thomas, given Tim's confirmation of Intel's plans to implement this API for= the ixgbe and i40e drivers in DPDK release 17.8, are you in favour of incl= uding this API in 17.5 with experimental tag (subject to full API agreement= being reached)? IMO this approach has the advantage of showing that API agreement has been = reached and driver development is in progress. Having it in DPDK is also a = better way to advertise this API to the developers that would otherwise be = unaware about this effort. >=20 > > On > > Cavium and NXP side, Jerin and Hemant can comment on the plans to > > implement this API.