From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id AE36223D for ; Fri, 5 Oct 2018 14:18:30 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Oct 2018 05:18:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,344,1534834800"; d="scan'208";a="94890525" Received: from aburakov-mobl1.ger.corp.intel.com (HELO [10.252.17.112]) ([10.252.17.112]) by fmsmga004.fm.intel.com with ESMTP; 05 Oct 2018 05:18:29 -0700 To: Alejandro Lucero , dev@dpdk.org References: <1538741212-7922-1-git-send-email-alejandro.lucero@netronome.com> <1538741212-7922-5-git-send-email-alejandro.lucero@netronome.com> From: "Burakov, Anatoly" Message-ID: <3f0c0853-4ec6-152f-7787-d01f6efd3466@intel.com> Date: Fri, 5 Oct 2018 13:18:28 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <1538741212-7922-5-git-send-email-alejandro.lucero@netronome.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v2 4/6] bus/pci: use IOVAs dmak mask check when setting IOVA mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Oct 2018 12:18:31 -0000 On 05-Oct-18 1:06 PM, Alejandro Lucero wrote: > Currently the code precludes IOVA mode if IOMMU hardware reports > less addressing bits than necessary for full virtual memory range. > > Although VT-d emulation currently only supports 39 bits, it could > be iovas for allocated memlory being within that supported range. ^^ memory > This patch allows IOVA mode in such a case adding a call to > rte_eal_check_dma_mask using the reported addressing bits by the > IOMMU hardware. > > Indeed, memory initialization code has been modified for using lower > virtual addresses than those used by the kernel for 64 bits processes > by default, and therefore memsegs iovas can use 39 bits or less for > most systems. And this is likely 100% true for VMs. > > Signed-off-by: Alejandro Lucero > --- > drivers/bus/pci/linux/pci.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c > index a871549..5cf78d7 100644 > --- a/drivers/bus/pci/linux/pci.c > +++ b/drivers/bus/pci/linux/pci.c > @@ -588,10 +588,8 @@ > fclose(fp); > > mgaw = ((vtd_cap_reg & VTD_CAP_MGAW_MASK) >> VTD_CAP_MGAW_SHIFT) + 1; > - if (mgaw < X86_VA_WIDTH) > - return false; > > - return true; > + return rte_eal_check_dma_mask(mgaw) == 0 ? true : false; Still looks weird but OK, no big deal :) Acked-by: Anatoly Burakov > } > #elif defined(RTE_ARCH_PPC_64) > static bool > -- Thanks, Anatoly