From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 24006A0527; Sat, 7 Nov 2020 19:39:58 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 681183772; Sat, 7 Nov 2020 19:39:56 +0100 (CET) Received: from new4-smtp.messagingengine.com (new4-smtp.messagingengine.com [66.111.4.230]) by dpdk.org (Postfix) with ESMTP id 3C7F6354D for ; Sat, 7 Nov 2020 19:39:55 +0100 (CET) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailnew.nyi.internal (Postfix) with ESMTP id 8368B5803B7; Sat, 7 Nov 2020 13:39:53 -0500 (EST) Received: from mailfrontend1 ([10.202.2.162]) by compute2.internal (MEProxy); Sat, 07 Nov 2020 13:39:53 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm2; bh= dfRZtv/e5RQmPs4D/nvDhiG4s5cGGWeDhuAjd1x0xyg=; b=lQVTn3n62jLoY6Yl SVlG/piq1W5ETVFN77gBsLml6o0cT1UIL486eDWjye98hNXNie+VOksLBoWpvOnh o0cQIiwAO9GrFC6+NqrwKm7ZAEGvZ5woSAgYIQrvS7RQAbwtf8Me7sFIrBJ7uXgd 4T0T6wjAsyXuNbzmc2KKbAr5D5qEq2pi/KHG1aJYcG9Dqbp0FOJYUBMeGswcnGqP xiW0Eq/lf2TGhMXcKMQjn4paDoOrtPQ3be2d7lxdriQfhaaYR6UrN3ITHF7OVBnp ivAW37nJGgxa6ZpFvGB5vxb1twz8DQsQOqJkNpEuZYguyH4evf8iOryaFqwuHRJq Wam/LA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm1; bh=dfRZtv/e5RQmPs4D/nvDhiG4s5cGGWeDhuAjd1x0x yg=; b=ierqzagjrUoEIkVSPiW0XHk57qsMZEFnEXcSuwcTjGiSHygoksWfAIjqP o3lMLSeu0y2Bvtu5j+1rjTsBuOhar9J7buFpH89mXhawbTNS3iRTjELqtUZEAob2 k6ZLx6wrdkauyVlA+Pq1zPItOXwbL661qVYlpbVBmwgF1B9MzUwCcxOkV+2vJIX0 8SCKBqh2pHhl5LxJxkIvP4cyPPyxmzm4G9gC74L4i733BIx+Nm3QsgA6JXhESxky zZB51ER+/7mGac+DAXhN80pvk4BGO6a1yNjnZC7SSCoM9yD558ofcTP+T/Q8sitp K2DklEGrqO5FGNm17xQkHl5Tb5KAw== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedrudduuddguddujecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhm rghsucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenuc ggtffrrghtthgvrhhnpedugefgvdefudfftdefgeelgffhueekgfffhfeujedtteeutdej ueeiiedvffegheenucfkphepjeejrddufeegrddvtdefrddukeegnecuvehluhhsthgvrh fuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepthhhohhmrghssehmohhnjhgr lhhonhdrnhgvth X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id EB64C3280414; Sat, 7 Nov 2020 13:39:49 -0500 (EST) From: Thomas Monjalon To: Jerin Jacob Cc: dpdk-dev , David Marchand , Ferruh Yigit , Olivier Matz , Morten =?ISO-8859-1?Q?Br=F8rup?= , "Ananyev, Konstantin" , Andrew Rybchenko , Viacheslav Ovsiienko , Ajit Khaparde , Jerin Jacob , Hemant Agrawal , Ray Kinsella , Neil Horman , Nithin Dabilpuram , Kiran Kumar K Date: Sat, 07 Nov 2020 19:39:48 +0100 Message-ID: <4509916.LqRtgDRpI1@thomas> In-Reply-To: References: <20201107155306.463148-1-thomas@monjalon.net> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH 1/1] mbuf: move pool pointer in first half X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 07/11/2020 18:12, Jerin Jacob: > On Sat, Nov 7, 2020 at 10:04 PM Thomas Monjalon wrote: > > > > The mempool pointer in the mbuf struct is moved > > from the second to the first half. > > It should increase performance on most systems having 64-byte cache line, > > > i.e. mbuf is split in two cache lines. > > But In any event, Tx needs to touch the pool to freeing back to the > pool upon Tx completion. Right? > Not able to understand the motivation for moving it to the first 64B cache line? > The gain varies from driver to driver. For example, a Typical > ARM-based NPU does not need to > touch the pool in Rx and its been filled by HW. Whereas it needs to > touch in Tx if the reference count is implemented. > > > Due to this change, tx_offload is moved, so some vector data paths > > may need to be adjusted. Note: OCTEON TX2 check is removed temporarily! > > It will be breaking the Tx path, Please just don't remove the static > assert without adjusting the code. Of course not. I looked at the vector Tx path of OCTEON TX2, it's close to be impossible to understand :) Please help!