From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 03BBA3238 for ; Fri, 25 May 2018 12:59:32 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 May 2018 03:59:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,439,1520924400"; d="scan'208";a="42132645" Received: from aburakov-mobl.ger.corp.intel.com (HELO [10.237.220.101]) ([10.237.220.101]) by fmsmga007.fm.intel.com with ESMTP; 25 May 2018 03:59:30 -0700 To: Olivier Matz , dev@dpdk.org, "Ananyev, Konstantin" , "Richardson, Bruce" References: <20170630142609.6180-1-olivier.matz@6wind.com> <20180403132644.23729-1-olivier.matz@6wind.com> From: "Burakov, Anatoly" Message-ID: <460fd61f-4346-752b-02c9-5ac952ea5215@intel.com> Date: Fri, 25 May 2018 11:59:29 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180403132644.23729-1-olivier.matz@6wind.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH] ring: relax alignment constraint on ring structure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 May 2018 10:59:33 -0000 On 03-Apr-18 2:26 PM, Olivier Matz wrote: > The initial objective of > commit d9f0d3a1ffd4 ("ring: remove split cacheline build setting") > was to add an empty cache line betwee, the producer and consumer > data (on platform with cache line size = 64B), preventing from > having them on adjacent cache lines. > > Following discussion on the mailing list, it appears that this > also imposes an alignment constraint that is not required. > > This patch removes the extra alignment constraint and adds the > empty cache lines using padding fields in the structure. The > size of rte_ring structure and the offset of the fields remain > the same on platforms with cache line size = 64B: > > rte_ring = 384 > rte_ring.name = 0 > rte_ring.flags = 32 > rte_ring.memzone = 40 > rte_ring.size = 48 > rte_ring.mask = 52 > rte_ring.prod = 128 > rte_ring.cons = 256 > > But it has an impact on platform where cache line size is 128B: > > rte_ring = 384 -> 768 > rte_ring.name = 0 > rte_ring.flags = 32 > rte_ring.memzone = 40 > rte_ring.size = 48 > rte_ring.mask = 52 > rte_ring.prod = 128 -> 256 > rte_ring.cons = 256 -> 512 > > Link: http://dpdk.org/dev/patchwork/patch/25039/ > Suggested-by: Konstantin Ananyev > Signed-off-by: Olivier Matz > --- This patch causes eal_flags_autotest to hang on FreeBSD. Root cause at this time is unknown, but this is a weird one - the test seems to hang while doing read() in bsd/eal_thread.c:59. Reverting this patch on top of rc5 results in eal_flags_autotest passing. -- Thanks, Anatoly