From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) by dpdk.org (Postfix) with ESMTP id 664D21094 for ; Tue, 4 Jul 2017 14:23:05 +0200 (CEST) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 0AD0520980; Tue, 4 Jul 2017 08:23:05 -0400 (EDT) Received: from frontend1 ([10.202.2.160]) by compute1.internal (MEProxy); Tue, 04 Jul 2017 08:23:05 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-sender :x-me-sender:x-sasl-enc:x-sasl-enc; s=mesmtp; bh=rmWQOhqEckjItT8 S75ENx5I6EobqIYRWBqR98jH0VGI=; b=PzlK8KYySwmaEkt/yGCd07WCoP8sZq4 GiQ6k/SNVhbJBzZmIV/nfKywtG4r19fNwZORkTXkEtFxi7Z+R0i0oGlhLAEtGaXE 7WwIbz3Qc80KFGmUWQuBE7gjDTW8/g4Qg1OW+ujJUYKofo49tAA5v49njRezCXNY t66xHXzgH4Kg= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-sender:x-me-sender:x-sasl-enc:x-sasl-enc; s= fm1; bh=rmWQOhqEckjItT8S75ENx5I6EobqIYRWBqR98jH0VGI=; b=B85ZyNj+ s9IkY6CNnPHfIaM3h8TBH6BYVCRJxsFwkzyUnhHMJ5r8gHp+nnevgvlfpDD+YPIU 7GxUtPXu8TZTo1B9MN1QWFfGb3yZOEMk3/3tdNqYrtaBTmBhxUjRFf0IblHfpz6m Gg91kLSPJE3WW9hKxzJMwyWdYlHQ834nBnjWk9UYBkgwZYNd2z1KIKw6zKYyzJ2V 5dkyr+4zaeLbclyJQ90CJJGMcLTskJwAcNe9yD92N2iAbLmfLRVsCSE0aUWpZRCK 0EIbOCoNOVLkGrqzJiKGm47iT5Zmz8S3/fCUOoRaUzJiO9w9hhqsMX81w62ODWnf jbNegKI4pRSwGw== X-ME-Sender: X-Sasl-enc: Jg/4zVIx3+XJKCYp8OF0S8haMBpgAhKVu6GEzW4PkyCy 1499170984 Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id BAC127E622; Tue, 4 Jul 2017 08:23:04 -0400 (EDT) From: Thomas Monjalon To: Bruce Richardson Cc: dev@dpdk.org, Konstantin Ananyev Date: Tue, 04 Jul 2017 14:23:03 +0200 Message-ID: <4685675.qTixDyZR3a@xps> In-Reply-To: <20170620152313.107642-5-bruce.richardson@intel.com> References: <20170620152313.107642-1-bruce.richardson@intel.com> <20170620152313.107642-5-bruce.richardson@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH 04/18] eal: remove unneeded conditionals for SSE headers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Jul 2017 12:23:05 -0000 20/06/2017 17:22, Bruce Richardson: > Our x86 baseline is to have support for SSE4.2, so therefore there is no > point in conditions around the inclusion of SSE1 - SSE4 headers. > > Signed-off-by: Bruce Richardson > --- > lib/librte_eal/common/include/arch/x86/rte_vect.h | 16 +--------------- > 1 file changed, 1 insertion(+), 15 deletions(-) I'm adding rte_pause: --- a/lib/librte_eal/common/include/arch/x86/rte_pause.h +++ b/lib/librte_eal/common/include/arch/x86/rte_pause.h @@ -40,17 +40,11 @@ extern "C" { #include "generic/rte_pause.h" -#ifdef __SSE2__ #include static inline void rte_pause(void) { _mm_pause(); } -#else -static inline void rte_pause(void) -{ -} -#endif #ifdef __cplusplus }