From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 87C56A0547; Wed, 19 May 2021 14:30:31 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 062DA40041; Wed, 19 May 2021 14:30:31 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id DC17F4003F for ; Wed, 19 May 2021 14:30:28 +0200 (CEST) IronPort-SDR: F7zOlmGZP4yzpa3pR0QMMd0p7nBXTtoeXCgAUfDTO2b34MXwwBI9pIJLsscnDEjXKax0BRTEhl lNWYMqQ/rLPw== X-IronPort-AV: E=McAfee;i="6200,9189,9988"; a="200656840" X-IronPort-AV: E=Sophos;i="5.82,312,1613462400"; d="scan'208";a="200656840" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2021 05:30:26 -0700 IronPort-SDR: BCisOKzETAh0EukPMp0rNThUctMlDKaI2+S2VO98VZPICriT9PalwmctdH6lyzaRiLBjWVn00J ORjc6xWq8avQ== X-IronPort-AV: E=Sophos;i="5.82,312,1613462400"; d="scan'208";a="411706880" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.224.148]) ([10.213.224.148]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2021 05:30:23 -0700 To: Chengwen Feng , thomas@monjalon.net, david.marchand@redhat.com Cc: dev@dpdk.org, Honnappa.Nagarahalli@arm.com, jerinj@marvell.com, jerinjacobk@gmail.com, Ruifeng.Wang@arm.com, viktorin@rehivetech.com, bruce.richardson@intel.com, juraj.linkes@pantheon.tech, nd@arm.com References: <1621424821-53240-1-git-send-email-fengchengwen@huawei.com> <1621425281-2413-1-git-send-email-fengchengwen@huawei.com> From: Ferruh Yigit X-User: ferruhy Message-ID: <46abc8a3-1e1f-55c4-ca22-d61c7489ef84@intel.com> Date: Wed, 19 May 2021 13:30:20 +0100 MIME-Version: 1.0 In-Reply-To: <1621425281-2413-1-git-send-email-fengchengwen@huawei.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v2] net/hns3: fix compile error with gcc8.3 and thunderx2 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 5/19/2021 12:54 PM, Chengwen Feng wrote: > Compile error with gcc8.3 and crossfile arm64_thunderx2_linux_gcc: > ../drivers/net/hns3/hns3_rxtx_vec_sve.c > cc1: error: switch ‘-mcpu=armv8.1-a’ conflicts with > ‘-march=armv8.2-a’ switch [-Werror] > ../drivers/net/hns3/hns3_rxtx_vec_sve.c:5:10: fatal error: > arm_sve.h: No such file or directory > 5 | #include > > The root cause is that gcc8.3 supports SVE, but it doesn't support > compile ACLE[1] SVE code, and the hns3_rxtx_vec_sve.c was written > by ACLE SVE code. > > This patch also filters out '-march=' '-mcpu' '-mtune' when compile > with hns3_rxtx_vec_sve.c. > > [1] ACLE: Arm C Language Extensions, user should include > when writing ACLE SVE code. > > Fixes: 203fbaf8813d ("net/hns3: refactor SVE code compile method") > > Signed-off-by: Chengwen Feng Hi Chengwen, We need CI result to proceed with the patch, since I don't have arm platfrom to test this properly. But in the CI applying patch fails, I guess that is because the original patch has been dropped in the next-net. Can you please send a new version of the patch rebased on top of latest next-net?