From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1D8ACA0A0A; Wed, 28 Apr 2021 20:06:56 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8D58A40697; Wed, 28 Apr 2021 20:06:55 +0200 (CEST) Received: from out2-smtp.messagingengine.com (out2-smtp.messagingengine.com [66.111.4.26]) by mails.dpdk.org (Postfix) with ESMTP id F372340147 for ; Wed, 28 Apr 2021 20:06:53 +0200 (CEST) Received: from compute2.internal (compute2.nyi.internal [10.202.2.42]) by mailout.nyi.internal (Postfix) with ESMTP id 531EF5C00BA; Wed, 28 Apr 2021 14:06:53 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute2.internal (MEProxy); Wed, 28 Apr 2021 14:06:53 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm1; bh= LIhjLDTqkqAKx1ZvlNdqmbW5Zeaf7NqFDEusKw3TBJU=; b=svgokbngU8I5vTtJ 2YJ+q/UJXN8lzKKplWaWl0l1lfSeNEUcHggmhOET66ga5ipruqzC33Un31y47YP6 O7LyJjeAw2mPhnK1wWf/mwO8O65C8SHvOrrM7vuNtYIjz9cCU5o6vdRo3WNqPzW6 Q8MpqDe33tkzmyd6KWuN3zyVNljKlV5vFSVKtzzxg9wOs2+moGojqcwiknOb/5hB lA5ck8M7avzQGwVW5i0g3SlLT8L2QTveo6hNA4IysUYn+BOZ5gOpPa42WD10npIq u5ivvl93vYIADO+uq2CsXbNkGFwJfzMIBypfjmjvcKxeH0KiXkvffmrnnQJyi4HK tIIZyQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm2; bh=LIhjLDTqkqAKx1ZvlNdqmbW5Zeaf7NqFDEusKw3TB JU=; b=PYReVc9qT952V5U0aygDp76rBlrwS/h/K6nj/VmdCbRNat3fc4d2la9Vk +8t6yT0Wks9T6qsLkjSkc3d63Q6nCvOKVDHj01oVkQ8HVLUM9G0un1SqGM45zReA 19mfqomOstB7L9qjnB2YebqiVx+B410UhxAKYbnYtCvXPvRI9OKrI5JLeR3wp9Qy r+xhuh5wodAXeYDRoq6k33aODhJ7UXtBPk7ebL/lGvUBSNlhUUZFNX9k9xb3xonl oqdQGwRjMHeUyaDrvAcfjXXalRDsn7ToanDeK+5Qui9+ApcYp2+2rPiOp/+K9ITm 8jwIgLH495750tqo1Mfp6MHYgF4TA== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrvddvvddgleejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkfgjfhgggfgtsehtufertddttddvnecuhfhrohhmpefvhhhomhgr shcuofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecugg ftrfgrthhtvghrnhepudeggfdvfeduffdtfeeglefghfeukefgfffhueejtdetuedtjeeu ieeivdffgeehnecukfhppeejjedrudefgedrvddtfedrudekgeenucevlhhushhtvghruf hiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehthhhomhgrshesmhhonhhjrghl ohhnrdhnvght X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 28 Apr 2021 14:06:51 -0400 (EDT) From: Thomas Monjalon To: Gregory Etelson Cc: dev@dpdk.org, matan@nvidia.com, orika@nvidia.com, rasland@nvidia.com, Viacheslav Ovsiienko , Ferruh Yigit , Andrew Rybchenko , Ajit Khaparde Date: Wed, 28 Apr 2021 20:06:50 +0200 Message-ID: <4710432.4D9N0dAA8x@thomas> In-Reply-To: <20210428175906.21387-2-getelson@nvidia.com> References: <20210428175906.21387-1-getelson@nvidia.com> <20210428175906.21387-2-getelson@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH 1/4] ethdev: fix integrity flow item X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 28/04/2021 19:59, Gregory Etelson: > Add integrity item definition to the rte_flow_desc_item array. > The new entry allows RTE conv API to work with the new flow item. What is RTE conv API? > Add bitmasks to the integrity item value. > The masks allow to query multiple integrity filters in a single > compare operation. [...] > +#define RTE_FLOW_ITEM_INTEGRITY_PKT_OK (1ULL << 0) > +#define RTE_FLOW_ITEM_INTEGRITY_L2_OK (1ULL << 1) > +#define RTE_FLOW_ITEM_INTEGRITY_L3_OK (1ULL << 2) > +#define RTE_FLOW_ITEM_INTEGRITY_L4_OK (1ULL << 3) > +#define RTE_FLOW_ITEM_INTEGRITY_L2_CRC_OK (1ULL << 4) > +#define RTE_FLOW_ITEM_INTEGRITY_IPV4_CSUM_OK (1ULL << 5) > +#define RTE_FLOW_ITEM_INTEGRITY_L4_CSUM_OK (1ULL << 6) > +#define RTE_FLOW_ITEM_INTEGRITY_L3_LEN_OK (1ULL << 7) Please use RTE_BIT macro, and add a reference to these bits in a doxygen comment where appropriate, thanks.