From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from cmailsend31.nm.naver.com (cmailsend31.nm.naver.com [125.209.239.208]) by dpdk.org (Postfix) with ESMTP id 458279197 for ; Wed, 21 Oct 2015 04:10:07 +0200 (CEST) Received: (qmail 28997 invoked by uid 100); 21 Oct 2015 02:10:06 -0000 Received: from 10.114.51.9 (HELO cweb21.nm.nhnsystem.com) (10.114.51.9) by cmailsend31.nm.naver.com with SMTP;21 Oct 2015 02:10:05 -0000 Date: Wed, 21 Oct 2015 11:10:05 +0900 (KST) From: =?UTF-8?B?7LWc7J217ISx?= To: ChoiSy Jong , Kyle Larose Message-ID: <47953ad6f47326ff2f2e4ac7a80271b@cweb21.nm.nhnsystem.com> In-Reply-To: <697F8B1B48670548A5BAB03E8283550F368076B4@PGSMSX108.gar.corp.intel.com> References: <697F8B1B48670548A5BAB03E8283550F368076B4@PGSMSX108.gar.corp.intel.com> MIME-Version: 1.0 Importance: normal X-Priority: 3 (Normal) X-Naver-CIP: 129.254.191.249 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: base64 X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Cc: dev@dpdk.org Subject: Re: [dpdk-dev] =?utf-8?q?When_I_run_test-pmd=2C_most_of_received_pack?= =?utf-8?q?ets=28loop-backed_packet=29_have_RX-error=2E?= X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list Reply-To: =?UTF-8?B?7LWc7J217ISx?= List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Oct 2015 02:10:10 -0000 IERlYXIgQ2hvaSwgU3kgSm9uZy4KIApUaGFuayB5b3UgdmVyeSBtdWNoIGZvciB5b3VyIHByZWNp b3VzIGFuc3dlcnMuCiAKU2luY2VyZWx5IFlvdXJzLCAKIApJY2stU3VuZyBDaG9pLgogCi0tLS0t T3JpZ2luYWwgTWVzc2FnZS0tLS0tCkZyb206ICJDaG9pLCBTeSBKb25nIiZsdDtzeS5qb25nLmNo b2lAaW50ZWwuY29tJmd0OyAKVG86ICLstZzsnbXshLEiJmx0O3BuazAwM0BuYXZlci5jb20mZ3Q7 OyAiS3lsZSBMYXJvc2UiJmx0O2VvbWVyZWFkaWdAZ21haWwuY29tJmd0OzsgCkNjOiAiZGV2QGRw ZGsub3JnIiZsdDtkZXZAZHBkay5vcmcmZ3Q7OyAKU2VudDogMjAxNS0xMC0yMSAo7IiYKSAxMTow NzoxNwpTdWJqZWN0OiBSRTogW2RwZGstZGV2XSBXaGVuIEkgcnVuIHRlc3QtcG1kLCBtb3N0IG9m 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dWNoLgoKJmd0OwoKJmd0OyBTaW5jZXJlbHkgWW91cnMsCgomZ3Q7CgomZ3Q7IEljay1TdW5nIENo b2kuCgomZ3Q7CgoKCkhlbGxvLAoKCgpJIGRvbid0IGtub3cgdGhlIHJlYXNvbiBmb3IgeW91ciBl cnJvcnMsIGJ1dCBJIGNhbiBwcm9iYWJseSBoZWxwIHdpdGggdGhlIGZ1bmN0aW9uLgoKCgpJIHVz dWFsbHkgZG8gdGhpcyBpbiB0d28gd2F5cy4gT25lIHdheSBpcyB0byBpZGVudGlmeSB0aGUgZHJp dmVyLCBhbmQgdGhlbiBsb29rIGZvciBpbnN0YW5jZXMgb2YgInN0cnVjdCBldGhfZGV2X29wcyIg aW4gaXQuIEZvciBleGFtcGxlLCBpZiB5b3UgaGF2ZSBhbiBpeGdiZS84MjU5OS9ldGMsIHRoZSBk cml2ZXIgaXMgdGhlIGl4Z2JlLiBTZWFyY2hpbmcgaW4gdGhlIGRpcmVjdG9yeSBmb3IgaXQsIHlv dSBmaW5kIHRoaXM6CgoKCiAgICBodHRwOi8vZHBkay5vcmcvYnJvd3NlL2RwZGsvdHJlZS9kcml2 ZXJzL25ldC9peGdiZS9peGdiZV9ldGhkZXYuYyNuMzg5CgoKCkFub3RoZXIgYWx0ZXJuYXRpdmUg aXMgdG8gYXR0YWNoIHRvIHlvdXIgcnVubmluZyBwcm9jZXNzIHdpdGggZ2RiLCBhbmQgcHJpbnQg dGhlIGRldiBzdHJ1Y3QuIGdkYiB3aWxsIHR5cGljYWxseSBtYXAgdGhlIHBvaW50ZXJzIGNvbnRh aW5lZCB0aGVyZWluIHRvIHRoZWlyIHN5bWJvbGljIG5hbWVzLgoKCgo= >From wujingji@shecgisg004.sh.intel.com Wed Oct 21 04:18:03 2015 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id B500791A1 for ; Wed, 21 Oct 2015 04:18:02 +0200 (CEST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP; 20 Oct 2015 19:18:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,709,1437462000"; d="scan'208";a="668462468" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga003.jf.intel.com with ESMTP; 20 Oct 2015 19:18:01 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t9L2Hxcx021701; Wed, 21 Oct 2015 10:17:59 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t9L2HusQ021810; Wed, 21 Oct 2015 10:17:58 +0800 Received: (from wujingji@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t9L2HujW021806; Wed, 21 Oct 2015 10:17:56 +0800 From: Jingjing Wu To: dev@dpdk.org Date: Wed, 21 Oct 2015 10:17:51 +0800 Message-Id: <1445393871-21775-1-git-send-email-jingjing.wu@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1444378608-708-1-git-send-email-jingjing.wu@intel.com> References: <1444378608-708-1-git-send-email-jingjing.wu@intel.com> Cc: yulong.pei@intel.com Subject: [dpdk-dev] [PATCH v2] i40e: fix the write back issue in FVL VF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Oct 2015 02:18:03 -0000 If DPDK is used on VF while the host is using Linux Kernel driver as PF driver on FVL NIC, then VF Rx is reported only in batches of 4 packets. It is due to the kernel driver assumes VF driver is working in interrupt mode, but DPDK VF is working in Polling mode. This patch fixes this issue by using the V1.1 virtual channel with Linux i40e PF driver. Signed-off-by: Jingjing Wu --- v2: fix coding style issue. drivers/net/i40e/i40e_ethdev.h | 5 +++ drivers/net/i40e/i40e_ethdev_vf.c | 65 +++++++++++++++++++++++++++++---------- 2 files changed, 53 insertions(+), 17 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index 6185657..d42487d 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h @@ -91,6 +91,11 @@ #define I40E_48_BIT_WIDTH (CHAR_BIT * 6) #define I40E_48_BIT_MASK RTE_LEN2MASK(I40E_48_BIT_WIDTH, uint64_t) +/* Linux PF host with virtchnl version 1.1 */ +#define PF_IS_V11(vf) \ + (((vf)->version_major == I40E_VIRTCHNL_VERSION_MAJOR) && \ + ((vf)->version_minor == 1)) + /* index flex payload per layer */ enum i40e_flxpld_layer_idx { I40E_FLXPLD_L2_IDX = 0, diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c index b694400..1324281 100644 --- a/drivers/net/i40e/i40e_ethdev_vf.c +++ b/drivers/net/i40e/i40e_ethdev_vf.c @@ -67,12 +67,15 @@ #include "i40e_rxtx.h" #include "i40e_ethdev.h" #include "i40e_pf.h" -#define I40EVF_VSI_DEFAULT_MSIX_INTR 1 +#define I40EVF_VSI_DEFAULT_MSIX_INTR 1 +#define I40EVF_VSI_DEFAULT_MSIX_INTR_LNX 0 /* busy wait delay in msec */ #define I40EVF_BUSY_WAIT_DELAY 10 #define I40EVF_BUSY_WAIT_COUNT 50 #define MAX_RESET_WAIT_CNT 20 +/*ITR index for NOITR*/ +#define I40E_QINT_RQCTL_MSIX_INDX_NOITR 3 struct i40evf_arq_msg_info { enum i40e_virtchnl_ops ops; @@ -412,7 +415,7 @@ i40evf_check_api_version(struct rte_eth_dev *dev) if (vf->version_major == I40E_DPDK_VERSION_MAJOR) PMD_DRV_LOG(INFO, "Peer is DPDK PF host"); else if ((vf->version_major == I40E_VIRTCHNL_VERSION_MAJOR) && - (vf->version_minor == I40E_VIRTCHNL_VERSION_MINOR)) + (vf->version_minor <= I40E_VIRTCHNL_VERSION_MINOR)) PMD_DRV_LOG(INFO, "Peer is Linux PF host"); else { PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)", @@ -432,14 +435,23 @@ i40evf_get_vf_resource(struct rte_eth_dev *dev) struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); int err; struct vf_cmd_info args; - uint32_t len; + uint32_t caps, len; args.ops = I40E_VIRTCHNL_OP_GET_VF_RESOURCES; - args.in_args = NULL; - args.in_args_size = 0; args.out_buffer = cmd_result_buffer; args.out_size = I40E_AQ_BUF_SZ; - + if (PF_IS_V11(vf)) { + caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 | + I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ | + I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG | + I40E_VIRTCHNL_VF_OFFLOAD_VLAN | + I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING; + args.in_args = (uint8_t *)∩︀ + args.in_args_size = sizeof(caps); + } else { + args.in_args = NULL; + args.in_args_size = 0; + } err = i40evf_execute_vf_cmd(dev, &args); if (err) { @@ -703,11 +715,14 @@ i40evf_config_irq_map(struct rte_eth_dev *dev) int i, err; map_info = (struct i40e_virtchnl_irq_map_info *)cmd_buffer; map_info->num_vectors = 1; - map_info->vecmap[0].rxitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2; - map_info->vecmap[0].txitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2; + map_info->vecmap[0].rxitr_idx = I40E_QINT_RQCTL_MSIX_INDX_NOITR; map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id; /* Alway use default dynamic MSIX interrupt */ - map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR; + if (vf->version_major == I40E_DPDK_VERSION_MAJOR) + map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR; + else + map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR_LNX; + /* Don't map any tx queue */ map_info->vecmap[0].txq_map = 0; map_info->vecmap[0].rxq_map = 0; @@ -1546,18 +1561,36 @@ i40evf_tx_init(struct rte_eth_dev *dev) } static inline void -i40evf_enable_queues_intr(struct i40e_hw *hw) +i40evf_enable_queues_intr(struct rte_eth_dev *dev) { - I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1), + struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); + struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + if (vf->version_major == I40E_DPDK_VERSION_MAJOR) + /* To support DPDK PF host */ + I40E_WRITE_REG(hw, + I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1), I40E_VFINT_DYN_CTLN1_INTENA_MASK | I40E_VFINT_DYN_CTLN_CLEARPBA_MASK); + else + /* To support Linux PF host */ + I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, + I40E_VFINT_DYN_CTL01_INTENA_MASK | + I40E_VFINT_DYN_CTL01_CLEARPBA_MASK); } static inline void -i40evf_disable_queues_intr(struct i40e_hw *hw) +i40evf_disable_queues_intr(struct rte_eth_dev *dev) { - I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1), + struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); + struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + if (vf->version_major == I40E_DPDK_VERSION_MAJOR) + I40E_WRITE_REG(hw, + I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1), 0); + else + I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0); } static int @@ -1604,7 +1637,7 @@ i40evf_dev_start(struct rte_eth_dev *dev) goto err_mac; } - i40evf_enable_queues_intr(hw); + i40evf_enable_queues_intr(dev); return 0; err_mac: @@ -1616,11 +1649,9 @@ err_queue: static void i40evf_dev_stop(struct rte_eth_dev *dev) { - struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); - PMD_INIT_FUNC_TRACE(); - i40evf_disable_queues_intr(hw); + i40evf_disable_queues_intr(dev); i40evf_stop_queues(dev); i40e_dev_clear_queues(dev); } -- 2.4.0