From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 222AEA09E4; Thu, 21 Jan 2021 07:30:18 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E7BA5140E64; Thu, 21 Jan 2021 07:30:17 +0100 (CET) Received: from out0-129.mail.aliyun.com (out0-129.mail.aliyun.com [140.205.0.129]) by mails.dpdk.org (Postfix) with ESMTP id E1853140E56 for ; Thu, 21 Jan 2021 07:30:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alibaba-inc.com; s=default; t=1611210614; h=Subject:To:From:Message-ID:Date:MIME-Version:Content-Type; bh=yXRN1dtQfIE2CL37u6htg4eNngj1tDNqnNaQkQtVWuI=; b=XK2teHmByXxa+avk0bhlXzqOSH+DD9DF6oMcK34GCE1PgYqQtq92MXXR/B0bpaoUoYHggx67yh1QAlJKiv68HFemlj+UO0wb3NOW0ieFjs8qRQ4raUN3LzKxvJRZDBbxyVph8fX6cn5RSmpi9LMoqoYXGpftfYz1VgEhmwIcXKQ= X-Alimail-AntiSpam: AC=PASS; BC=-1|-1; BR=01201311R271e4; CH=green; DM=||false|; DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=ay29a033018047206; MF=huawei.xhw@alibaba-inc.com; NM=1; PH=DS; RN=8; SR=0; TI=SMTPD_---.JNg86KE_1611210612; Received: from 30.43.72.173(mailfrom:huawei.xhw@alibaba-inc.com fp:SMTPD_---.JNg86KE_1611210612) by smtp.aliyun-inc.com(127.0.0.1); Thu, 21 Jan 2021 14:30:12 +0800 To: Maxime Coquelin , ferruh.yigit@intel.com Cc: dev@dpdk.org, anatoly.burakov@intel.com, david.marchand@redhat.com, zhihong.wang@intel.com, chenbo.xia@intel.com, grive@u256.net References: <68ecd941-9c56-4de7-fae2-2ad15bdfd81a@alibaba-inc.com> <1603381885-88819-1-git-send-email-huawei.xhw@alibaba-inc.com> <1603381885-88819-3-git-send-email-huawei.xhw@alibaba-inc.com> <9dfad03c-d1db-5756-d222-2e9c2f8da65a@redhat.com> From: "=?UTF-8?B?6LCi5Y2O5LyfKOatpOaXtuatpOWIu++8iQ==?=" Message-ID: <48b27ce4-99c7-5e18-4cfa-0e9bf472d719@alibaba-inc.com> Date: Thu, 21 Jan 2021 14:30:09 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.6.1 MIME-Version: 1.0 In-Reply-To: <9dfad03c-d1db-5756-d222-2e9c2f8da65a@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US Subject: Re: [dpdk-dev] [PATCH v5 2/3] PCI: support MMIO in rte_pci_ioport_map/unap/read/write X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 2021/1/12 16:23, Maxime Coquelin wrote: > Title should be something like: > > "bus/pci: support MMIO in PCI ioport accessors > > On 10/22/20 5:51 PM, 谢华伟(此时此刻） wrote: >> From: "huawei.xhw" >> >> If IO BAR, we get PIO address. >> If MMIO BAR, we get mapped virtual address. >> We distinguish PIO and MMIO by their address like how kernel does. >> ioread/write8/16/32 is provided to access PIO/MMIO. >> BTW, for virtio on arch other than x86, BAR flag indicates PIO but is mapped. > No acronym in the commit message. BTW? fixed. PIO(programmed IO) and MMIO(memory mapped IO) explained. > Also, I am not sure to understand this comment. > Does it means in the case of ARM for example, the IORESOURCE_IO flag is > set but the base address is above PIO_MAX? ARM doesn't have PIO but only MMIO.  The device sets IORESOURCE_IO flag anyway. Should i remove this message as it causes confuse? > >> Signed-off-by: huawei.xhw > As in previous patch, we need your full name for the sign-off. fixed. > >> --- >> drivers/bus/pci/linux/pci.c | 4 -- >> drivers/bus/pci/linux/pci_uio.c | 123 ++++++++++++++++++++++++++-------------- >> 2 files changed, 82 insertions(+), 45 deletions(-) >> >> diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c >> index 0f38abf..0dc99e9 100644 >> --- a/drivers/bus/pci/linux/pci.c >> +++ b/drivers/bus/pci/linux/pci.c >> @@ -715,8 +715,6 @@ int rte_pci_write_config(const struct rte_pci_device *device, >> break; >> #endif >> case RTE_PCI_KDRV_IGB_UIO: >> - pci_uio_ioport_read(p, data, len, offset); >> - break; > I think this part should be in patch 1. Patch 1 handles IO port map. Patch 2 unifies IO/MMIO. Patch 3 handles vfio. I feel current split is more clear. > >> case RTE_PCI_KDRV_UIO_GENERIC: >> pci_uio_ioport_read(p, data, len, offset); >> break; >> @@ -736,8 +734,6 @@ int rte_pci_write_config(const struct rte_pci_device *device, >> break; >> #endif >> case RTE_PCI_KDRV_IGB_UIO: >> - pci_uio_ioport_write(p, data, len, offset); >> - break; > Same here. > >> case RTE_PCI_KDRV_UIO_GENERIC: >> pci_uio_ioport_write(p, data, len, offset); >> break; >> diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c >> index 01f2a40..c19382f 100644 >> --- a/drivers/bus/pci/linux/pci_uio.c >> +++ b/drivers/bus/pci/linux/pci_uio.c >> @@ -379,14 +379,9 @@ >> char buf[BUFSIZ]; >> uint64_t phys_addr, end_addr, flags; >> unsigned long base; >> + bool iobar; >> int i; >> >> - if (rte_eal_iopl_init() != 0) { >> - RTE_LOG(ERR, EAL, "%s(): insufficient ioport permissions for PCI device %s\n", >> - __func__, dev->name); >> - return -1; >> - } >> - >> /* open and read addresses of the corresponding resource in sysfs */ >> snprintf(filename, sizeof(filename), "%s/" PCI_PRI_FMT "/resource", >> rte_pci_get_sysfs_path(), dev->addr.domain, dev->addr.bus, >> @@ -408,15 +403,30 @@ >> &end_addr, &flags) < 0) >> goto error; >> >> - if (!(flags & IORESOURCE_IO)) { >> - RTE_LOG(ERR, EAL, "%s(): bar resource other than IO is not supported\n", __func__); >> + if (flags & IORESOURCE_IO) { >> + iobar = 1; >> + base = (unsigned long)phys_addr; >> + RTE_LOG(INFO, EAL, "%s(): PIO BAR %08lx detected\n", __func__, base); >> + } else if (flags & IORESOURCE_MEM) { >> + iobar = 0; >> + base = (unsigned long)dev->mem_resource[bar].addr; >> + RTE_LOG(INFO, EAL, "%s(): MMIO BAR %08lx detected\n", __func__, base); >> + } else { >> + RTE_LOG(ERR, EAL, "%s(): unknown BAR type\n", __func__); >> + goto error; >> + } >> + >> + >> + if (iobar && rte_eal_iopl_init() != 0) { >> + RTE_LOG(ERR, EAL, "%s(): insufficient ioport permissions for PCI device %s\n", >> + __func__, dev->name); >> goto error; >> } >> - base = (unsigned long)phys_addr; >> - RTE_LOG(INFO, EAL, "%s(): PIO BAR %08lx detected\n", __func__, base); >> >> - if (base > UINT16_MAX) >> + if (iobar && (base > UINT16_MAX)) { >> + RTE_LOG(ERR, EAL, "%s(): %08lx too large PIO resource\n", __func__, base); >> goto error; >> + } > It looks like above check could be moved directly to (flags & > IORESOURCE_IO) case, so iobar boolean is not needed. yes, code is more clear with your suggestion.