From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 39B5EA49B for ; Fri, 12 Jan 2018 13:00:25 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Jan 2018 04:00:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,348,1511856000"; d="scan'208";a="9867841" Received: from pgsmsx101.gar.corp.intel.com ([10.221.44.78]) by orsmga007.jf.intel.com with ESMTP; 12 Jan 2018 04:00:23 -0800 Received: from pgsmsx112.gar.corp.intel.com ([169.254.3.86]) by PGSMSX101.gar.corp.intel.com ([169.254.1.141]) with mapi id 14.03.0319.002; Fri, 12 Jan 2018 20:00:22 +0800 From: "Dai, Wei" To: "xiangxia.m.yue@gmail.com" , "Xing, Beilei" , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2 3/4] net/ixgbevf: save IXGBE_VTEIMS to intr->mask for performance. Thread-Index: AQHTivrxZ2A0XJWcZU+SR+YJ1chWJaNwIzhg Date: Fri, 12 Jan 2018 12:00:20 +0000 Message-ID: <49759EB36A64CF4892C1AFEC9231E8D66CF21CC1@PGSMSX112.gar.corp.intel.com> References: <1515688791-2794-1-git-send-email-xiangxia.m.yue@gmail.com> <1515688791-2794-3-git-send-email-xiangxia.m.yue@gmail.com> In-Reply-To: <1515688791-2794-3-git-send-email-xiangxia.m.yue@gmail.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNjUxNDE2MTAtMWE2Yy00YjJmLTlhYmQtNzNjNzM0MzBmN2FmIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6ImN0VWpYcEZIT1h4bVRZMHBlaGVTbDRDcDYyeDF6bXcxNWtcL0l4RWRmNlFnPSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [172.30.20.205] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 3/4] net/ixgbevf: save IXGBE_VTEIMS to intr->mask for performance. X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Jan 2018 12:00:26 -0000 > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of > xiangxia.m.yue@gmail.com > Sent: Friday, January 12, 2018 12:40 AM > To: Xing, Beilei ; dev@dpdk.org > Cc: Tonghao Zhang > Subject: [dpdk-dev] [PATCH v2 3/4] net/ixgbevf: save IXGBE_VTEIMS to > intr->mask for performance. >=20 > From: Tonghao Zhang >=20 > If dpdk APPs call the rte_eth_dev_rx_intr_enable or > rte_eth_dev_rx_intr_disable frequently, and ixgbe vf will read the > IXGBE_VTEIMS register everytime. The patch saves the IXGBE_VTEIMS to > mask to avoid read frequently. >=20 > Signed-off-by: Tonghao Zhang > Acked-by: Beilei Xing Acked-by: Wei Dai > --- > drivers/net/ixgbe/ixgbe_ethdev.c | 55 > +++++++++++++++++++++++++--------------- > 1 file changed, 35 insertions(+), 20 deletions(-) >=20 > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c > b/drivers/net/ixgbe/ixgbe_ethdev.c > index 49f486a..cab243d 100644 > --- a/drivers/net/ixgbe/ixgbe_ethdev.c > +++ b/drivers/net/ixgbe/ixgbe_ethdev.c > @@ -270,8 +270,8 @@ static int ixgbevf_dev_link_update(struct > rte_eth_dev *dev, static void ixgbevf_dev_stop(struct rte_eth_dev *dev); > static void ixgbevf_dev_close(struct rte_eth_dev *dev); static int > ixgbevf_dev_reset(struct rte_eth_dev *dev); -static void > ixgbevf_intr_disable(struct ixgbe_hw *hw); -static void > ixgbevf_intr_enable(struct ixgbe_hw *hw); > +static void ixgbevf_intr_disable(struct rte_eth_dev *dev); static void > +ixgbevf_intr_enable(struct rte_eth_dev *dev); > static int ixgbevf_dev_stats_get(struct rte_eth_dev *dev, > struct rte_eth_stats *stats); > static void ixgbevf_dev_stats_reset(struct rte_eth_dev *dev); @@ -1665,7 > +1665,7 @@ static int ixgbe_l2_tn_filter_init(struct rte_eth_dev *eth_dev= ) > ixgbevf_dev_stats_reset(eth_dev); >=20 > /* Disable the interrupts for VF */ > - ixgbevf_intr_disable(hw); > + ixgbevf_intr_disable(eth_dev); >=20 > hw->mac.num_rar_entries =3D 128; /* The MAX of the underlying PF */ > diag =3D hw->mac.ops.reset_hw(hw); > @@ -1734,7 +1734,7 @@ static int ixgbe_l2_tn_filter_init(struct > rte_eth_dev *eth_dev) > rte_intr_callback_register(intr_handle, > ixgbevf_dev_interrupt_handler, eth_dev); > rte_intr_enable(intr_handle); > - ixgbevf_intr_enable(hw); > + ixgbevf_intr_enable(eth_dev); >=20 > PMD_INIT_LOG(DEBUG, "port %d vendorID=3D0x%x deviceID=3D0x%x > mac.type=3D%s", > eth_dev->data->port_id, pci_dev->id.vendor_id, @@ > -1767,7 +1767,7 @@ static int ixgbe_l2_tn_filter_init(struct rte_eth_dev > *eth_dev) > eth_dev->tx_pkt_burst =3D NULL; >=20 > /* Disable the interrupts for VF */ > - ixgbevf_intr_disable(hw); > + ixgbevf_intr_disable(eth_dev); >=20 > rte_free(eth_dev->data->mac_addrs); > eth_dev->data->mac_addrs =3D NULL; > @@ -4953,19 +4953,32 @@ static int > ixgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, > * Virtual Function operations > */ > static void > -ixgbevf_intr_disable(struct ixgbe_hw *hw) > +ixgbevf_intr_disable(struct rte_eth_dev *dev) > { > + struct ixgbe_interrupt *intr =3D > + IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); > + struct ixgbe_hw *hw =3D > + IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + > PMD_INIT_FUNC_TRACE(); >=20 > /* Clear interrupt mask to stop from interrupts being generated */ > IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); >=20 > IXGBE_WRITE_FLUSH(hw); > + > + /* Clear mask value. */ > + intr->mask =3D 0; > } >=20 > static void > -ixgbevf_intr_enable(struct ixgbe_hw *hw) > +ixgbevf_intr_enable(struct rte_eth_dev *dev) > { > + struct ixgbe_interrupt *intr =3D > + IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); > + struct ixgbe_hw *hw =3D > + IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + > PMD_INIT_FUNC_TRACE(); >=20 > /* VF enable interrupt autoclean */ > @@ -4974,6 +4987,9 @@ static int > ixgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, > IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, > IXGBE_VF_IRQ_ENABLE_MASK); >=20 > IXGBE_WRITE_FLUSH(hw); > + > + /* Save IXGBE_VTEIMS value to mask. */ > + intr->mask =3D IXGBE_VF_IRQ_ENABLE_MASK; > } >=20 > static int > @@ -5099,7 +5115,7 @@ static int > ixgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, > rte_intr_enable(intr_handle); >=20 > /* Re-enable interrupt for VF */ > - ixgbevf_intr_enable(hw); > + ixgbevf_intr_enable(dev); >=20 > return 0; > } > @@ -5113,7 +5129,7 @@ static int > ixgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, >=20 > PMD_INIT_FUNC_TRACE(); >=20 > - ixgbevf_intr_disable(hw); > + ixgbevf_intr_disable(dev); >=20 > hw->adapter_stopped =3D 1; > ixgbe_stop_adapter(hw); > @@ -5611,17 +5627,17 @@ static void ixgbevf_set_vfta_all(struct > rte_eth_dev *dev, bool on) { > struct rte_pci_device *pci_dev =3D RTE_ETH_DEV_TO_PCI(dev); > struct rte_intr_handle *intr_handle =3D &pci_dev->intr_handle; > - uint32_t mask; > + struct ixgbe_interrupt *intr =3D > + IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); > struct ixgbe_hw *hw =3D > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > uint32_t vec =3D IXGBE_MISC_VEC_ID; >=20 > - mask =3D IXGBE_READ_REG(hw, IXGBE_VTEIMS); > if (rte_intr_allow_others(intr_handle)) > vec =3D IXGBE_RX_VEC_START; > - mask |=3D (1 << vec); > + intr->mask |=3D (1 << vec); > RTE_SET_USED(queue_id); > - IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); > + IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, intr->mask); >=20 > rte_intr_enable(intr_handle); >=20 > @@ -5631,19 +5647,19 @@ static void ixgbevf_set_vfta_all(struct > rte_eth_dev *dev, bool on) static int > ixgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t > queue_id) { > - uint32_t mask; > + struct ixgbe_interrupt *intr =3D > + IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); > struct ixgbe_hw *hw =3D > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > struct rte_pci_device *pci_dev =3D RTE_ETH_DEV_TO_PCI(dev); > struct rte_intr_handle *intr_handle =3D &pci_dev->intr_handle; > uint32_t vec =3D IXGBE_MISC_VEC_ID; >=20 > - mask =3D IXGBE_READ_REG(hw, IXGBE_VTEIMS); > if (rte_intr_allow_others(intr_handle)) > vec =3D IXGBE_RX_VEC_START; > - mask &=3D ~(1 << vec); > + intr->mask &=3D ~(1 << vec); > RTE_SET_USED(queue_id); > - IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); > + IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, intr->mask); >=20 > return 0; > } > @@ -8200,7 +8216,7 @@ static void ixgbevf_mbx_process(struct > rte_eth_dev *dev) > struct ixgbe_hw *hw =3D > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > struct ixgbe_interrupt *intr =3D > IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); > - ixgbevf_intr_disable(hw); > + ixgbevf_intr_disable(dev); >=20 > /* read-on-clear nic registers here */ > eicr =3D IXGBE_READ_REG(hw, IXGBE_VTEICR); @@ -8217,7 +8233,6 @@ > static void ixgbevf_mbx_process(struct rte_eth_dev *dev) static int > ixgbevf_dev_interrupt_action(struct rte_eth_dev *dev) { > - struct ixgbe_hw *hw =3D > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > struct ixgbe_interrupt *intr =3D > IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); >=20 > @@ -8226,7 +8241,7 @@ static void ixgbevf_mbx_process(struct > rte_eth_dev *dev) > intr->flags &=3D ~IXGBE_FLAG_MAILBOX; > } >=20 > - ixgbevf_intr_enable(hw); > + ixgbevf_intr_enable(dev); >=20 > return 0; > } > -- > 1.8.3.1