From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E668BA0A05; Wed, 20 Jan 2021 08:18:39 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id AE2F7140D95; Wed, 20 Jan 2021 08:18:39 +0100 (CET) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id CECD4140D5B; Wed, 20 Jan 2021 08:18:37 +0100 (CET) IronPort-SDR: fgjSooca9HtiRpPBTwOgvp+gM3neioLKV2X5o+jDATJCuefscO9M8QWnmccutgYv1a6lcBrYwM 02Vx/1v9oWaA== X-IronPort-AV: E=McAfee;i="6000,8403,9869"; a="243128594" X-IronPort-AV: E=Sophos;i="5.79,360,1602572400"; d="scan'208";a="243128594" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Jan 2021 23:18:36 -0800 IronPort-SDR: NCSs0B4eV730e09WtdSxzybtmvy9ajFoA6YVAtL9c8PtAx1xuD12GPajNbQLSirMX39Tb02LJ5 nLWRPYY5D2Hw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,360,1602572400"; d="scan'208";a="571254417" Received: from fmsmsx601.amr.corp.intel.com ([10.18.126.81]) by fmsmga006.fm.intel.com with ESMTP; 19 Jan 2021 23:18:36 -0800 Received: from shsmsx606.ccr.corp.intel.com (10.109.6.216) by fmsmsx601.amr.corp.intel.com (10.18.126.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Tue, 19 Jan 2021 23:18:35 -0800 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX606.ccr.corp.intel.com (10.109.6.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 20 Jan 2021 15:18:33 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.1713.004; Wed, 20 Jan 2021 15:18:33 +0800 From: "Guo, Jia" To: "Wu, Wenjun1" , "dev@dpdk.org" CC: "stable@dpdk.org" Thread-Topic: [PATCH v1] net/e1000: fix the invalid flow control mode setting Thread-Index: AQHW7vsWZ/7moE9k6EeGkVDO+3q6xKowGsAA Date: Wed, 20 Jan 2021 07:18:33 +0000 Message-ID: <50bcafce8d654fd48ea241671befb3f2@intel.com> References: <20210120065337.230488-1-wenjun1.wu@intel.com> In-Reply-To: <20210120065337.230488-1-wenjun1.wu@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.5.1.3 x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v1] net/e1000: fix the invalid flow control mode setting X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Acked-by: Jeff Guo > -----Original Message----- > From: Wu, Wenjun1 > Sent: Wednesday, January 20, 2021 2:54 PM > To: dev@dpdk.org; Guo, Jia > Cc: Wu, Wenjun1 ; stable@dpdk.org > Subject: [PATCH v1] net/e1000: fix the invalid flow control mode setting >=20 > E1000_CTRL register should be updated according to fc_conf->mode's value. >=20 > Fixes: af75078fece3 ("first public release") > Cc: stable@dpdk.org >=20 > Signed-off-by: Wenjun Wu > --- > drivers/net/e1000/igb_ethdev.c | 34 > ++++++++++++++++++++++++++++++++++ > 1 file changed, 34 insertions(+) >=20 > diff --git a/drivers/net/e1000/igb_ethdev.c > b/drivers/net/e1000/igb_ethdev.c index 647aa8d99..a8fc57d2c 100644 > --- a/drivers/net/e1000/igb_ethdev.c > +++ b/drivers/net/e1000/igb_ethdev.c > @@ -3064,6 +3064,7 @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev, > struct rte_eth_fc_conf *fc_conf) > uint32_t rx_buf_size; > uint32_t max_high_water; > uint32_t rctl; > + uint32_t ctrl; >=20 > hw =3D E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); > if (fc_conf->autoneg !=3D hw->mac.autoneg) @@ -3101,6 +3102,39 > @@ eth_igb_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf > *fc_conf) > rctl &=3D ~E1000_RCTL_PMCF; >=20 > E1000_WRITE_REG(hw, E1000_RCTL, rctl); > + > + /* > + * check if we want to change flow control mode - driver > doesn't have native > + * capability to do that, so we'll write the registers ourselves > + */ > + ctrl =3D E1000_READ_REG(hw, E1000_CTRL); > + > + /* > + * set or clear E1000_CTRL_RFCE and E1000_CTRL_TFCE bits > depending > + * on configuration > + */ > + switch (fc_conf->mode) { > + case RTE_FC_NONE: > + ctrl &=3D ~E1000_CTRL_RFCE & ~E1000_CTRL_TFCE; > + break; > + case RTE_FC_RX_PAUSE: > + ctrl |=3D E1000_CTRL_RFCE; > + ctrl &=3D ~E1000_CTRL_TFCE; > + break; > + case RTE_FC_TX_PAUSE: > + ctrl |=3D E1000_CTRL_TFCE; > + ctrl &=3D ~E1000_CTRL_RFCE; > + break; > + case RTE_FC_FULL: > + ctrl |=3D E1000_CTRL_RFCE | E1000_CTRL_TFCE; > + break; > + default: > + PMD_INIT_LOG(ERR, "invalid flow control mode"); > + return -EINVAL; > + } > + > + E1000_WRITE_REG(hw, E1000_CTRL, ctrl); > + > E1000_WRITE_FLUSH(hw); >=20 > return 0; > -- > 2.25.1