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Thu, 26 Jun 2025 11:21:56 -0400 (EDT) From: Thomas Monjalon <thomas@monjalon.net> To: Bing Zhao <bingz@nvidia.com>, Stephen Hemminger <stephen@networkplumber.org> Cc: Slava Ovsiienko <viacheslavo@nvidia.com>, Matan Azrad <matan@nvidia.com>, dev <dev@dpdk.org>, Dariusz Sosnowski <dsosnowski@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com> Subject: Re: [PATCH v2 2/3] net/mlx5: add new devarg for Tx queue consecutive memory Date: Thu, 26 Jun 2025 17:21:55 +0200 Message-ID: <5112176.f0I1acK8xe@thomas> In-Reply-To: <20250626072954.6ca04456@hermes.local> References: <20250623183456.130666-1-bingz@nvidia.com> <PH7PR12MB6905F9250E91DEE1DE0BF4E8D07AA@PH7PR12MB6905.namprd12.prod.outlook.com> <20250626072954.6ca04456@hermes.local> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org 26/06/2025 16:29, Stephen Hemminger: > On Thu, 26 Jun 2025 13:18:18 +0000 > Bing Zhao <bingz@nvidia.com> wrote: >=20 > > Hi Stephen, > >=20 > > Thanks for your review and comments. I will add the description about t= he new devarg in our mlx5.rst file to have a detailed description. > > Indeed, after some review and internal call discussion with our datapat= h experts. We would like to change the devarg a little bit but not only 0 /= 1 as a chicken bit. > >=20 > > Since the memory accessing footprints and orders may impact the perform= ance. In the perf test, we found that the alignment of the queue address ma= y impact it. The basic starting address alignment is system page size, but = it can be bigger. > > So the new devarg use will be the log value of the alignment for all qu= eues=E2=80=99 starting addresses. And on different CPU architectures / gene= rations that have different LLC systems can try to use different alignment = to get the best performance without rebuilding the binary application from = the source code and it is configurable. WDYT? >=20 > Please make it automatic, the driver already has too many config bits. > The users should just get good performance with the default. > If driver needs to it should look at any/all system info to determine wha= t the best setting is. The default would be good enough, but it looks very difficult to know the b= est value. That's why the idea is to allow some tuning here. I agree there are too many devargs for most users, but at the same time DPDK is a project to get the best performance, that's why there are so many tuning possible. I think we can meet both goals by making clear which options are for advanc= ed tuning, so a basic user will not mess with with such options which have a good defa= ult by the way.