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From: "Qiu, Michael" <michael.qiu@intel.com>
To: Thomas Monjalon <thomas.monjalon@6wind.com>
Thread-Topic: [dpdk-dev] [PATCH] librte_eal: Fix wrong header file for old
 gcc version
Thread-Index: AQHQ3k6AnKXbrARwrkidWUM7naV8mA==
Date: Fri, 25 Sep 2015 02:55:20 +0000
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Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH] librte_eal: Fix wrong header file for old
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On 2015/9/7 22:46, Thomas Monjalon wrote:=0A=
> 2015-08-24 17:22, Michael Qiu:=0A=
>> For __SSE3__, the corresponding header file should be pmmintrin.h,=0A=
>> tmmintrin.h works for __SSSE3__.=0A=
> Please could you better explain the difference and what is exactly the bu=
g=0A=
> being fixed?=0A=
It should solve this issue:=0A=
=0A=
[dpdk-dev] DPDK 2.1.0 build error: inlining failed in call to always_inline=
=0A=
=0A=
/usr/lib/gcc/x86_64-redhat-linux/4.9.2/include/tmmintrin.h:185:1: error: in=
lining failed in call to always_inline =91_mm_alignr_epi8=92: t=0A=
arget specific option mismatch=0A=
 _mm_alignr_epi8(__m128i __X, __m128i __Y, const int __N)=0A=
=0A=
 ^=0A=
The AMD cpu flags:=0A=
=0A=
flags        : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmo=
v pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxe=0A=
xt fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl non=
stop_tsc extd_apicid aperfmperf pni monitor cx16 popcnt lah=0A=
f_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch =
osvw ibs skinit wdt cpb hw_pstate npt lbrv svm_lock nrip_sa=0A=
=0A=
=0A=
"_mm_alignr_epi8" only works for ssse3 or upper,=0A=
but this AMD CPU does not support that. This function has been wrongly call=
ed, because the wrong header file.=0A=
=0A=
Thanks,=0A=
Michael =0A=
=0A=
=0A=
> Thanks=0A=
>=0A=
>=0A=
=0A=