From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 2A95495CE for ; Tue, 2 Feb 2016 03:07:19 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 01 Feb 2016 18:07:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,383,1449561600"; d="scan'208";a="874610387" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga001.jf.intel.com with ESMTP; 01 Feb 2016 18:07:02 -0800 Received: from fmsmsx121.amr.corp.intel.com (10.18.125.36) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 1 Feb 2016 18:06:58 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.110.14) by fmsmsx121.amr.corp.intel.com (10.18.125.36) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 1 Feb 2016 18:06:58 -0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.215]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.218]) with mapi id 14.03.0248.002; Tue, 2 Feb 2016 10:06:56 +0800 From: "Qiu, Michael" To: "Lu, Wenzhuo" , "dev@dpdk.org" Thread-Topic: [PATCH v2] ixgbe: Fix disable interrupt twice Thread-Index: AQHRWlokuxzst+DuYUqlXTIjOup9yQ== Date: Tue, 2 Feb 2016 02:06:55 +0000 Message-ID: <533710CFB86FA344BFBF2D6802E6028622F28A4D@SHSMSX101.ccr.corp.intel.com> References: <1454046700-20843-1-git-send-email-michael.qiu@intel.com> <1454047090-21274-1-git-send-email-michael.qiu@intel.com> <6A0DE07E22DDAD4C9103DF62FEBC0909034256DA@shsmsx102.ccr.corp.intel.com> <533710CFB86FA344BFBF2D6802E6028622F28091@SHSMSX101.ccr.corp.intel.com> <6A0DE07E22DDAD4C9103DF62FEBC0909034266D1@shsmsx102.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="Windows-1252" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] ixgbe: Fix disable interrupt twice X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Feb 2016 02:07:19 -0000 [+cc helin]=0A= =0A= On 2/2/2016 9:03 AM, Lu, Wenzhuo wrote:=0A= > Hi Michael,=0A= >=0A= >> -----Original Message-----=0A= >> From: Qiu, Michael=0A= >> Sent: Monday, February 1, 2016 4:05 PM=0A= >> To: Lu, Wenzhuo; dev@dpdk.org=0A= >> Cc: Zhou, Danny; Liu, Yong; Liang, Cunming=0A= >> Subject: Re: [PATCH v2] ixgbe: Fix disable interrupt twice=0A= >>=0A= >> On 1/29/2016 4:07 PM, Lu, Wenzhuo wrote:=0A= >>> Hi Michael,=0A= >>>=0A= >>>> -----Original Message-----=0A= >>>> From: Qiu, Michael=0A= >>>> Sent: Friday, January 29, 2016 1:58 PM=0A= >>>> To: dev@dpdk.org=0A= >>>> Cc: Zhou, Danny; Liu, Yong; Liang, Cunming; Lu, Wenzhuo; Qiu, Michael= =0A= >>>> Subject: [PATCH v2] ixgbe: Fix disable interrupt twice=0A= >>>>=0A= >>>> Currently, ixgbe vf and pf will disable interrupt twice in stop stage= =0A= >>>> and uninit stage. It will cause an error:=0A= >>>>=0A= >>>> testpmd> quit=0A= >>>>=0A= >>>> Shutting down port 0...=0A= >>>> Stopping ports...=0A= >>>> Done=0A= >>>> Closing ports...=0A= >>>> EAL: Error disabling MSI-X interrupts for fd 26=0A= >>>> Done=0A= >>>>=0A= >>>> Becasue the interrupt already been disabled in stop stage.=0A= >>>> Since it is enabled in init stage, better remove from stop stage.=0A= >>> I'm afraid it=92s not a good idea to just remove the intr_disable from = dev_stop.=0A= >>> I think dev_stop have the chance to be used independently with dev_unin= t. In=0A= >> this scenario, we still need intr_disable, right?=0A= >>> Maybe what we need is some check before we disable the intr:)=0A= >> Yes, indeed we need some check in disable intr, but it need additional f= ields in=0A= >> "struct rte_intr_handle", and it's much saft to do so, but as I check i= 40e/fm10k=0A= >> code, only ixgbe disable it in dev_stop().=0A= > I found fm10k doesn=92t enable intr in dev_start. So, I think it's OK. Bu= t i40e enables intr in dev_start.=0A= > To my opinion, it's more like i40e misses the intr_disable in dev_stop.= =0A= =0A= I don't think i40e miss it, because it not the right please to disable=0A= interrupt. because all interrupts are enabled in init stage.=0A= =0A= Actually, ixgbe enable the interrupt in init stage, but in dev_start, it=0A= disable it first and re-enable, so it just the same with doing nothing=0A= about interrupt.=0A= =0A= Just think below:=0A= =0A= 1. start the port.(interrupt already enabled in init stage, disable -->=0A= re-enable)=0A= 2. stop the port.(disable interrupt)=0A= 3. start port again(Try to disable, but failed, already disabled)=0A= =0A= Would you think the code has issue?=0A= =0A= Thanks,=0A= Michael=0A= =0A= > Maybe we can follow fm10k's style.=0A= >=0A= >> On other hand, if we remove it in dev_stop, any side effect? In ixgbe st= art, it will=0A= >> always disable it first and then re-enable it, so it's safe.=0A= > I think you mean we can disable intr anyway even if it has been disabled.= =0A= =0A= Actually, we couldn't, DPDK call VFIO ioctl to kernel to disable=0A= interrupts, and if we try disable twice, it will return and error.=0A= That's why I mean we need a flag to show the interrupts stats. If it=0A= already disabled, we do not need call in to kernel. just return and give=0A= a warning message.=0A= =0A= Thanks,=0A= Michael=0A= =0A= > Sounds more like why we don't=0A= > need this patch :)=0A= >=0A= >> Thanks,=0A= >> Michael=0A= >=0A= =0A=