From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id A7B0A7F78 for ; Wed, 29 Oct 2014 09:00:08 +0100 (CET) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 29 Oct 2014 01:08:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,808,1406617200"; d="scan'208";a="622620844" Received: from pgsmsx101.gar.corp.intel.com ([10.221.44.78]) by fmsmga002.fm.intel.com with ESMTP; 29 Oct 2014 01:08:33 -0700 Received: from pgsmsx105.gar.corp.intel.com (10.221.44.96) by PGSMSX101.gar.corp.intel.com (10.221.44.78) with Microsoft SMTP Server (TLS) id 14.3.195.1; Wed, 29 Oct 2014 16:06:52 +0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by pgsmsx105.gar.corp.intel.com (10.221.44.96) with Microsoft SMTP Server (TLS) id 14.3.195.1; Wed, 29 Oct 2014 16:06:51 +0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.202]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.174]) with mapi id 14.03.0195.001; Wed, 29 Oct 2014 16:06:50 +0800 From: "Qiu, Michael" To: "Zhang, Helin" , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH 1/2] i40e: code style fix Thread-Index: AQHP8yqUc5WzqOcWZE+auUEl+qDtFw== Date: Wed, 29 Oct 2014 08:06:50 +0000 Message-ID: <533710CFB86FA344BFBF2D6802E60286C7CC69@SHSMSX101.ccr.corp.intel.com> References: <1414554168-5117-1-git-send-email-helin.zhang@intel.com> <1414554168-5117-2-git-send-email-helin.zhang@intel.com> <533710CFB86FA344BFBF2D6802E60286C7CB9A@SHSMSX101.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 1/2] i40e: code style fix X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 29 Oct 2014 08:00:09 -0000 10/29/2014 2:26 PM, Zhang, Helin:=0A= > Hi Michael=0A= >=0A= >> -----Original Message-----=0A= >> From: Qiu, Michael=0A= >> Sent: Wednesday, October 29, 2014 2:11 PM=0A= >> To: Zhang, Helin; dev@dpdk.org=0A= >> Subject: Re: [dpdk-dev] [PATCH 1/2] i40e: code style fix=0A= >>=0A= >> 10/29/2014 11:44 AM, Helin Zhang :=0A= >>> Add several code style fixes.=0A= >>>=0A= >>> Signed-off-by: Helin Zhang =0A= >>> ---=0A= >>> lib/librte_pmd_i40e/i40e_ethdev.c | 20 +++++++++++---------=0A= >>> 1 file changed, 11 insertions(+), 9 deletions(-)=0A= >>>=0A= >>> diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c=0A= >>> b/lib/librte_pmd_i40e/i40e_ethdev.c=0A= >>> index e1f581a..20c99a4 100644=0A= >>> --- a/lib/librte_pmd_i40e/i40e_ethdev.c=0A= >>> +++ b/lib/librte_pmd_i40e/i40e_ethdev.c=0A= >>> @@ -580,7 +580,8 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)=0A= >>> uint32_t val;=0A= >>> struct i40e_hw *hw =3D I40E_VSI_TO_HW(vsi);=0A= >>> uint16_t msix_vect =3D vsi->msix_intr;=0A= >>> - uint16_t interval =3D i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTE= RVAL);=0A= >>> + uint16_t interval =3D=0A= >>> + i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);=0A= >>> int i;=0A= >>>=0A= >>> for (i =3D 0; i < vsi->nb_qps; i++)=0A= >>> @@ -603,25 +604,26 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)= =0A= >>> /* Write first RX queue to Link list register as the head element */= =0A= >>> if (vsi->type !=3D I40E_VSI_SRIOV) {=0A= >>> I40E_WRITE_REG(hw, I40E_PFINT_LNKLSTN(msix_vect - 1),=0A= >>> - (vsi->base_queue << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT)=0A= >> |=0A= >>> + (vsi->base_queue <<=0A= >> ^^^^^^^^^^^^^^^^^^=0A= >>> + I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT) |=0A= >> Here why so many indentations? or just my mail agent's display issue, if= it does=0A= >> pls ignor. anyway, it is not a beautiful style in my mind :)=0A= > I do not know why. The right patch can be downloaded directly from dpdk.o= rg. The email editor may not show the correct format.=0A= =0A= OK, if so, pls ignore my comment:)=0A= =0A= Thanks,=0A= Michael=0A= >=0A= >> I40E_WRITE_REG(hw, I40E_PFINT_LNKLSTN(msix_vect - 1),=0A= >> - (vsi->base_queue << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT)=0A= >> |=0A= >> + (vsi->base_queue <<=0A= >> + I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT) |=0A= >>=0A= >> BTW, for coding style, I think we can follow the linux kernel, for kerne= l=0A= >> indentations, it always use the format like: n"Tab"+m"space", 0 <=3D m <= =3D7.=0A= >> Another example is qemu, it is all "space" without "tab".=0A= > Yes, we have DPDK style, tab or tab + space. Space only is not allowed. C= heckpatch.pl can check it for us.=0A= >=0A= >>> (0x0 << I40E_PFINT_LNKLSTN_FIRSTQ_TYPE_SHIFT));=0A= >>>=0A= >>> I40E_WRITE_REG(hw, I40E_PFINT_ITRN(I40E_ITR_INDEX_DEFAULT,=0A= >>> - msix_vect - 1), interval);=0A= >>> + msix_vect - 1), interval);=0A= >>>=0A= >>> /* Disable auto-mask on enabling of all none-zero interrupt */=0A= >>> I40E_WRITE_REG(hw, I40E_GLINT_CTL,=0A= >>> - I40E_GLINT_CTL_DIS_AUTOMASK_N_MASK);=0A= >>> - }=0A= >>> - else {=0A= >>> + I40E_GLINT_CTL_DIS_AUTOMASK_N_MASK);=0A= >>> + } else {=0A= >>> uint32_t reg;=0A= >>> +=0A= >>> /* num_msix_vectors_vf needs to minus irq0 */=0A= >>> reg =3D (hw->func_caps.num_msix_vectors_vf - 1) *=0A= >>> vsi->user_param + (msix_vect - 1);=0A= >>>=0A= >>> - I40E_WRITE_REG(hw, I40E_VPINT_LNKLSTN(reg),=0A= >>> - (vsi->base_queue << I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT)=0A= >> |=0A= >>> - (0x0 << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT));=0A= >>> + I40E_WRITE_REG(hw, I40E_VPINT_LNKLSTN(reg), (vsi->base_queue=0A= >> <<=0A= >>> + I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT) |=0A= >>> + (0x0 << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT));=0A= >> Here the same I think.=0A= >>=0A= >> Thanks,=0A= >> Michael=0A= >>> }=0A= >>>=0A= >>> I40E_WRITE_FLUSH(hw);=0A= > Regards,=0A= > Helin=0A= >=0A= =0A=