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* [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation
@ 2020-11-02 18:35 Andrew Boyer
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 1/8] ionic: update documentation and MAINTAINERS Andrew Boyer
                   ` (18 more replies)
  0 siblings, 19 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-11-02 18:35 UTC (permalink / raw)
  To: dev; +Cc: cardigliano, Andrew Boyer

These patches make some minor changes to the ionic PMD. This is my first
patch submission to DPDK, so please let me know if there is anything amiss.

Andrew Boyer (8):
  ionic: update documentation and MAINTAINERS
  ionic: connect to the meson build system
  ionic: update ionic_if.h to the latest version
  ionic: check for devcmd/admincmd completion more frequently
  ionic: remove some unused fields
  ionic: convert 'deferred' boolean to a flag bit
  ionic: warn if RTE tries to enable loopback mode
  ionic: nits - whitespace, logging, helper variables

 MAINTAINERS                      |    5 +-
 doc/guides/nics/ionic.rst        |   13 +-
 drivers/net/ionic/ionic_dev.c    |    5 +-
 drivers/net/ionic/ionic_dev.h    |   11 +-
 drivers/net/ionic/ionic_ethdev.c |   13 +-
 drivers/net/ionic/ionic_if.h     | 1349 +++++++++++++++++++++---------
 drivers/net/ionic/ionic_lif.c    |   48 +-
 drivers/net/ionic/ionic_lif.h    |    4 +-
 drivers/net/ionic/ionic_main.c   |   40 +-
 drivers/net/ionic/ionic_osdep.h  |   10 -
 drivers/net/ionic/ionic_regs.h   |    3 -
 drivers/net/ionic/ionic_rxtx.c   |   43 +-
 drivers/net/meson.build          |    1 +
 13 files changed, 1014 insertions(+), 531 deletions(-)

-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH 1/8] ionic: update documentation and MAINTAINERS
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
@ 2020-11-02 18:35 ` Andrew Boyer
  2020-11-03 12:35   ` Ferruh Yigit
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 2/8] ionic: connect to the meson build system Andrew Boyer
                   ` (17 subsequent siblings)
  18 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-11-02 18:35 UTC (permalink / raw)
  To: dev; +Cc: cardigliano, Andrew Boyer

The ionic PMD is being actively maintained.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 MAINTAINERS               |  5 +++--
 doc/guides/nics/ionic.rst | 13 +++++++------
 2 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 5b390d1d8..7afed5f0a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -842,8 +842,9 @@ F: doc/guides/nics/pfe.rst
 F: drivers/net/pfe/
 F: doc/guides/nics/features/pfe.ini
 
-Pensando ionic - UNMAINTAINED
-M: Alfredo Cardigliano <cardigliano@ntop.org>
+Pensando ionic
+M: Andrew Boyer <aboyer@pensando.io>
+M: Pensando Drivers <drivers@pensando.io>
 F: drivers/net/ionic/
 F: doc/guides/nics/ionic.rst
 F: doc/guides/nics/features/ionic.ini
diff --git a/doc/guides/nics/ionic.rst b/doc/guides/nics/ionic.rst
index fd32926bf..2a394d15d 100644
--- a/doc/guides/nics/ionic.rst
+++ b/doc/guides/nics/ionic.rst
@@ -1,5 +1,5 @@
 ..  SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
-    Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
+    Copyright(c) 2018-2020 Pensando Systems, Inc. All rights reserved.
 
 IONIC Driver
 ============
@@ -7,15 +7,16 @@ IONIC Driver
 The ionic driver provides support for Pensando server adapters.
 It currently supports the below models:
 
-- `Naples DSC-25 <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>`_
-- `Naples DSC-100 <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>`_
+- DSC-25 dual-port 25G Distributed Services Card
+- DSC-100 dual-port 100G Distributed Services Card
 
-Please visit https://pensando.io for more information.
+Please visit the Pensando web site at https://pensando.io for more information.
+The `Documents <https://pensando.io/documents/>`_ page contains Product Briefs and other product information.
 
 Identifying the Adapter
 -----------------------
 
-To find if one or more Pensando PCI Ethernet devices are installed
+To determine if one or more Pensando DSC Ethernet devices are installed
 on the host, check for the PCI devices:
 
    .. code-block:: console
@@ -28,6 +29,6 @@ on the host, check for the PCI devices:
 Building DPDK
 -------------
 
-The ionic PMD driver supports UIO and VFIO, please refer to the
+The ionic PMD driver supports UIO and VFIO. Please refer to the
 :ref:`DPDK documentation that comes with the DPDK suite <linux_gsg>`
 for instructions on how to build DPDK.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH 2/8] ionic: connect to the meson build system
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 1/8] ionic: update documentation and MAINTAINERS Andrew Boyer
@ 2020-11-02 18:35 ` Andrew Boyer
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 3/8] ionic: update ionic_if.h to the latest version Andrew Boyer
                   ` (16 subsequent siblings)
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-11-02 18:35 UTC (permalink / raw)
  To: dev; +Cc: cardigliano, Andrew Boyer

Otherwise the ionic PMD is never built.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/meson.build | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index 4e4c2c976..5fdcab3cc 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -26,6 +26,7 @@ drivers = ['af_packet',
 	'iavf',
 	'ice',
 	'igc',
+	'ionic',
 	'ipn3ke',
 	'ixgbe',
 	'kni',
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH 3/8] ionic: update ionic_if.h to the latest version
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 1/8] ionic: update documentation and MAINTAINERS Andrew Boyer
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 2/8] ionic: connect to the meson build system Andrew Boyer
@ 2020-11-02 18:35 ` Andrew Boyer
  2020-11-03 12:44   ` Ferruh Yigit
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 4/8] ionic: check for devcmd/admincmd completion more frequently Andrew Boyer
                   ` (15 subsequent siblings)
  18 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-11-02 18:35 UTC (permalink / raw)
  To: dev; +Cc: cardigliano, Andrew Boyer

This file contains the firmware interface definitions.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_if.h   | 1349 ++++++++++++++++++++++----------
 drivers/net/ionic/ionic_regs.h |    3 -
 2 files changed, 933 insertions(+), 419 deletions(-)

diff --git a/drivers/net/ionic/ionic_if.h b/drivers/net/ionic/ionic_if.h
index f83c8711b..fe6b52b17 100644
--- a/drivers/net/ionic/ionic_if.h
+++ b/drivers/net/ionic/ionic_if.h
@@ -1,17 +1,15 @@
-/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB OR BSD-3-Clause */
-/* Copyright (c) 2017-2019 Pensando Systems, Inc.  All rights reserved. */
+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB OR BSD-2-Clause */
+/* Copyright (c) 2017-2020 Pensando Systems, Inc.  All rights reserved. */
 
 #ifndef _IONIC_IF_H_
 #define _IONIC_IF_H_
 
-#pragma pack(push, 1)
-
 #define IONIC_DEV_INFO_SIGNATURE		0x44455649      /* 'DEVI' */
 #define IONIC_DEV_INFO_VERSION			1
 #define IONIC_IFNAMSIZ				16
 
 /**
- * Commands
+ * enum ionic_cmd_opcode - Device commands
  */
 enum ionic_cmd_opcode {
 	IONIC_CMD_NOP				= 0,
@@ -42,6 +40,7 @@ enum ionic_cmd_opcode {
 	IONIC_CMD_RX_FILTER_DEL			= 32,
 
 	/* Queue commands */
+	IONIC_CMD_Q_IDENTIFY			= 39,
 	IONIC_CMD_Q_INIT			= 40,
 	IONIC_CMD_Q_CONTROL			= 41,
 
@@ -51,10 +50,17 @@ enum ionic_cmd_opcode {
 	IONIC_CMD_RDMA_CREATE_CQ		= 52,
 	IONIC_CMD_RDMA_CREATE_ADMINQ		= 53,
 
+	/* SR/IOV commands */
+	IONIC_CMD_VF_GETATTR			= 60,
+	IONIC_CMD_VF_SETATTR			= 61,
+
 	/* QoS commands */
 	IONIC_CMD_QOS_CLASS_IDENTIFY		= 240,
 	IONIC_CMD_QOS_CLASS_INIT		= 241,
 	IONIC_CMD_QOS_CLASS_RESET		= 242,
+	IONIC_CMD_QOS_CLASS_UPDATE		= 243,
+	IONIC_CMD_QOS_CLEAR_STATS		= 244,
+	IONIC_CMD_QOS_RESET			= 245,
 
 	/* Firmware commands */
 	IONIC_CMD_FW_DOWNLOAD			= 254,
@@ -62,7 +68,7 @@ enum ionic_cmd_opcode {
 };
 
 /**
- * Command Return codes
+ * enum ionic_status_code - Device command return codes
  */
 enum ionic_status_code {
 	IONIC_RC_SUCCESS	= 0,	/* Success */
@@ -86,8 +92,8 @@ enum ionic_status_code {
 	IONIC_RC_DEV_CMD	= 18,	/* Device cmd attempted on AdminQ */
 	IONIC_RC_ENOSUPP	= 19,	/* Operation not supported */
 	IONIC_RC_ERROR		= 29,	/* Generic error */
-
 	IONIC_RC_ERDMA		= 30,	/* Generic RDMA error */
+	IONIC_RC_EVFID		= 31,	/* VF ID does not exist */
 };
 
 enum ionic_notifyq_opcode {
@@ -95,10 +101,11 @@ enum ionic_notifyq_opcode {
 	IONIC_EVENT_RESET		= 2,
 	IONIC_EVENT_HEARTBEAT		= 3,
 	IONIC_EVENT_LOG			= 4,
+	IONIC_EVENT_XCVR		= 5,
 };
 
 /**
- * struct cmd - General admin command format
+ * struct ionic_admin_cmd - General admin command format
  * @opcode:     Opcode for the command
  * @lif_index:  LIF index
  * @cmd_data:   Opcode-specific command bytes
@@ -112,12 +119,11 @@ struct ionic_admin_cmd {
 
 /**
  * struct ionic_admin_comp - General admin command completion format
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
- * @cmd_data:   Command-specific bytes.
- * @color:      Color bit.  (Always 0 for commands issued to the
- *              Device Cmd Registers.)
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @cmd_data:   Command-specific bytes
+ * @color:      Color bit (Always 0 for commands issued to the
+ *              Device Cmd Registers)
  */
 struct ionic_admin_comp {
 	u8     status;
@@ -144,7 +150,7 @@ struct ionic_nop_cmd {
 
 /**
  * struct ionic_nop_comp - NOP command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_nop_comp {
 	u8 status;
@@ -154,7 +160,7 @@ struct ionic_nop_comp {
 /**
  * struct ionic_dev_init_cmd - Device init command
  * @opcode:    opcode
- * @type:      device type
+ * @type:      Device type
  */
 struct ionic_dev_init_cmd {
 	u8     opcode;
@@ -163,8 +169,8 @@ struct ionic_dev_init_cmd {
 };
 
 /**
- * struct init_comp - Device init command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_init_comp - Device init command completion
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_dev_init_comp {
 	u8 status;
@@ -181,8 +187,8 @@ struct ionic_dev_reset_cmd {
 };
 
 /**
- * struct reset_comp - Reset command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_reset_comp - Reset command completion
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_dev_reset_comp {
 	u8 status;
@@ -203,8 +209,8 @@ struct ionic_dev_identify_cmd {
 };
 
 /**
- * struct dev_identify_comp - Driver/device identify command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_identify_comp - Driver/device identify command completion
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_dev_identify_comp {
@@ -223,8 +229,8 @@ enum ionic_os_type {
 };
 
 /**
- * union drv_identity - driver identity information
- * @os_type:          OS type (see enum os_type)
+ * union ionic_drv_identity - driver identity information
+ * @os_type:          OS type (see enum ionic_os_type)
  * @os_dist:          OS distribution, numeric format
  * @os_dist_str:      OS distribution, string format
  * @kernel_ver:       Kernel version, numeric format
@@ -240,26 +246,26 @@ union ionic_drv_identity {
 		char   kernel_ver_str[32];
 		char   driver_ver_str[32];
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
- * union dev_identity - device identity information
+ * union ionic_dev_identity - device identity information
  * @version:          Version of device identify
  * @type:             Identify type (0 for now)
  * @nports:           Number of ports provisioned
  * @nlifs:            Number of LIFs provisioned
  * @nintrs:           Number of interrupts provisioned
  * @ndbpgs_per_lif:   Number of doorbell pages per LIF
- * @intr_coal_mult:   Interrupt coalescing multiplication factor.
+ * @intr_coal_mult:   Interrupt coalescing multiplication factor
  *                    Scale user-supplied interrupt coalescing
  *                    value in usecs to device units using:
  *                    device units = usecs * mult / div
- * @intr_coal_div:    Interrupt coalescing division factor.
+ * @intr_coal_div:    Interrupt coalescing division factor
  *                    Scale user-supplied interrupt coalescing
  *                    value in usecs to device units using:
  *                    device units = usecs * mult / div
- *
+ * @eq_count:         Number of shared event queues
  */
 union ionic_dev_identity {
 	struct {
@@ -273,8 +279,9 @@ union ionic_dev_identity {
 		__le32 ndbpgs_per_lif;
 		__le32 intr_coal_mult;
 		__le32 intr_coal_div;
+		__le32 eq_count;
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 enum ionic_lif_type {
@@ -284,10 +291,10 @@ enum ionic_lif_type {
 };
 
 /**
- * struct ionic_lif_identify_cmd - lif identify command
+ * struct ionic_lif_identify_cmd - LIF identify command
  * @opcode:  opcode
- * @type:    lif type (enum lif_type)
- * @ver:     version of identify returned by device
+ * @type:    LIF type (enum ionic_lif_type)
+ * @ver:     Version of identify returned by device
  */
 struct ionic_lif_identify_cmd {
 	u8 opcode;
@@ -297,9 +304,9 @@ struct ionic_lif_identify_cmd {
 };
 
 /**
- * struct ionic_lif_identify_comp - lif identify command completion
- * @status:  status of the command (enum status_code)
- * @ver:     version of identify returned by device
+ * struct ionic_lif_identify_comp - LIF identify command completion
+ * @status:  Status of the command (enum ionic_status_code)
+ * @ver:     Version of identify returned by device
  */
 struct ionic_lif_identify_comp {
 	u8 status;
@@ -307,13 +314,24 @@ struct ionic_lif_identify_comp {
 	u8 rsvd2[14];
 };
 
+/**
+ * enum ionic_lif_capability - LIF capabilities
+ * @IONIC_LIF_CAP_ETH:     LIF supports Ethernet
+ * @IONIC_LIF_CAP_RDMA:    LIF support RDMA
+ */
 enum ionic_lif_capability {
 	IONIC_LIF_CAP_ETH        = BIT(0),
 	IONIC_LIF_CAP_RDMA       = BIT(1),
 };
 
 /**
- * Logical Queue Types
+ * enum ionic_logical_qtype - Logical Queue Types
+ * @IONIC_QTYPE_ADMINQ:    Administrative Queue
+ * @IONIC_QTYPE_NOTIFYQ:   Notify Queue
+ * @IONIC_QTYPE_RXQ:       Receive Queue
+ * @IONIC_QTYPE_TXQ:       Transmit Queue
+ * @IONIC_QTYPE_EQ:        Event Queue
+ * @IONIC_QTYPE_MAX:       Max queue type supported
  */
 enum ionic_logical_qtype {
 	IONIC_QTYPE_ADMINQ  = 0,
@@ -325,11 +343,10 @@ enum ionic_logical_qtype {
 };
 
 /**
- * struct ionic_lif_logical_qtype - Descriptor of logical to hardware queue
- * type.
- * @qtype:          Hardware Queue Type.
- * @qid_count:      Number of Queue IDs of the logical type.
- * @qid_base:       Minimum Queue ID of the logical type.
+ * struct ionic_lif_logical_qtype - Descriptor of logical to HW queue type
+ * @qtype:          Hardware Queue Type
+ * @qid_count:      Number of Queue IDs of the logical type
+ * @qid_base:       Minimum Queue ID of the logical type
  */
 struct ionic_lif_logical_qtype {
 	u8     qtype;
@@ -338,20 +355,27 @@ struct ionic_lif_logical_qtype {
 	__le32 qid_base;
 };
 
+/**
+ * enum ionic_lif_state - LIF state
+ * @IONIC_LIF_DISABLE:     LIF disabled
+ * @IONIC_LIF_ENABLE:      LIF enabled
+ * @IONIC_LIF_QUIESCE:     LIF Quiesced
+ */
 enum ionic_lif_state {
-	IONIC_LIF_DISABLE	= 0,
+	IONIC_LIF_QUIESCE	= 0,
 	IONIC_LIF_ENABLE	= 1,
-	IONIC_LIF_HANG_RESET	= 2,
+	IONIC_LIF_DISABLE	= 2,
 };
 
 /**
- * LIF configuration
- * @state:          lif state (enum lif_state)
- * @name:           lif name
- * @mtu:            mtu
- * @mac:            station mac address
- * @features:       features (enum ionic_eth_hw_features)
- * @queue_count:    queue counts per queue-type
+ * union ionic_lif_config - LIF configuration
+ * @state:          LIF state (enum ionic_lif_state)
+ * @name:           LIF name
+ * @mtu:            MTU
+ * @mac:            Station MAC address
+ * @vlan:           Default Vlan ID
+ * @features:       Features (enum ionic_eth_hw_features)
+ * @queue_count:    Queue counts per queue-type
  */
 union ionic_lif_config {
 	struct {
@@ -360,45 +384,44 @@ union ionic_lif_config {
 		char   name[IONIC_IFNAMSIZ];
 		__le32 mtu;
 		u8     mac[6];
-		u8     rsvd2[2];
+		__le16 vlan;
 		__le64 features;
 		__le32 queue_count[IONIC_QTYPE_MAX];
-	};
+	} __rte_packed;
 	__le32 words[64];
 };
 
 /**
- * struct ionic_lif_identity - lif identity information (type-specific)
+ * struct ionic_lif_identity - LIF identity information (type-specific)
  *
- * @capabilities    LIF capabilities
+ * @capabilities:        LIF capabilities
  *
- * Ethernet:
- *     @version:          Ethernet identify structure version.
- *     @features:         Ethernet features supported on this lif type.
- *     @max_ucast_filters:  Number of perfect unicast addresses supported.
- *     @max_mcast_filters:  Number of perfect multicast addresses supported.
- *     @min_frame_size:   Minimum size of frames to be sent
- *     @max_frame_size:   Maximum size of frames to be sent
- *     @config:           LIF config struct with features, mtu, mac, q counts
+ * @eth:                    Ethernet identify structure
+ *     @version:            Ethernet identify structure version
+ *     @max_ucast_filters:  Number of perfect unicast addresses supported
+ *     @max_mcast_filters:  Number of perfect multicast addresses supported
+ *     @min_frame_size:     Minimum size of frames to be sent
+ *     @max_frame_size:     Maximim size of frames to be sent
+ *     @config:             LIF config struct with features, mtu, mac, q counts
  *
- * RDMA:
- *     @version:         RDMA version of opcodes and queue descriptors.
- *     @qp_opcodes:      Number of rdma queue pair opcodes supported.
- *     @admin_opcodes:   Number of rdma admin opcodes supported.
- *     @npts_per_lif:    Page table size per lif
- *     @nmrs_per_lif:    Number of memory regions per lif
- *     @nahs_per_lif:    Number of address handles per lif
- *     @max_stride:      Max work request stride.
- *     @cl_stride:       Cache line stride.
- *     @pte_stride:      Page table entry stride.
- *     @rrq_stride:      Remote RQ work request stride.
- *     @rsq_stride:      Remote SQ work request stride.
+ * @rdma:                RDMA identify structure
+ *     @version:         RDMA version of opcodes and queue descriptors
+ *     @qp_opcodes:      Number of RDMA queue pair opcodes supported
+ *     @admin_opcodes:   Number of RDMA admin opcodes supported
+ *     @npts_per_lif:    Page table size per LIF
+ *     @nmrs_per_lif:    Number of memory regions per LIF
+ *     @nahs_per_lif:    Number of address handles per LIF
+ *     @max_stride:      Max work request stride
+ *     @cl_stride:       Cache line stride
+ *     @pte_stride:      Page table entry stride
+ *     @rrq_stride:      Remote RQ work request stride
+ *     @rsq_stride:      Remote SQ work request stride
  *     @dcqcn_profiles:  Number of DCQCN profiles
- *     @aq_qtype:        RDMA Admin Qtype.
- *     @sq_qtype:        RDMA Send Qtype.
- *     @rq_qtype:        RDMA Receive Qtype.
- *     @cq_qtype:        RDMA Completion Qtype.
- *     @eq_qtype:        RDMA Event Qtype.
+ *     @aq_qtype:        RDMA Admin Qtype
+ *     @sq_qtype:        RDMA Send Qtype
+ *     @rq_qtype:        RDMA Receive Qtype
+ *     @cq_qtype:        RDMA Completion Qtype
+ *     @eq_qtype:        RDMA Event Qtype
  */
 union ionic_lif_identity {
 	struct {
@@ -414,7 +437,7 @@ union ionic_lif_identity {
 			__le32 max_frame_size;
 			u8 rsvd2[106];
 			union ionic_lif_config config;
-		} eth;
+		} __rte_packed eth;
 
 		struct {
 			u8 version;
@@ -436,17 +459,17 @@ union ionic_lif_identity {
 			struct ionic_lif_logical_qtype rq_qtype;
 			struct ionic_lif_logical_qtype cq_qtype;
 			struct ionic_lif_logical_qtype eq_qtype;
-		} rdma;
-	};
-	__le32 words[512];
+		} __rte_packed rdma;
+	} __rte_packed;
+	__le32 words[478];
 };
 
 /**
  * struct ionic_lif_init_cmd - LIF init command
- * @opcode:       opcode
- * @type:         LIF type (enum lif_type)
+ * @opcode:       Opcode
+ * @type:         LIF type (enum ionic_lif_type)
  * @index:        LIF index
- * @info_pa:      destination address for lif info (struct ionic_lif_info)
+ * @info_pa:      Destination address for LIF info (struct ionic_lif_info)
  */
 struct ionic_lif_init_cmd {
 	u8     opcode;
@@ -459,7 +482,8 @@ struct ionic_lif_init_cmd {
 
 /**
  * struct ionic_lif_init_comp - LIF init command completion
- * @status: The status of the command (enum status_code)
+ * @status:	Status of the command (enum ionic_status_code)
+ * @hw_index:	Hardware index of the initialized LIF
  */
 struct ionic_lif_init_comp {
 	u8 status;
@@ -468,14 +492,74 @@ struct ionic_lif_init_comp {
 	u8 rsvd2[12];
 };
 
+/**
+ * struct ionic_q_identify_cmd - queue identify command
+ * @opcode:     opcode
+ * @lif_type:   LIF type (enum ionic_lif_type)
+ * @type:       Logical queue type (enum ionic_logical_qtype)
+ * @ver:        Highest queue type version that the driver supports
+ */
+struct ionic_q_identify_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 lif_type;
+	u8     type;
+	u8     ver;
+	u8     rsvd2[58];
+};
+
+/**
+ * struct ionic_q_identify_comp - queue identify command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @ver:        Queue type version that can be used with FW
+ */
+struct ionic_q_identify_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	u8     ver;
+	u8     rsvd2[11];
+};
+
+/**
+ * union ionic_q_identity - queue identity information
+ *     @version:        Queue type version that can be used with FW
+ *     @supported:      Bitfield of queue versions, first bit = ver 0
+ *     @features:       Queue features
+ *     @desc_sz:        Descriptor size
+ *     @comp_sz:        Completion descriptor size
+ *     @sg_desc_sz:     Scatter/Gather descriptor size
+ *     @max_sg_elems:   Maximum number of Scatter/Gather elements
+ *     @sg_desc_stride: Number of Scatter/Gather elements per descriptor
+ */
+union ionic_q_identity {
+	struct {
+		u8      version;
+		u8      supported;
+		u8      rsvd[6];
+#define IONIC_QIDENT_F_CQ	0x01	/* queue has completion ring */
+#define IONIC_QIDENT_F_SG	0x02	/* queue has scatter/gather ring */
+#define IONIC_QIDENT_F_EQ	0x04	/* queue can use event queue */
+#define IONIC_QIDENT_F_CMB	0x08	/* queue is in cmb bar */
+		__le64  features;
+		__le16  desc_sz;
+		__le16  comp_sz;
+		__le16  sg_desc_sz;
+		__le16  max_sg_elems;
+		__le16  sg_desc_stride;
+	};
+	__le32 words[478];
+};
+
 /**
  * struct ionic_q_init_cmd - Queue init command
  * @opcode:       opcode
  * @type:         Logical queue type
- * @ver:          Queue version (defines opcode/descriptor scope)
+ * @ver:          Queue type version
  * @lif_index:    LIF index
- * @index:        (lif, qtype) relative admin queue index
- * @intr_index:   Interrupt control register index
+ * @index:        (LIF, qtype) relative admin queue index
+ * @intr_index:   Interrupt control register index, or Event queue index
  * @pid:          Process ID
  * @flags:
  *    IRQ:        Interrupt requested on completion
@@ -493,12 +577,11 @@ struct ionic_lif_init_comp {
  *                descriptors.  Values of ring_size <2 and >16 are
  *                reserved.
  *    EQ:         Enable the Event Queue
- * @cos:          Class of service for this queue.
+ * @cos:          Class of service for this queue
  * @ring_size:    Queue ring size, encoded as a log2(size)
  * @ring_base:    Queue ring base address
  * @cq_ring_base: Completion queue ring base address
  * @sg_ring_base: Scatter/Gather ring base address
- * @eq_index:	  Event queue index
  */
 struct ionic_q_init_cmd {
 	u8     opcode;
@@ -515,29 +598,27 @@ struct ionic_q_init_cmd {
 #define IONIC_QINIT_F_ENA	0x02	/* Enable the queue */
 #define IONIC_QINIT_F_SG	0x04	/* Enable scatter/gather on the queue */
 #define IONIC_QINIT_F_EQ	0x08	/* Enable event queue */
-#define IONIC_QINIT_F_DEBUG 0x80	/* Enable queue debugging */
+#define IONIC_QINIT_F_CMB	0x10	/* Enable cmb-based queue */
+#define IONIC_QINIT_F_DEBUG	0x80	/* Enable queue debugging */
 	u8     cos;
 	u8     ring_size;
 	__le64 ring_base;
 	__le64 cq_ring_base;
 	__le64 sg_ring_base;
-	__le32 eq_index;
-	u8     rsvd2[16];
-};
+	u8     rsvd2[20];
+} __rte_packed;
 
 /**
  * struct ionic_q_init_comp - Queue init command completion
- * @status:     The status of the command (enum status_code)
- * @ver:        Queue version (defines opcode/descriptor scope)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @hw_index:   Hardware Queue ID
  * @hw_type:    Hardware Queue type
  * @color:      Color
  */
 struct ionic_q_init_comp {
 	u8     status;
-	u8     ver;
+	u8     rsvd;
 	__le16 comp_index;
 	__le32 hw_index;
 	u8     hw_type;
@@ -558,10 +639,9 @@ enum ionic_txq_desc_opcode {
 
 /**
  * struct ionic_txq_desc - Ethernet Tx queue descriptor format
- * @opcode:       Tx operation, see TXQ_DESC_OPCODE_*:
+ * @cmd:          Tx operation, see IONIC_TXQ_DESC_OPCODE_*:
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_NONE:
- *
  *                      Non-offload send.  No segmentation,
  *                      fragmentation or checksum calc/insertion is
  *                      performed by device; packet is prepared
@@ -569,7 +649,6 @@ enum ionic_txq_desc_opcode {
  *                      no further manipulation from device.
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_PARTIAL:
- *
  *                      Offload 16-bit L4 checksum
  *                      calculation/insertion.  The device will
  *                      calculate the L4 checksum value and
@@ -578,14 +657,16 @@ enum ionic_txq_desc_opcode {
  *                      is calculated starting at @csum_start bytes
  *                      into the packet to the end of the packet.
  *                      The checksum insertion position is given
- *                      in @csum_offset.  This feature is only
- *                      applicable to protocols such as TCP, UDP
- *                      and ICMP where a standard (i.e. the
- *                      'IP-style' checksum) one's complement
- *                      16-bit checksum is used, using an IP
- *                      pseudo-header to seed the calculation.
- *                      Software will preload the L4 checksum
- *                      field with the IP pseudo-header checksum.
+ *                      in @csum_offset, which is the offset from
+ *                      @csum_start to the checksum field in the L4
+ *                      header.  This feature is only applicable to
+ *                      protocols such as TCP, UDP and ICMP where a
+ *                      standard (i.e. the 'IP-style' checksum)
+ *                      one's complement 16-bit checksum is used,
+ *                      using an IP pseudo-header to seed the
+ *                      calculation.  Software will preload the L4
+ *                      checksum field with the IP pseudo-header
+ *                      checksum.
  *
  *                      For tunnel encapsulation, @csum_start and
  *                      @csum_offset refer to the inner L4
@@ -597,11 +678,10 @@ enum ionic_txq_desc_opcode {
  *                      the @encap is set, the device will
  *                      offload the outer header checksums using
  *                      LCO (local checksum offload) (see
- *                      Documentation/networking/checksum-
- *                      offloads.txt for more info).
+ *                      Documentation/networking/checksum-offloads.rst
+ *                      for more info).
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_HW:
- *
  *                      Offload 16-bit checksum computation to hardware.
  *                      If @csum_l3 is set then the packet's L3 checksum is
  *                      updated. Similarly, if @csum_l4 is set the the L4
@@ -609,8 +689,7 @@ enum ionic_txq_desc_opcode {
  *                      checksums are also updated.
  *
  *                   IONIC_TXQ_DESC_OPCODE_TSO:
- *
- *                      Device performs TCP segmentation offload
+ *                      Device preforms TCP segmentation offload
  *                      (TSO).  @hdr_len is the number of bytes
  *                      to the end of TCP header (the offset to
  *                      the TCP payload).  @mss is the desired
@@ -636,40 +715,41 @@ enum ionic_txq_desc_opcode {
  *                      clear CWR in remaining segments.
  * @flags:
  *                vlan:
- *                    Insert an L2 VLAN header using @vlan_tci.
+ *                    Insert an L2 VLAN header using @vlan_tci
  *                encap:
- *                    Calculate encap header checksum.
+ *                    Calculate encap header checksum
  *                csum_l3:
- *                    Compute L3 header checksum.
+ *                    Compute L3 header checksum
  *                csum_l4:
- *                    Compute L4 header checksum.
+ *                    Compute L4 header checksum
  *                tso_sot:
  *                    TSO start
  *                tso_eot:
  *                    TSO end
  * @num_sg_elems: Number of scatter-gather elements in SG
  *                descriptor
- * @addr:         First data buffer's DMA address.
- *                (Subsequent data buffers are on txq_sg_desc).
+ * @addr:         First data buffer's DMA address
+ *                (Subsequent data buffers are on txq_sg_desc)
  * @len:          First data buffer's length, in bytes
  * @vlan_tci:     VLAN tag to insert in the packet (if requested
  *                by @V-bit).  Includes .1p and .1q tags
  * @hdr_len:      Length of packet headers, including
- *                encapsulating outer header, if applicable.
- *                Valid for opcodes TXQ_DESC_OPCODE_CALC_CSUM and
- *                TXQ_DESC_OPCODE_TSO.  Should be set to zero for
+ *                encapsulating outer header, if applicable
+ *                Valid for opcodes IONIC_TXQ_DESC_OPCODE_CALC_CSUM and
+ *                IONIC_TXQ_DESC_OPCODE_TSO.  Should be set to zero for
  *                all other modes.  For
- *                TXQ_DESC_OPCODE_CALC_CSUM, @hdr_len is length
+ *                IONIC_TXQ_DESC_OPCODE_CALC_CSUM, @hdr_len is length
  *                of headers up to inner-most L4 header.  For
- *                TXQ_DESC_OPCODE_TSO, @hdr_len is up to
+ *                IONIC_TXQ_DESC_OPCODE_TSO, @hdr_len is up to
  *                inner-most L4 payload, so inclusive of
  *                inner-most L4 header.
- * @mss:          Desired MSS value for TSO.  Only applicable for
- *                TXQ_DESC_OPCODE_TSO.
- * @csum_start:   Offset into inner-most L3 header of checksum
- * @csum_offset:  Offset into inner-most L4 header of checksum
+ * @mss:          Desired MSS value for TSO; only applicable for
+ *                IONIC_TXQ_DESC_OPCODE_TSO
+ * @csum_start:   Offset from packet to first byte checked in L4 checksum
+ * @csum_offset:  Offset from csum_start to L4 checksum field
  */
-
+struct ionic_txq_desc {
+	__le64  cmd;
 #define IONIC_TXQ_DESC_OPCODE_MASK		0xf
 #define IONIC_TXQ_DESC_OPCODE_SHIFT		4
 #define IONIC_TXQ_DESC_FLAGS_MASK		0xf
@@ -691,8 +771,6 @@ enum ionic_txq_desc_opcode {
 #define IONIC_TXQ_DESC_FLAG_TSO_SOT		0x4
 #define IONIC_TXQ_DESC_FLAG_TSO_EOT		0x8
 
-struct ionic_txq_desc {
-	__le64  cmd;
 	__le16  len;
 	union {
 		__le16  vlan_tci;
@@ -719,45 +797,60 @@ static inline u64 encode_txq_desc_cmd(u8 opcode, u8 flags,
 		IONIC_TXQ_DESC_OPCODE_SHIFT;
 	cmd |= (flags & IONIC_TXQ_DESC_FLAGS_MASK) <<
 		IONIC_TXQ_DESC_FLAGS_SHIFT;
-	cmd |= (nsge & IONIC_TXQ_DESC_NSGE_MASK) << IONIC_TXQ_DESC_NSGE_SHIFT;
-	cmd |= (addr & IONIC_TXQ_DESC_ADDR_MASK) << IONIC_TXQ_DESC_ADDR_SHIFT;
+	cmd |= (nsge & IONIC_TXQ_DESC_NSGE_MASK) <<
+		IONIC_TXQ_DESC_NSGE_SHIFT;
+	cmd |= (addr & IONIC_TXQ_DESC_ADDR_MASK) <<
+		IONIC_TXQ_DESC_ADDR_SHIFT;
 
 	return cmd;
 };
 
-static inline void decode_txq_desc_cmd(u64 cmd, u8 *opcode, u8 *flags,
+static inline void
+decode_txq_desc_cmd(u64 cmd, u8 *opcode, u8 *flags,
 				       u8 *nsge, u64 *addr)
 {
 	*opcode = (cmd >> IONIC_TXQ_DESC_OPCODE_SHIFT) &
 		IONIC_TXQ_DESC_OPCODE_MASK;
 	*flags = (cmd >> IONIC_TXQ_DESC_FLAGS_SHIFT) &
 		IONIC_TXQ_DESC_FLAGS_MASK;
-	*nsge = (cmd >> IONIC_TXQ_DESC_NSGE_SHIFT) & IONIC_TXQ_DESC_NSGE_MASK;
-	*addr = (cmd >> IONIC_TXQ_DESC_ADDR_SHIFT) & IONIC_TXQ_DESC_ADDR_MASK;
+	*nsge = (cmd >> IONIC_TXQ_DESC_NSGE_SHIFT) &
+		IONIC_TXQ_DESC_NSGE_MASK;
+	*addr = (cmd >> IONIC_TXQ_DESC_ADDR_SHIFT) &
+		IONIC_TXQ_DESC_ADDR_MASK;
 };
 
-#define IONIC_TX_MAX_SG_ELEMS	8
-#define IONIC_RX_MAX_SG_ELEMS	8
-
 /**
- * struct ionic_txq_sg_desc - Transmit scatter-gather (SG) list
+ * struct ionic_txq_sg_elem - Transmit scatter-gather (SG) descriptor element
  * @addr:      DMA address of SG element data buffer
  * @len:       Length of SG element data buffer, in bytes
  */
+struct ionic_txq_sg_elem {
+	__le64 addr;
+	__le16 len;
+	__le16 rsvd[3];
+};
+
+/**
+ * struct ionic_txq_sg_desc - Transmit scatter-gather (SG) list
+ * @elems:     Scatter-gather elements
+ */
 struct ionic_txq_sg_desc {
-	struct ionic_txq_sg_elem {
-		__le64 addr;
-		__le16 len;
-		__le16 rsvd[3];
-	} elems[IONIC_TX_MAX_SG_ELEMS];
+#define IONIC_TX_MAX_SG_ELEMS		8
+#define IONIC_TX_SG_DESC_STRIDE		8
+	struct ionic_txq_sg_elem elems[IONIC_TX_MAX_SG_ELEMS];
+};
+
+struct ionic_txq_sg_desc_v1 {
+#define IONIC_TX_MAX_SG_ELEMS_V1		15
+#define IONIC_TX_SG_DESC_STRIDE_V1		16
+	struct ionic_txq_sg_elem elems[IONIC_TX_SG_DESC_STRIDE_V1];
 };
 
 /**
  * struct ionic_txq_comp - Ethernet transmit queue completion descriptor
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *                 is the completion.
- * @color:      Color bit.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @color:      Color bit
  */
 struct ionic_txq_comp {
 	u8     status;
@@ -774,16 +867,15 @@ enum ionic_rxq_desc_opcode {
 
 /**
  * struct ionic_rxq_desc - Ethernet Rx queue descriptor format
- * @opcode:       Rx operation, see RXQ_DESC_OPCODE_*:
- *
- *                   RXQ_DESC_OPCODE_SIMPLE:
+ * @opcode:       Rx operation, see IONIC_RXQ_DESC_OPCODE_*:
  *
+ *                   IONIC_RXQ_DESC_OPCODE_SIMPLE:
  *                      Receive full packet into data buffer
  *                      starting at @addr.  Results of
  *                      receive, including actual bytes received,
  *                      are recorded in Rx completion descriptor.
  *
- * @len:          Data buffer's length, in bytes.
+ * @len:          Data buffer's length, in bytes
  * @addr:         Data buffer's DMA address
  */
 struct ionic_rxq_desc {
@@ -794,26 +886,33 @@ struct ionic_rxq_desc {
 };
 
 /**
- * struct ionic_rxq_sg_desc - Receive scatter-gather (SG) list
+ * struct ionic_rxq_sg_elem - Receive scatter-gather (SG) descriptor element
  * @addr:      DMA address of SG element data buffer
  * @len:       Length of SG element data buffer, in bytes
  */
+struct ionic_rxq_sg_elem {
+	__le64 addr;
+	__le16 len;
+	__le16 rsvd[3];
+};
+
+/**
+ * struct ionic_rxq_sg_desc - Receive scatter-gather (SG) list
+ * @elems:     Scatter-gather elements
+ */
 struct ionic_rxq_sg_desc {
-	struct ionic_rxq_sg_elem {
-		__le64 addr;
-		__le16 len;
-		__le16 rsvd[3];
-	} elems[IONIC_RX_MAX_SG_ELEMS];
+#define IONIC_RX_MAX_SG_ELEMS		8
+#define IONIC_RX_SG_DESC_STRIDE		8
+	struct ionic_rxq_sg_elem elems[IONIC_RX_SG_DESC_STRIDE];
 };
 
 /**
  * struct ionic_rxq_comp - Ethernet receive queue completion descriptor
- * @status:       The status of the command (enum status_code)
+ * @status:       Status of the command (enum ionic_status_code)
  * @num_sg_elems: Number of SG elements used by this descriptor
- * @comp_index:   The index in the descriptor ring for which this
- *                is the completion.
+ * @comp_index:   Index in the descriptor ring for which this is the completion
  * @rss_hash:     32-bit RSS hash
- * @csum:         16-bit sum of the packet's L2 payload.
+ * @csum:         16-bit sum of the packet's L2 payload
  *                If the packet's L2 payload is odd length, an extra
  *                zero-value byte is included in the @csum calculation but
  *                not included in @len.
@@ -821,33 +920,51 @@ struct ionic_rxq_sg_desc {
  *                set.  Includes .1p and .1q tags.
  * @len:          Received packet length, in bytes.  Excludes FCS.
  * @csum_calc     L2 payload checksum is computed or not
- * @csum_tcp_ok:  The TCP checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                TCP header
- * @csum_tcp_bad: The TCP checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                TCP header.
- * @csum_udp_ok:  The UDP checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                UDP header
- * @csum_udp_bad: The UDP checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                UDP header.
- * @csum_ip_ok:   The IPv4 checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                first IPv4 header.  If the receive packet
- *                contains both a tunnel IPv4 header and a
- *                transport IPv4 header, the device validates the
- *                checksum for the both IPv4 headers.
- * @csum_ip_bad:  The IPv4 checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                first IPv4 header. If the receive packet
- *                contains both a tunnel IPv4 header and a
- *                transport IPv4 header, the device validates the
- *                checksum for both IP headers.
- * @VLAN:         VLAN header was stripped and placed in @vlan_tci.
- * @pkt_type:     Packet type
- * @color:        Color bit.
+ * @csum_flags:   See IONIC_RXQ_COMP_CSUM_F_*:
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_TCP_OK:
+ *                    The TCP checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    TCP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_TCP_BAD:
+ *                    The TCP checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    TCP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_UDP_OK:
+ *                    The UDP checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    UDP header
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_UDP_BAD:
+ *                    The UDP checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    UDP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_IP_OK:
+ *                    The IPv4 checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    first IPv4 header.  If the receive packet
+ *                    contains both a tunnel IPv4 header and a
+ *                    transport IPv4 header, the device validates the
+ *                    checksum for the both IPv4 headers.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_IP_BAD:
+ *                    The IPv4 checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    first IPv4 header. If the receive packet
+ *                    contains both a tunnel IPv4 header and a
+ *                    transport IPv4 header, the device validates the
+ *                    checksum for both IP headers.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_VLAN:
+ *                    The VLAN header was stripped and placed in @vlan_tci.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_CALC:
+ *                    The checksum was calculated by the device.
+ *
+ * @pkt_type_color: Packet type and color bit; see IONIC_RXQ_COMP_PKT_TYPE_MASK
  */
 struct ionic_rxq_comp {
 	u8     status;
@@ -871,13 +988,21 @@ struct ionic_rxq_comp {
 };
 
 enum ionic_pkt_type {
-	IONIC_PKT_TYPE_NON_IP     = 0x000,
-	IONIC_PKT_TYPE_IPV4       = 0x001,
-	IONIC_PKT_TYPE_IPV4_TCP   = 0x003,
-	IONIC_PKT_TYPE_IPV4_UDP   = 0x005,
-	IONIC_PKT_TYPE_IPV6       = 0x008,
-	IONIC_PKT_TYPE_IPV6_TCP   = 0x018,
-	IONIC_PKT_TYPE_IPV6_UDP   = 0x028,
+	IONIC_PKT_TYPE_NON_IP		= 0x00,
+	IONIC_PKT_TYPE_IPV4		= 0x01,
+	IONIC_PKT_TYPE_IPV4_TCP		= 0x03,
+	IONIC_PKT_TYPE_IPV4_UDP		= 0x05,
+	IONIC_PKT_TYPE_IPV6		= 0x08,
+	IONIC_PKT_TYPE_IPV6_TCP		= 0x18,
+	IONIC_PKT_TYPE_IPV6_UDP		= 0x28,
+	/* below types are only used if encap offloads are enabled on lif */
+	IONIC_PKT_TYPE_ENCAP_NON_IP	= 0x40,
+	IONIC_PKT_TYPE_ENCAP_IPV4	= 0x41,
+	IONIC_PKT_TYPE_ENCAP_IPV4_TCP	= 0x43,
+	IONIC_PKT_TYPE_ENCAP_IPV4_UDP	= 0x45,
+	IONIC_PKT_TYPE_ENCAP_IPV6	= 0x48,
+	IONIC_PKT_TYPE_ENCAP_IPV6_TCP	= 0x58,
+	IONIC_PKT_TYPE_ENCAP_IPV6_UDP	= 0x68,
 };
 
 enum ionic_eth_hw_features {
@@ -894,10 +1019,13 @@ enum ionic_eth_hw_features {
 	IONIC_ETH_HW_TSO_ECN		= BIT(10),
 	IONIC_ETH_HW_TSO_GRE		= BIT(11),
 	IONIC_ETH_HW_TSO_GRE_CSUM	= BIT(12),
-	IONIC_ETH_HW_TSO_IPXIP4	= BIT(13),
-	IONIC_ETH_HW_TSO_IPXIP6	= BIT(14),
+	IONIC_ETH_HW_TSO_IPXIP4		= BIT(13),
+	IONIC_ETH_HW_TSO_IPXIP6		= BIT(14),
 	IONIC_ETH_HW_TSO_UDP		= BIT(15),
 	IONIC_ETH_HW_TSO_UDP_CSUM	= BIT(16),
+	IONIC_ETH_HW_RX_CSUM_GENEVE	= BIT(17),
+	IONIC_ETH_HW_TX_CSUM_GENEVE	= BIT(18),
+	IONIC_ETH_HW_TSO_GENEVE		= BIT(19)
 };
 
 /**
@@ -906,7 +1034,7 @@ enum ionic_eth_hw_features {
  * @type:       Queue type
  * @lif_index:  LIF index
  * @index:      Queue index
- * @oper:       Operation (enum q_control_oper)
+ * @oper:       Operation (enum ionic_q_control_oper)
  */
 struct ionic_q_control_cmd {
 	u8     opcode;
@@ -919,14 +1047,17 @@ struct ionic_q_control_cmd {
 
 typedef struct ionic_admin_comp ionic_q_control_comp;
 
-enum q_control_oper {
+enum ionic_q_control_oper {
 	IONIC_Q_DISABLE		= 0,
 	IONIC_Q_ENABLE		= 1,
 	IONIC_Q_HANG_RESET	= 2,
 };
 
 /**
- * Physical connection type
+ * enum ionic_phy_type - Physical connection type
+ * @IONIC_PHY_TYPE_NONE:    No PHY installed
+ * @IONIC_PHY_TYPE_COPPER:  Copper PHY
+ * @IONIC_PHY_TYPE_FIBER:   Fiber PHY
  */
 enum ionic_phy_type {
 	IONIC_PHY_TYPE_NONE	= 0,
@@ -935,18 +1066,23 @@ enum ionic_phy_type {
 };
 
 /**
- * Transceiver status
+ * enum ionic_xcvr_state - Transceiver status
+ * @IONIC_XCVR_STATE_REMOVED:        Transceiver removed
+ * @IONIC_XCVR_STATE_INSERTED:       Transceiver inserted
+ * @IONIC_XCVR_STATE_PENDING:        Transceiver pending
+ * @IONIC_XCVR_STATE_SPROM_READ:     Transceiver data read
+ * @IONIC_XCVR_STATE_SPROM_READ_ERR: Transceiver data read error
  */
 enum ionic_xcvr_state {
 	IONIC_XCVR_STATE_REMOVED	 = 0,
 	IONIC_XCVR_STATE_INSERTED	 = 1,
 	IONIC_XCVR_STATE_PENDING	 = 2,
 	IONIC_XCVR_STATE_SPROM_READ	 = 3,
-	IONIC_XCVR_STATE_SPROM_READ_ERR  = 4,
+	IONIC_XCVR_STATE_SPROM_READ_ERR	 = 4,
 };
 
 /**
- * Supported link modes
+ * enum ionic_xcvr_pid - Supported link modes
  */
 enum ionic_xcvr_pid {
 	IONIC_XCVR_PID_UNKNOWN           = 0,
@@ -980,67 +1116,74 @@ enum ionic_xcvr_pid {
 	IONIC_XCVR_PID_SFP_10GBASE_CU   = 68,
 	IONIC_XCVR_PID_QSFP_100G_CWDM4  = 69,
 	IONIC_XCVR_PID_QSFP_100G_PSM4   = 70,
+	IONIC_XCVR_PID_SFP_25GBASE_ACC  = 71,
 };
 
 /**
- * Port types
- */
-enum ionic_port_type {
-	IONIC_PORT_TYPE_NONE = 0,  /* port type not configured */
-	IONIC_PORT_TYPE_ETH  = 1,  /* port carries ethernet traffic (inband) */
-	IONIC_PORT_TYPE_MGMT = 2,  /* port carries mgmt traffic (out-of-band) */
-};
-
-/**
- * Port config state
+ * enum ionic_port_admin_state - Port config state
+ * @IONIC_PORT_ADMIN_STATE_NONE:    Port admin state not configured
+ * @IONIC_PORT_ADMIN_STATE_DOWN:    Port admin disabled
+ * @IONIC_PORT_ADMIN_STATE_UP:      Port admin enabled
  */
 enum ionic_port_admin_state {
-	IONIC_PORT_ADMIN_STATE_NONE = 0,   /* port admin state not configured */
-	IONIC_PORT_ADMIN_STATE_DOWN = 1,   /* port is admin disabled */
-	IONIC_PORT_ADMIN_STATE_UP   = 2,   /* port is admin enabled */
+	IONIC_PORT_ADMIN_STATE_NONE = 0,
+	IONIC_PORT_ADMIN_STATE_DOWN = 1,
+	IONIC_PORT_ADMIN_STATE_UP   = 2,
 };
 
 /**
- * Port operational status
+ * enum ionic_port_oper_status - Port operational status
+ * @IONIC_PORT_OPER_STATUS_NONE:    Port disabled
+ * @IONIC_PORT_OPER_STATUS_UP:      Port link status up
+ * @IONIC_PORT_OPER_STATUS_DOWN:    Port link status down
  */
 enum ionic_port_oper_status {
-	IONIC_PORT_OPER_STATUS_NONE  = 0,	/* port is disabled */
-	IONIC_PORT_OPER_STATUS_UP    = 1,	/* port is linked up */
-	IONIC_PORT_OPER_STATUS_DOWN  = 2,	/* port link status is down */
+	IONIC_PORT_OPER_STATUS_NONE  = 0,
+	IONIC_PORT_OPER_STATUS_UP    = 1,
+	IONIC_PORT_OPER_STATUS_DOWN  = 2,
 };
 
 /**
- * Ethernet Forward error correction (fec) modes
+ * enum ionic_port_fec_type - Ethernet Forward error correction (FEC) modes
+ * @IONIC_PORT_FEC_TYPE_NONE:       FEC Disabled
+ * @IONIC_PORT_FEC_TYPE_FC:         FireCode FEC
+ * @IONIC_PORT_FEC_TYPE_RS:         ReedSolomon FEC
  */
 enum ionic_port_fec_type {
-	IONIC_PORT_FEC_TYPE_NONE = 0,		/* Disabled */
-	IONIC_PORT_FEC_TYPE_FC   = 1,		/* FireCode */
-	IONIC_PORT_FEC_TYPE_RS   = 2,		/* ReedSolomon */
+	IONIC_PORT_FEC_TYPE_NONE = 0,
+	IONIC_PORT_FEC_TYPE_FC   = 1,
+	IONIC_PORT_FEC_TYPE_RS   = 2,
 };
 
 /**
- * Ethernet pause (flow control) modes
+ * enum ionic_port_pause_type - Ethernet pause (flow control) modes
+ * @IONIC_PORT_PAUSE_TYPE_NONE:     Disable Pause
+ * @IONIC_PORT_PAUSE_TYPE_LINK:     Link level pause
+ * @IONIC_PORT_PAUSE_TYPE_PFC:      Priority-Flow Control
  */
 enum ionic_port_pause_type {
-	IONIC_PORT_PAUSE_TYPE_NONE = 0,	/* Disable Pause */
-	IONIC_PORT_PAUSE_TYPE_LINK = 1,	/* Link level pause */
-	IONIC_PORT_PAUSE_TYPE_PFC  = 2,	/* Priority-Flow control */
+	IONIC_PORT_PAUSE_TYPE_NONE = 0,
+	IONIC_PORT_PAUSE_TYPE_LINK = 1,
+	IONIC_PORT_PAUSE_TYPE_PFC  = 2,
 };
 
 /**
- * Loopback modes
+ * enum ionic_port_loopback_mode - Loopback modes
+ * @IONIC_PORT_LOOPBACK_MODE_NONE:  Disable loopback
+ * @IONIC_PORT_LOOPBACK_MODE_MAC:   MAC loopback
+ * @IONIC_PORT_LOOPBACK_MODE_PHY:   PHY/SerDes loopback
  */
 enum ionic_port_loopback_mode {
-	IONIC_PORT_LOOPBACK_MODE_NONE = 0,	/* Disable loopback */
-	IONIC_PORT_LOOPBACK_MODE_MAC  = 1,	/* MAC loopback */
-	IONIC_PORT_LOOPBACK_MODE_PHY  = 2,	/* PHY/Serdes loopback */
+	IONIC_PORT_LOOPBACK_MODE_NONE = 0,
+	IONIC_PORT_LOOPBACK_MODE_MAC  = 1,
+	IONIC_PORT_LOOPBACK_MODE_PHY  = 2,
 };
 
 /**
- * Transceiver Status information
+ * struct ionic_xcvr_status - Transceiver Status information
  * @state:    Transceiver status (enum ionic_xcvr_state)
  * @phy:      Physical connection type (enum ionic_phy_type)
- * @pid:      Transceiver link mode (enum pid)
+ * @pid:      Transceiver link mode (enum ionic_xcvr_pid)
  * @sprom:    Transceiver sprom contents
  */
 struct ionic_xcvr_status {
@@ -1051,10 +1194,10 @@ struct ionic_xcvr_status {
 };
 
 /**
- * Port configuration
+ * union ionic_port_config - Port configuration
  * @speed:              port speed (in Mbps)
  * @mtu:                mtu
- * @state:              port admin state (enum port_admin_state)
+ * @state:              port admin state (enum ionic_port_admin_state)
  * @an_enable:          autoneg enable
  * @fec_type:           fec type (enum ionic_port_fec_type)
  * @pause_type:         pause type (enum ionic_port_pause_type)
@@ -1084,19 +1227,23 @@ union ionic_port_config {
 };
 
 /**
- * Port Status information
+ * struct ionic_port_status - Port Status information
  * @status:             link status (enum ionic_port_oper_status)
  * @id:                 port id
  * @speed:              link speed (in Mbps)
- * @xcvr:               transceiver status
+ * @link_down_count:    number of times link went from up to down
+ * @fec_type:           fec type (enum ionic_port_fec_type)
+ * @xcvr:               tranceiver status
  */
 struct ionic_port_status {
 	__le32 id;
 	__le32 speed;
 	u8     status;
-	u8     rsvd[51];
+	__le16 link_down_count;
+	u8     fec_type;
+	u8     rsvd[48];
 	struct ionic_xcvr_status  xcvr;
-};
+} __rte_packed;
 
 /**
  * struct ionic_port_identify_cmd - Port identify command
@@ -1113,7 +1260,7 @@ struct ionic_port_identify_cmd {
 
 /**
  * struct ionic_port_identify_comp - Port identify command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_port_identify_comp {
@@ -1138,7 +1285,7 @@ struct ionic_port_init_cmd {
 
 /**
  * struct ionic_port_init_comp - Port initialization command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_port_init_comp {
 	u8 status;
@@ -1158,7 +1305,7 @@ struct ionic_port_reset_cmd {
 
 /**
  * struct ionic_port_reset_comp - Port reset command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_port_reset_comp {
 	u8 status;
@@ -1166,15 +1313,23 @@ struct ionic_port_reset_comp {
 };
 
 /**
- * enum stats_ctl_cmd - List of commands for stats control
+ * enum ionic_stats_ctl_cmd - List of commands for stats control
+ * @IONIC_STATS_CTL_RESET:      Reset statistics
  */
 enum ionic_stats_ctl_cmd {
 	IONIC_STATS_CTL_RESET		= 0,
 };
 
-
 /**
  * enum ionic_port_attr - List of device attributes
+ * @IONIC_PORT_ATTR_STATE:      Port state attribute
+ * @IONIC_PORT_ATTR_SPEED:      Port speed attribute
+ * @IONIC_PORT_ATTR_MTU:        Port MTU attribute
+ * @IONIC_PORT_ATTR_AUTONEG:    Port autonegotation attribute
+ * @IONIC_PORT_ATTR_FEC:        Port FEC attribute
+ * @IONIC_PORT_ATTR_PAUSE:      Port pause attribute
+ * @IONIC_PORT_ATTR_LOOPBACK:   Port loopback attribute
+ * @IONIC_PORT_ATTR_STATS_CTRL: Port statistics control attribute
  */
 enum ionic_port_attr {
 	IONIC_PORT_ATTR_STATE		= 0,
@@ -1189,9 +1344,17 @@ enum ionic_port_attr {
 
 /**
  * struct ionic_port_setattr_cmd - Set port attributes on the NIC
- * @opcode:     Opcode
- * @index:      port index
- * @attr:       Attribute type (enum ionic_port_attr)
+ * @opcode:         Opcode
+ * @index:          Port index
+ * @attr:           Attribute type (enum ionic_port_attr)
+ * @state:          Port state
+ * @speed:          Port speed
+ * @mtu:            Port MTU
+ * @an_enable:      Port autonegotiation setting
+ * @fec_type:       Port FEC type setting
+ * @pause_type:     Port pause type setting
+ * @loopback_mode:  Port loopback mode
+ * @stats_ctl:      Port stats setting
  */
 struct ionic_port_setattr_cmd {
 	u8     opcode;
@@ -1206,14 +1369,14 @@ struct ionic_port_setattr_cmd {
 		u8      fec_type;
 		u8      pause_type;
 		u8      loopback_mode;
-		u8	stats_ctl;
+		u8      stats_ctl;
 		u8      rsvd2[60];
 	};
 };
 
 /**
  * struct ionic_port_setattr_comp - Port set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @color:      Color bit
  */
 struct ionic_port_setattr_comp {
@@ -1237,8 +1400,15 @@ struct ionic_port_getattr_cmd {
 
 /**
  * struct ionic_port_getattr_comp - Port get attr command completion
- * @status:     The status of the command (enum status_code)
- * @color:      Color bit
+ * @status:         Status of the command (enum ionic_status_code)
+ * @state:          Port state
+ * @speed:          Port speed
+ * @mtu:            Port MTU
+ * @an_enable:      Port autonegotiation setting
+ * @fec_type:       Port FEC type setting
+ * @pause_type:     Port pause type setting
+ * @loopback_mode:  Port loopback mode
+ * @color:          Color bit
  */
 struct ionic_port_getattr_comp {
 	u8     status;
@@ -1252,17 +1422,17 @@ struct ionic_port_getattr_comp {
 		u8      pause_type;
 		u8      loopback_mode;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
 /**
- * struct ionic_lif_status - Lif status register
+ * struct ionic_lif_status - LIF status register
  * @eid:             most recent NotifyQ event id
- * @port_num:        port the lif is connected to
+ * @port_num:        port the LIF is connected to
  * @link_status:     port status (enum ionic_port_oper_status)
  * @link_speed:      speed of link in Mbps
- * @link_down_count: number of times link status changes
+ * @link_down_count: number of times link went from up to down
  */
 struct ionic_lif_status {
 	__le64 eid;
@@ -1296,6 +1466,9 @@ enum ionic_dev_state {
 
 /**
  * enum ionic_dev_attr - List of device attributes
+ * @IONIC_DEV_ATTR_STATE:     Device state attribute
+ * @IONIC_DEV_ATTR_NAME:      Device name attribute
+ * @IONIC_DEV_ATTR_FEATURES:  Device feature attributes
  */
 enum ionic_dev_attr {
 	IONIC_DEV_ATTR_STATE    = 0,
@@ -1320,12 +1493,12 @@ struct ionic_dev_setattr_cmd {
 		char    name[IONIC_IFNAMSIZ];
 		__le64  features;
 		u8      rsvd2[60];
-	};
+	} __rte_packed;
 };
 
 /**
  * struct ionic_dev_setattr_comp - Device set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @features:   Device features
  * @color:      Color bit
  */
@@ -1335,7 +1508,7 @@ struct ionic_dev_setattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1352,7 +1525,7 @@ struct ionic_dev_getattr_cmd {
 
 /**
  * struct ionic_dev_setattr_comp - Device set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @features:   Device features
  * @color:      Color bit
  */
@@ -1362,7 +1535,7 @@ struct ionic_dev_getattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1382,6 +1555,13 @@ enum ionic_rss_hash_types {
 
 /**
  * enum ionic_lif_attr - List of LIF attributes
+ * @IONIC_LIF_ATTR_STATE:       LIF state attribute
+ * @IONIC_LIF_ATTR_NAME:        LIF name attribute
+ * @IONIC_LIF_ATTR_MTU:         LIF MTU attribute
+ * @IONIC_LIF_ATTR_MAC:         LIF MAC attribute
+ * @IONIC_LIF_ATTR_FEATURES:    LIF features attribute
+ * @IONIC_LIF_ATTR_RSS:         LIF RSS attribute
+ * @IONIC_LIF_ATTR_STATS_CTRL:  LIF statistics control attribute
  */
 enum ionic_lif_attr {
 	IONIC_LIF_ATTR_STATE        = 0,
@@ -1396,18 +1576,18 @@ enum ionic_lif_attr {
 /**
  * struct ionic_lif_setattr_cmd - Set LIF attributes on the NIC
  * @opcode:     Opcode
- * @type:       Attribute type (enum ionic_lif_attr)
+ * @attr:       Attribute type (enum ionic_lif_attr)
  * @index:      LIF index
- * @state:      lif state (enum lif_state)
+ * @state:      LIF state (enum ionic_lif_state)
  * @name:       The netdev name string, 0 terminated
  * @mtu:        Mtu
  * @mac:        Station mac
  * @features:   Features (enum ionic_eth_hw_features)
  * @rss:        RSS properties
- *              @types:     The hash types to enable (see rss_hash_types).
- *              @key:       The hash secret key.
- *              @addr:      Address for the indirection table shared memory.
- * @stats_ctl:  stats control commands (enum stats_ctl_cmd)
+ *              @types:     The hash types to enable (see rss_hash_types)
+ *              @key:       The hash secret key
+ *              @addr:      Address for the indirection table shared memory
+ * @stats_ctl:  stats control commands (enum ionic_stats_ctl_cmd)
  */
 struct ionic_lif_setattr_cmd {
 	u8     opcode;
@@ -1425,16 +1605,15 @@ struct ionic_lif_setattr_cmd {
 			u8     rsvd[6];
 			__le64 addr;
 		} rss;
-		u8	stats_ctl;
+		u8      stats_ctl;
 		u8      rsvd[60];
-	};
+	} __rte_packed;
 };
 
 /**
  * struct ionic_lif_setattr_comp - LIF set attr command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @features:   features (enum ionic_eth_hw_features)
  * @color:      Color bit
  */
@@ -1445,7 +1624,7 @@ struct ionic_lif_setattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1464,10 +1643,9 @@ struct ionic_lif_getattr_cmd {
 
 /**
  * struct ionic_lif_getattr_comp - LIF get attr command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
- * @state:      lif state (enum lif_state)
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @state:      LIF state (enum ionic_lif_state)
  * @name:       The netdev name string, 0 terminated
  * @mtu:        Mtu
  * @mac:        Station mac
@@ -1484,16 +1662,17 @@ struct ionic_lif_getattr_comp {
 		u8      mac[6];
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
 enum ionic_rx_mode {
-	IONIC_RX_MODE_F_UNICAST    = BIT(0),
-	IONIC_RX_MODE_F_MULTICAST  = BIT(1),
-	IONIC_RX_MODE_F_BROADCAST  = BIT(2),
-	IONIC_RX_MODE_F_PROMISC    = BIT(3),
-	IONIC_RX_MODE_F_ALLMULTI   = BIT(4),
+	IONIC_RX_MODE_F_UNICAST		= BIT(0),
+	IONIC_RX_MODE_F_MULTICAST	= BIT(1),
+	IONIC_RX_MODE_F_BROADCAST	= BIT(2),
+	IONIC_RX_MODE_F_PROMISC		= BIT(3),
+	IONIC_RX_MODE_F_ALLMULTI	= BIT(4),
+	IONIC_RX_MODE_F_RDMA_SNIFFER	= BIT(5),
 };
 
 /**
@@ -1501,11 +1680,12 @@ enum ionic_rx_mode {
  * @opcode:     opcode
  * @lif_index:  LIF index
  * @rx_mode:    Rx mode flags:
- *                  IONIC_RX_MODE_F_UNICAST: Accept known unicast packets.
- *                  IONIC_RX_MODE_F_MULTICAST: Accept known multicast packets.
- *                  IONIC_RX_MODE_F_BROADCAST: Accept broadcast packets.
- *                  IONIC_RX_MODE_F_PROMISC: Accept any packets.
- *                  IONIC_RX_MODE_F_ALLMULTI: Accept any multicast packets.
+ *                  IONIC_RX_MODE_F_UNICAST: Accept known unicast packets
+ *                  IONIC_RX_MODE_F_MULTICAST: Accept known multicast packets
+ *                  IONIC_RX_MODE_F_BROADCAST: Accept broadcast packets
+ *                  IONIC_RX_MODE_F_PROMISC: Accept any packets
+ *                  IONIC_RX_MODE_F_ALLMULTI: Accept any multicast packets
+ *                  IONIC_RX_MODE_F_RDMA_SNIFFER: Sniff RDMA packets
  */
 struct ionic_rx_mode_set_cmd {
 	u8     opcode;
@@ -1529,9 +1709,14 @@ enum ionic_rx_filter_match_type {
  * @qtype:      Queue type
  * @lif_index:  LIF index
  * @qid:        Queue ID
- * @match:      Rx filter match type.  (See IONIC_RX_FILTER_MATCH_xxx)
- * @vlan:       VLAN ID
- * @addr:       MAC address (network-byte order)
+ * @match:      Rx filter match type (see IONIC_RX_FILTER_MATCH_xxx)
+ * @vlan:       VLAN filter
+ *              @vlan:  VLAN ID
+ * @mac:        MAC filter
+ *              @addr:  MAC address (network-byte order)
+ * @mac_vlan:   MACVLAN filter
+ *              @vlan:  VLAN ID
+ *              @addr:  MAC address (network-byte order)
  */
 struct ionic_rx_filter_add_cmd {
 	u8     opcode;
@@ -1556,11 +1741,10 @@ struct ionic_rx_filter_add_cmd {
 
 /**
  * struct ionic_rx_filter_add_comp - Add LIF Rx filter command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @filter_id:  Filter ID
- * @color:      Color bit.
+ * @color:      Color bit
  */
 struct ionic_rx_filter_add_comp {
 	u8     status;
@@ -1587,9 +1771,99 @@ struct ionic_rx_filter_del_cmd {
 
 typedef struct ionic_admin_comp ionic_rx_filter_del_comp;
 
+enum ionic_vf_attr {
+	IONIC_VF_ATTR_SPOOFCHK	= 1,
+	IONIC_VF_ATTR_TRUST	= 2,
+	IONIC_VF_ATTR_MAC	= 3,
+	IONIC_VF_ATTR_LINKSTATE	= 4,
+	IONIC_VF_ATTR_VLAN	= 5,
+	IONIC_VF_ATTR_RATE	= 6,
+	IONIC_VF_ATTR_STATSADDR	= 7,
+};
+
+/**
+ * enum ionic_vf_link_status - Virtual Function link status
+ * @IONIC_VF_LINK_STATUS_AUTO:   Use link state of the uplink
+ * @IONIC_VF_LINK_STATUS_UP:     Link always up
+ * @IONIC_VF_LINK_STATUS_DOWN:   Link always down
+ */
+enum ionic_vf_link_status {
+	IONIC_VF_LINK_STATUS_AUTO = 0,
+	IONIC_VF_LINK_STATUS_UP   = 1,
+	IONIC_VF_LINK_STATUS_DOWN = 2,
+};
+
+/**
+ * struct ionic_vf_setattr_cmd - Set VF attributes on the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_vf_attr)
+ * @vf_index:   VF index
+ *	@macaddr:	mac address
+ *	@vlanid:	vlan ID
+ *	@maxrate:	max Tx rate in Mbps
+ *	@spoofchk:	enable address spoof checking
+ *	@trust:		enable VF trust
+ *	@linkstate:	set link up or down
+ *	@stats_pa:	set DMA address for VF stats
+ */
+struct ionic_vf_setattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 vf_index;
+	union {
+		u8     macaddr[6];
+		__le16 vlanid;
+		__le32 maxrate;
+		u8     spoofchk;
+		u8     trust;
+		u8     linkstate;
+		__le64 stats_pa;
+		u8     pad[60];
+	} __rte_packed;
+};
+
+struct ionic_vf_setattr_comp {
+	u8     status;
+	u8     attr;
+	__le16 vf_index;
+	__le16 comp_index;
+	u8     rsvd[9];
+	u8     color;
+};
+
+/**
+ * struct ionic_vf_getattr_cmd - Get VF attributes from the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_vf_attr)
+ * @vf_index:   VF index
+ */
+struct ionic_vf_getattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 vf_index;
+	u8     rsvd[60];
+};
+
+struct ionic_vf_getattr_comp {
+	u8     status;
+	u8     attr;
+	__le16 vf_index;
+	union {
+		u8     macaddr[6];
+		__le16 vlanid;
+		__le32 maxrate;
+		u8     spoofchk;
+		u8     trust;
+		u8     linkstate;
+		__le64 stats_pa;
+		u8     pad[11];
+	} __rte_packed;
+	u8     color;
+};
+
 /**
  * struct ionic_qos_identify_cmd - QoS identify command
- * @opcode:    opcode
+ * @opcode:  opcode
  * @ver:     Highest version of identify supported by driver
  *
  */
@@ -1601,7 +1875,7 @@ struct ionic_qos_identify_cmd {
 
 /**
  * struct ionic_qos_identify_comp - QoS identify command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_qos_identify_comp {
@@ -1610,9 +1884,15 @@ struct ionic_qos_identify_comp {
 	u8 rsvd[14];
 };
 
+#define IONIC_QOS_TC_MAX		8
+#define IONIC_QOS_ALL_TC		0xFF
+/* Capri max supported, should be renamed. */
 #define IONIC_QOS_CLASS_MAX		7
-#define IONIC_QOS_CLASS_NAME_SZ		32
-#define IONIC_QOS_DSCP_MAX_VALUES	64
+#define IONIC_QOS_PCP_MAX		8
+#define IONIC_QOS_CLASS_NAME_SZ	32
+#define IONIC_QOS_DSCP_MAX		64
+#define IONIC_QOS_ALL_PCP		0xFF
+#define IONIC_DSCP_BLOCK_SIZE		8
 
 /**
  * enum ionic_qos_class
@@ -1629,42 +1909,44 @@ enum ionic_qos_class {
 
 /**
  * enum ionic_qos_class_type - Traffic classification criteria
+ * @IONIC_QOS_CLASS_TYPE_NONE:    No QoS
+ * @IONIC_QOS_CLASS_TYPE_PCP:     Dot1Q PCP
+ * @IONIC_QOS_CLASS_TYPE_DSCP:    IP DSCP
  */
 enum ionic_qos_class_type {
 	IONIC_QOS_CLASS_TYPE_NONE	= 0,
-	IONIC_QOS_CLASS_TYPE_PCP	= 1,	/* Dot1Q pcp */
-	IONIC_QOS_CLASS_TYPE_DSCP	= 2,	/* IP dscp */
+	IONIC_QOS_CLASS_TYPE_PCP	= 1,
+	IONIC_QOS_CLASS_TYPE_DSCP	= 2,
 };
 
 /**
- * enum ionic_qos_sched_type - Qos class scheduling type
+ * enum ionic_qos_sched_type - QoS class scheduling type
+ * @IONIC_QOS_SCHED_TYPE_STRICT:  Strict priority
+ * @IONIC_QOS_SCHED_TYPE_DWRR:    Deficit weighted round-robin
  */
 enum ionic_qos_sched_type {
-	/* Strict priority */
 	IONIC_QOS_SCHED_TYPE_STRICT	= 0,
-	/* Deficit weighted round-robin */
 	IONIC_QOS_SCHED_TYPE_DWRR	= 1,
 };
 
 /**
- * union ionic_qos_config - Qos configuration structure
+ * union ionic_qos_config - QoS configuration structure
  * @flags:		Configuration flags
  *	IONIC_QOS_CONFIG_F_ENABLE		enable
- *	IONIC_QOS_CONFIG_F_DROP			drop/nodrop
+ *	IONIC_QOS_CONFIG_F_NO_DROP		drop/nodrop
  *	IONIC_QOS_CONFIG_F_RW_DOT1Q_PCP		enable dot1q pcp rewrite
  *	IONIC_QOS_CONFIG_F_RW_IP_DSCP		enable ip dscp rewrite
- * @sched_type:		Qos class scheduling type (enum ionic_qos_sched_type)
- * @class_type:		Qos class type (enum ionic_qos_class_type)
- * @pause_type:		Qos pause type (enum qos_pause_type)
- * @name:		Qos class name
+ *	IONIC_QOS_CONFIG_F_NON_DISRUPTIVE	Non-disruptive TC update
+ * @sched_type:		QoS class scheduling type (enum ionic_qos_sched_type)
+ * @class_type:		QoS class type (enum ionic_qos_class_type)
+ * @pause_type:		QoS pause type (enum ionic_qos_pause_type)
+ * @name:		QoS class name
  * @mtu:		MTU of the class
- * @pfc_dot1q_pcp:	Pcp value for pause frames (valid iff F_NODROP)
- * @dwrr_weight:	Qos class scheduling weight
+ * @pfc_cos:		Priority-Flow Control class of service
+ * @dwrr_weight:	QoS class scheduling weight
  * @strict_rlmt:	Rate limit for strict priority scheduling
- * @rw_dot1q_pcp:	Rewrite dot1q pcp to this value
- *			(valid iff F_RW_DOT1Q_PCP)
- * @rw_ip_dscp:		Rewrite ip dscp to this value
- *			(valid iff F_RW_IP_DSCP)
+ * @rw_dot1q_pcp:	Rewrite dot1q pcp to value (valid iff F_RW_DOT1Q_PCP)
+ * @rw_ip_dscp:		Rewrite ip dscp to value (valid iff F_RW_IP_DSCP)
  * @dot1q_pcp:		Dot1q pcp value
  * @ndscp:		Number of valid dscp values in the ip_dscp field
  * @ip_dscp:		IP dscp values
@@ -1672,9 +1954,12 @@ enum ionic_qos_sched_type {
 union ionic_qos_config {
 	struct {
 #define IONIC_QOS_CONFIG_F_ENABLE		BIT(0)
-#define IONIC_QOS_CONFIG_F_DROP			BIT(1)
+#define IONIC_QOS_CONFIG_F_NO_DROP		BIT(1)
+/* Used to rewrite PCP or DSCP value. */
 #define IONIC_QOS_CONFIG_F_RW_DOT1Q_PCP		BIT(2)
 #define IONIC_QOS_CONFIG_F_RW_IP_DSCP		BIT(3)
+/* Non-disruptive TC update */
+#define IONIC_QOS_CONFIG_F_NON_DISRUPTIVE	BIT(4)
 		u8      flags;
 		u8      sched_type;
 		u8      class_type;
@@ -1689,6 +1974,7 @@ union ionic_qos_config {
 			__le64  strict_rlmt;
 		};
 		/* marking */
+		/* Used to rewrite PCP or DSCP value. */
 		union {
 			u8      rw_dot1q_pcp;
 			u8      rw_ip_dscp;
@@ -1698,10 +1984,10 @@ union ionic_qos_config {
 			u8      dot1q_pcp;
 			struct {
 				u8      ndscp;
-				u8      ip_dscp[IONIC_QOS_DSCP_MAX_VALUES];
+				u8      ip_dscp[IONIC_QOS_DSCP_MAX];
 			};
 		};
-	};
+	} __rte_packed;
 	__le32  words[64];
 };
 
@@ -1717,15 +2003,15 @@ union ionic_qos_identity {
 		u8     version;
 		u8     type;
 		u8     rsvd[62];
-		union  ionic_qos_config config[IONIC_QOS_CLASS_MAX];
+		union ionic_qos_config config[IONIC_QOS_CLASS_MAX];
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
- * struct qos_init_cmd - QoS config init command
+ * struct ionic_qos_init_cmd - QoS config init command
  * @opcode:	Opcode
- * @group:	Qos class id
+ * @group:	QoS class id
  * @info_pa:	destination address for qos info
  */
 struct ionic_qos_init_cmd {
@@ -1739,8 +2025,9 @@ struct ionic_qos_init_cmd {
 typedef struct ionic_admin_comp ionic_qos_init_comp;
 
 /**
- * struct ionic_qos_reset_cmd - Qos config reset command
+ * struct ionic_qos_reset_cmd - QoS config reset command
  * @opcode:	Opcode
+ * @group:	QoS class id
  */
 struct ionic_qos_reset_cmd {
 	u8    opcode;
@@ -1748,6 +2035,16 @@ struct ionic_qos_reset_cmd {
 	u8    rsvd[62];
 };
 
+/**
+ * struct ionic_qos_clear_port_stats_cmd - Qos config reset command
+ * @opcode:	Opcode
+ */
+struct ionic_qos_clear_stats_cmd {
+	u8    opcode;
+	u8    group_bitmap;
+	u8    rsvd[62];
+};
+
 typedef struct ionic_admin_comp ionic_qos_reset_comp;
 
 /**
@@ -1767,10 +2064,16 @@ struct ionic_fw_download_cmd {
 
 typedef struct ionic_admin_comp ionic_fw_download_comp;
 
+/**
+ * enum ionic_fw_control_oper - FW control operations
+ * @IONIC_FW_RESET:     Reset firmware
+ * @IONIC_FW_INSTALL:   Install firmware
+ * @IONIC_FW_ACTIVATE:  Acticate firmware
+ */
 enum ionic_fw_control_oper {
-	IONIC_FW_RESET		= 0,	/* Reset firmware */
-	IONIC_FW_INSTALL	= 1,	/* Install firmware */
-	IONIC_FW_ACTIVATE	= 2,	/* Activate firmware */
+	IONIC_FW_RESET		= 0,
+	IONIC_FW_INSTALL	= 1,
+	IONIC_FW_ACTIVATE	= 2,
 };
 
 /**
@@ -1789,8 +2092,10 @@ struct ionic_fw_control_cmd {
 
 /**
  * struct ionic_fw_control_comp - Firmware control copletion
- * @opcode:    opcode
- * @slot:      slot where the firmware was installed
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @slot:       Slot where the firmware was installed
+ * @color:      Color bit
  */
 struct ionic_fw_control_comp {
 	u8     status;
@@ -1808,11 +2113,11 @@ struct ionic_fw_control_comp {
 /**
  * struct ionic_rdma_reset_cmd - Reset RDMA LIF cmd
  * @opcode:        opcode
- * @lif_index:     lif index
+ * @lif_index:     LIF index
  *
- * There is no rdma specific dev command completion struct.  Completion uses
+ * There is no RDMA specific dev command completion struct.  Completion uses
  * the common struct ionic_admin_comp.  Only the status is indicated.
- * Nonzero status means the LIF does not support rdma.
+ * Nonzero status means the LIF does not support RDMA.
  **/
 struct ionic_rdma_reset_cmd {
 	u8     opcode;
@@ -1824,30 +2129,29 @@ struct ionic_rdma_reset_cmd {
 /**
  * struct ionic_rdma_queue_cmd - Create RDMA Queue command
  * @opcode:        opcode, 52, 53
- * @lif_index      lif index
- * @qid_ver:       (qid | (rdma version << 24))
+ * @lif_index:     LIF index
+ * @qid_ver:       (qid | (RDMA version << 24))
  * @cid:           intr, eq_id, or cq_id
  * @dbid:          doorbell page id
  * @depth_log2:    log base two of queue depth
  * @stride_log2:   log base two of queue stride
  * @dma_addr:      address of the queue memory
- * @xxx_table_index: temporary, but should not need pgtbl for contig. queues.
  *
- * The same command struct is used to create an rdma event queue, completion
- * queue, or rdma admin queue.  The cid is an interrupt number for an event
+ * The same command struct is used to create an RDMA event queue, completion
+ * queue, or RDMA admin queue.  The cid is an interrupt number for an event
  * queue, an event queue id for a completion queue, or a completion queue id
- * for an rdma admin queue.
+ * for an RDMA admin queue.
  *
  * The queue created via a dev command must be contiguous in dma space.
  *
  * The dev commands are intended only to be used during driver initialization,
- * to create queues supporting the rdma admin queue.  Other queues, and other
- * types of rdma resources like memory regions, will be created and registered
- * via the rdma admin queue, and will support a more complete interface
+ * to create queues supporting the RDMA admin queue.  Other queues, and other
+ * types of RDMA resources like memory regions, will be created and registered
+ * via the RDMA admin queue, and will support a more complete interface
  * providing scatter gather lists for larger, scattered queue buffers and
  * memory registration.
  *
- * There is no rdma specific dev command completion struct.  Completion uses
+ * There is no RDMA specific dev command completion struct.  Completion uses
  * the common struct ionic_admin_comp.  Only the status is indicated.
  **/
 struct ionic_rdma_queue_cmd {
@@ -1860,8 +2164,7 @@ struct ionic_rdma_queue_cmd {
 	u8     depth_log2;
 	u8     stride_log2;
 	__le64 dma_addr;
-	u8     rsvd2[36];
-	__le32 xxx_table_index;
+	u8     rsvd2[40];
 };
 
 /******************************************************************
@@ -1869,7 +2172,7 @@ struct ionic_rdma_queue_cmd {
  ******************************************************************/
 
 /**
- * struct ionic_notifyq_event
+ * struct ionic_notifyq_event - Generic event reporting structure
  * @eid:   event number
  * @ecode: event code
  * @data:  unspecified data about the event
@@ -1884,10 +2187,10 @@ struct ionic_notifyq_event {
 };
 
 /**
- * struct ionic_link_change_event
+ * struct ionic_link_change_event - Link change event notification
  * @eid:		event number
- * @ecode:		event code = EVENT_OPCODE_LINK_CHANGE
- * @link_status:	link up or down, with error bits (enum port_status)
+ * @ecode:		event code = IONIC_EVENT_LINK_CHANGE
+ * @link_status:	link up/down, with error bits (enum ionic_port_status)
  * @link_speed:		speed of the network link
  *
  * Sent when the network link state changes between UP and DOWN
@@ -1901,9 +2204,9 @@ struct ionic_link_change_event {
 };
 
 /**
- * struct ionic_reset_event
+ * struct ionic_reset_event - Reset event notification
  * @eid:		event number
- * @ecode:		event code = EVENT_OPCODE_RESET
+ * @ecode:		event code = IONIC_EVENT_RESET
  * @reset_code:		reset type
  * @state:		0=pending, 1=complete, 2=error
  *
@@ -1919,11 +2222,9 @@ struct ionic_reset_event {
 };
 
 /**
- * struct ionic_heartbeat_event
+ * struct ionic_heartbeat_event - Sent periodically by NIC to indicate health
  * @eid:	event number
- * @ecode:	event code = EVENT_OPCODE_HEARTBEAT
- *
- * Sent periodically by the NIC to indicate continued health
+ * @ecode:	event code = IONIC_EVENT_HEARTBEAT
  */
 struct ionic_heartbeat_event {
 	__le64 eid;
@@ -1932,12 +2233,10 @@ struct ionic_heartbeat_event {
 };
 
 /**
- * struct ionic_log_event
+ * struct ionic_log_event - Sent to notify the driver of an internal error
  * @eid:	event number
- * @ecode:	event code = EVENT_OPCODE_LOG
+ * @ecode:	event code = IONIC_EVENT_LOG
  * @data:	log data
- *
- * Sent to notify the driver of an internal error.
  */
 struct ionic_log_event {
 	__le64 eid;
@@ -1946,7 +2245,18 @@ struct ionic_log_event {
 };
 
 /**
- * struct ionic_port_stats
+ * struct ionic_xcvr_event - Transceiver change event
+ * @eid:	event number
+ * @ecode:	event code = IONIC_EVENT_XCVR
+ */
+struct ionic_xcvr_event {
+	__le64 eid;
+	__le16 ecode;
+	u8     rsvd[54];
+};
+
+/**
+ * struct ionic_port_stats - Port statistics structure
  */
 struct ionic_port_stats {
 	__le64 frames_rx_ok;
@@ -2051,34 +2361,109 @@ struct ionic_mgmt_port_stats {
 	__le64 frames_rx_multicast;
 	__le64 frames_rx_broadcast;
 	__le64 frames_rx_pause;
-	__le64 frames_rx_bad_length0;
-	__le64 frames_rx_undersized1;
-	__le64 frames_rx_oversized2;
-	__le64 frames_rx_fragments3;
-	__le64 frames_rx_jabber4;
-	__le64 frames_rx_64b5;
-	__le64 frames_rx_65b_127b6;
-	__le64 frames_rx_128b_255b7;
-	__le64 frames_rx_256b_511b8;
-	__le64 frames_rx_512b_1023b9;
-	__le64 frames_rx_1024b_1518b0;
-	__le64 frames_rx_gt_1518b1;
-	__le64 frames_rx_fifo_full2;
-	__le64 frames_tx_ok3;
-	__le64 frames_tx_all4;
-	__le64 frames_tx_bad5;
-	__le64 octets_tx_ok6;
-	__le64 octets_tx_total7;
-	__le64 frames_tx_unicast8;
-	__le64 frames_tx_multicast9;
-	__le64 frames_tx_broadcast0;
-	__le64 frames_tx_pause1;
+	__le64 frames_rx_bad_length;
+	__le64 frames_rx_undersized;
+	__le64 frames_rx_oversized;
+	__le64 frames_rx_fragments;
+	__le64 frames_rx_jabber;
+	__le64 frames_rx_64b;
+	__le64 frames_rx_65b_127b;
+	__le64 frames_rx_128b_255b;
+	__le64 frames_rx_256b_511b;
+	__le64 frames_rx_512b_1023b;
+	__le64 frames_rx_1024b_1518b;
+	__le64 frames_rx_gt_1518b;
+	__le64 frames_rx_fifo_full;
+	__le64 frames_tx_ok;
+	__le64 frames_tx_all;
+	__le64 frames_tx_bad;
+	__le64 octets_tx_ok;
+	__le64 octets_tx_total;
+	__le64 frames_tx_unicast;
+	__le64 frames_tx_multicast;
+	__le64 frames_tx_broadcast;
+	__le64 frames_tx_pause;
+};
+
+enum ionic_pb_buffer_drop_stats {
+	IONIC_BUFFER_INTRINSIC_DROP = 0,
+	IONIC_BUFFER_DISCARDED,
+	IONIC_BUFFER_ADMITTED,
+	IONIC_BUFFER_OUT_OF_CELLS_DROP,
+	IONIC_BUFFER_OUT_OF_CELLS_DROP_2,
+	IONIC_BUFFER_OUT_OF_CREDIT_DROP,
+	IONIC_BUFFER_TRUNCATION_DROP,
+	IONIC_BUFFER_PORT_DISABLED_DROP,
+	IONIC_BUFFER_COPY_TO_CPU_TAIL_DROP,
+	IONIC_BUFFER_SPAN_TAIL_DROP,
+	IONIC_BUFFER_MIN_SIZE_VIOLATION_DROP,
+	IONIC_BUFFER_ENQUEUE_ERROR_DROP,
+	IONIC_BUFFER_INVALID_PORT_DROP,
+	IONIC_BUFFER_INVALID_OUTPUT_QUEUE_DROP,
+	IONIC_BUFFER_DROP_MAX,
+};
+
+enum ionic_oflow_drop_stats {
+	IONIC_OFLOW_OCCUPANCY_DROP,
+	IONIC_OFLOW_EMERGENCY_STOP_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_ACK_FILL_UP_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_ACK_FULL_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_FULL_DROP,
+	IONIC_OFLOW_CONTROL_FIFO_FULL_DROP,
+	IONIC_OFLOW_DROP_MAX,
+};
+
+/**
+ * struct port_pb_stats - packet buffers system stats
+ * uses ionic_pb_buffer_drop_stats for drop_counts[]
+ */
+struct ionic_port_pb_stats {
+	__le64 sop_count_in;
+	__le64 eop_count_in;
+	__le64 sop_count_out;
+	__le64 eop_count_out;
+	__le64 drop_counts[IONIC_BUFFER_DROP_MAX];
+	__le64 input_queue_buffer_occupancy[IONIC_QOS_TC_MAX];
+	__le64 input_queue_port_monitor[IONIC_QOS_TC_MAX];
+	__le64 output_queue_port_monitor[IONIC_QOS_TC_MAX];
+	__le64 oflow_drop_counts[IONIC_OFLOW_DROP_MAX];
+	__le64 input_queue_good_pkts_in[IONIC_QOS_TC_MAX];
+	__le64 input_queue_good_pkts_out[IONIC_QOS_TC_MAX];
+	__le64 input_queue_err_pkts_in[IONIC_QOS_TC_MAX];
+	__le64 input_queue_fifo_depth[IONIC_QOS_TC_MAX];
+	__le64 input_queue_max_fifo_depth[IONIC_QOS_TC_MAX];
+	__le64 input_queue_peak_occupancy[IONIC_QOS_TC_MAX];
+	__le64 output_queue_buffer_occupancy[IONIC_QOS_TC_MAX];
+};
+
+/**
+ * enum ionic_port_type - Port types
+ * @IONIC_ETH_UNKNOWN:             Port type not configured
+ * @IONIC_ETH_HOST:                Port carries ethernet traffic (inband)
+ * @IONIC_ETH_HOST_MGMT:           Port carries mgmt traffic (out-of-band)
+ * @IONIC_ETH_MNIC_OOB_MGMT:
+ * @IONIC_ETH_MNIC_INTERNAL_MGMT:
+ * @IONIC_ETH_MNIC_INBAND_MGMT:
+ * @IONIC_ETH_MNIC_CPU:
+ * @IONIC_ETH_MNIC_LEARN:
+ * @IONIC_ETH_MNIC_CONTROL:
+ */
+enum ionic_port_type {
+	IONIC_ETH_UNKNOWN,
+	IONIC_ETH_HOST,
+	IONIC_ETH_HOST_MGMT,
+	IONIC_ETH_MNIC_OOB_MGMT,
+	IONIC_ETH_MNIC_INTERNAL_MGMT,
+	IONIC_ETH_MNIC_INBAND_MGMT,
+	IONIC_ETH_MNIC_CPU,
+	IONIC_ETH_MNIC_LEARN,
+	IONIC_ETH_MNIC_CONTROL,
 };
 
 /**
  * struct ionic_port_identity - port identity structure
  * @version:        identity structure version
- * @type:           type of port (enum port_type)
+ * @type:           type of port (enum ionic_port_type)
  * @num_lanes:      number of lanes for the port
  * @autoneg:        autoneg supported
  * @min_frame_size: minimum frame size supported
@@ -2104,22 +2489,31 @@ union ionic_port_identity {
 		u8     rsvd2[44];
 		union ionic_port_config config;
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
  * struct ionic_port_info - port info structure
- * @port_status:     port status
- * @port_stats:      port stats
+ * @config:          Port configuration data
+ * @status:          Port status data
+ * @stats:           Port statistics data
+ * @mgmt_stats:      Port management statistics data
+ * @port_pb_drop_stats:   uplink pb drop stats
  */
 struct ionic_port_info {
 	union ionic_port_config config;
 	struct ionic_port_status status;
-	struct ionic_port_stats stats;
+	union {
+		struct ionic_port_stats      stats;
+		struct ionic_mgmt_port_stats mgmt_stats;
+	};
+	/* room for pb_stats to start at 2k offset */
+	u8                          rsvd[760];
+	struct ionic_port_pb_stats  pb_stats;
 };
 
 /**
- * struct ionic_lif_stats
+ * struct ionic_lif_stats - LIF statistics structure
  */
 struct ionic_lif_stats {
 	/* RX */
@@ -2172,7 +2566,7 @@ struct ionic_lif_stats {
 	__le64 tx_queue_error;
 	__le64 tx_desc_fetch_error;
 	__le64 tx_desc_data_error;
-	__le64 rsvd9;
+	__le64 tx_queue_empty;
 	__le64 rsvd10;
 	__le64 rsvd11;
 	__le64 rsvd12;
@@ -2273,7 +2667,10 @@ struct ionic_lif_stats {
 };
 
 /**
- * struct ionic_lif_info - lif info structure
+ * struct ionic_lif_info - LIF info structure
+ * @config:	LIF configuration structure
+ * @status:	LIF status structure
+ * @stats:	LIF statistics structure
  */
 struct ionic_lif_info {
 	union ionic_lif_config config;
@@ -2298,6 +2695,9 @@ union ionic_dev_cmd {
 	struct ionic_port_getattr_cmd port_getattr;
 	struct ionic_port_setattr_cmd port_setattr;
 
+	struct ionic_vf_setattr_cmd vf_setattr;
+	struct ionic_vf_getattr_cmd vf_getattr;
+
 	struct ionic_lif_identify_cmd lif_identify;
 	struct ionic_lif_init_cmd lif_init;
 	struct ionic_lif_reset_cmd lif_reset;
@@ -2305,8 +2705,11 @@ union ionic_dev_cmd {
 	struct ionic_qos_identify_cmd qos_identify;
 	struct ionic_qos_init_cmd qos_init;
 	struct ionic_qos_reset_cmd qos_reset;
+	struct ionic_qos_clear_stats_cmd qos_clear_stats;
 
+	struct ionic_q_identify_cmd q_identify;
 	struct ionic_q_init_cmd q_init;
+	struct ionic_q_control_cmd q_control;
 };
 
 union ionic_dev_cmd_comp {
@@ -2327,6 +2730,9 @@ union ionic_dev_cmd_comp {
 	struct ionic_port_getattr_comp port_getattr;
 	struct ionic_port_setattr_comp port_setattr;
 
+	struct ionic_vf_setattr_comp vf_setattr;
+	struct ionic_vf_getattr_comp vf_getattr;
+
 	struct ionic_lif_identify_comp lif_identify;
 	struct ionic_lif_init_comp lif_init;
 	ionic_lif_reset_comp lif_reset;
@@ -2335,19 +2741,20 @@ union ionic_dev_cmd_comp {
 	ionic_qos_init_comp qos_init;
 	ionic_qos_reset_comp qos_reset;
 
+	struct ionic_q_identify_comp q_identify;
 	struct ionic_q_init_comp q_init;
 };
 
 /**
- * union dev_info - Device info register format (read-only)
- * @signature:       Signature value of 0x44455649 ('DEVI').
- * @version:         Current version of info.
- * @asic_type:       Asic type.
- * @asic_rev:        Asic revision.
- * @fw_status:       Firmware status.
- * @fw_heartbeat:    Firmware heartbeat counter.
- * @serial_num:      Serial number.
- * @fw_version:      Firmware version.
+ * union ionic_dev_info_regs - Device info register format (read-only)
+ * @signature:       Signature value of 0x44455649 ('DEVI')
+ * @version:         Current version of info
+ * @asic_type:       Asic type
+ * @asic_rev:        Asic revision
+ * @fw_status:       Firmware status
+ * @fw_heartbeat:    Firmware heartbeat counter
+ * @serial_num:      Serial number
+ * @fw_version:      Firmware version
  */
 union ionic_dev_info_regs {
 #define IONIC_DEVINFO_FWVERS_BUFLEN 32
@@ -2357,6 +2764,7 @@ union ionic_dev_info_regs {
 		u8     version;
 		u8     asic_type;
 		u8     asic_rev;
+#define IONIC_FW_STS_F_RUNNING	0x1
 		u8     fw_status;
 		u32    fw_heartbeat;
 		char   fw_version[IONIC_DEVINFO_FWVERS_BUFLEN];
@@ -2367,10 +2775,10 @@ union ionic_dev_info_regs {
 
 /**
  * union ionic_dev_cmd_regs - Device command register format (read-write)
- * @doorbell:        Device Cmd Doorbell, write-only.
+ * @doorbell:        Device Cmd Doorbell, write-only
  *                   Write a 1 to signal device to process cmd,
  *                   poll done for completion.
- * @done:            Done indicator, bit 0 == 1 when command is complete.
+ * @done:            Done indicator, bit 0 == 1 when command is complete
  * @cmd:             Opcode-specific command bytes
  * @comp:            Opcode-specific response bytes
  * @data:            Opcode-specific side-data
@@ -2383,12 +2791,12 @@ union ionic_dev_cmd_regs {
 		union ionic_dev_cmd_comp    comp;
 		u8                    rsvd[48];
 		u32                   data[478];
-	};
+	} __rte_packed;
 	u32 words[512];
 };
 
 /**
- * union ionic_dev_regs - Device register format in for bar 0 page 0
+ * union ionic_dev_regs - Device register format for bar 0 page 0
  * @info:            Device info registers
  * @devcmd:          Device command registers
  */
@@ -2396,13 +2804,14 @@ union ionic_dev_regs {
 	struct {
 		union ionic_dev_info_regs info;
 		union ionic_dev_cmd_regs  devcmd;
-	};
+	} __rte_packed;
 	__le32 words[1024];
 };
 
 union ionic_adminq_cmd {
 	struct ionic_admin_cmd cmd;
 	struct ionic_nop_cmd nop;
+	struct ionic_q_identify_cmd q_identify;
 	struct ionic_q_init_cmd q_init;
 	struct ionic_q_control_cmd q_control;
 	struct ionic_lif_setattr_cmd lif_setattr;
@@ -2419,6 +2828,7 @@ union ionic_adminq_cmd {
 union ionic_adminq_comp {
 	struct ionic_admin_comp comp;
 	struct ionic_nop_comp nop;
+	struct ionic_q_identify_comp q_identify;
 	struct ionic_q_init_comp q_init;
 	struct ionic_lif_setattr_comp lif_setattr;
 	struct ionic_lif_getattr_comp lif_getattr;
@@ -2444,14 +2854,14 @@ union ionic_adminq_comp {
 /**
  * struct ionic_doorbell - Doorbell register layout
  * @p_index: Producer index
- * @ring:    Selects the specific ring of the queue to update.
+ * @ring:    Selects the specific ring of the queue to update
  *           Type-specific meaning:
- *              ring=0: Default producer/consumer queue.
+ *              ring=0: Default producer/consumer queue
  *              ring=1: (CQ, EQ) Re-Arm queue.  RDMA CQs
  *              send events to EQs when armed.  EQs send
  *              interrupts when armed.
- * @qid:     The queue id selects the queue destination for the
- *           producer index and flags.
+ * @qid_lo:  Queue destination for the producer index and flags (low bits)
+ * @qid_hi:  Queue destination for the producer index and flags (high bits)
  */
 struct ionic_doorbell {
 	__le16 p_index;
@@ -2461,6 +2871,92 @@ struct ionic_doorbell {
 	u16    rsvd2;
 };
 
+/**
+ * struct ionic_intr_ctrl - Interrupt control register
+ * @coalescing_init:  Coalescing timer initial value, in
+ *                    device units.  Use @identity->intr_coal_mult
+ *                    and @identity->intr_coal_div to convert from
+ *                    usecs to device units:
+ *
+ *                      coal_init = coal_usecs * coal_mutl / coal_div
+ *
+ *                    When an interrupt is sent the interrupt
+ *                    coalescing timer current value
+ *                    (@coalescing_curr) is initialized with this
+ *                    value and begins counting down.  No more
+ *                    interrupts are sent until the coalescing
+ *                    timer reaches 0.  When @coalescing_init=0
+ *                    interrupt coalescing is effectively disabled
+ *                    and every interrupt assert results in an
+ *                    interrupt.  Reset value: 0
+ * @mask:             Interrupt mask.  When @mask=1 the interrupt
+ *                    resource will not send an interrupt.  When
+ *                    @mask=0 the interrupt resource will send an
+ *                    interrupt if an interrupt event is pending
+ *                    or on the next interrupt assertion event.
+ *                    Reset value: 1
+ * @int_credits:      Interrupt credits.  This register indicates
+ *                    how many interrupt events the hardware has
+ *                    sent.  When written by software this
+ *                    register atomically decrements @int_credits
+ *                    by the value written.  When @int_credits
+ *                    becomes 0 then the "pending interrupt" bit
+ *                    in the Interrupt Status register is cleared
+ *                    by the hardware and any pending but unsent
+ *                    interrupts are cleared.
+ *                    !!!IMPORTANT!!! This is a signed register.
+ * @flags:            Interrupt control flags
+ *                       @unmask -- When this bit is written with a 1
+ *                       the interrupt resource will set mask=0.
+ *                       @coal_timer_reset -- When this
+ *                       bit is written with a 1 the
+ *                       @coalescing_curr will be reloaded with
+ *                       @coalescing_init to reset the coalescing
+ *                       timer.
+ * @mask_on_assert:   Automatically mask on assertion.  When
+ *                    @mask_on_assert=1 the interrupt resource
+ *                    will set @mask=1 whenever an interrupt is
+ *                    sent.  When using interrupts in Legacy
+ *                    Interrupt mode the driver must select
+ *                    @mask_on_assert=0 for proper interrupt
+ *                    operation.
+ * @coalescing_curr:  Coalescing timer current value, in
+ *                    microseconds.  When this value reaches 0
+ *                    the interrupt resource is again eligible to
+ *                    send an interrupt.  If an interrupt event
+ *                    is already pending when @coalescing_curr
+ *                    reaches 0 the pending interrupt will be
+ *                    sent, otherwise an interrupt will be sent
+ *                    on the next interrupt assertion event.
+ */
+struct ionic_intr_ctrl {
+	u8 coalescing_init;
+	u8 rsvd[3];
+	u8 mask;
+	u8 rsvd2[3];
+	u16 int_credits;
+	u16 flags;
+#define INTR_F_UNMASK		0x0001
+#define INTR_F_TIMER_RESET	0x0002
+	u8 mask_on_assert;
+	u8 rsvd3[3];
+	u8 coalescing_curr;
+	u8 rsvd4[3];
+	u32 rsvd6[3];
+};
+
+#define IONIC_INTR_CTRL_REGS_MAX	2048
+#define IONIC_INTR_CTRL_COAL_MAX	0x3F
+
+#define intr_to_coal(intr_ctrl)		\
+		((void __iomem *)&(intr_ctrl)->coalescing_init)
+#define intr_to_mask(intr_ctrl)		\
+		((void __iomem *)&(intr_ctrl)->mask)
+#define intr_to_credits(intr_ctrl)	\
+		((void __iomem *)&(intr_ctrl)->int_credits)
+#define intr_to_mask_on_assert(intr_ctrl)\
+		((void __iomem *)&(intr_ctrl)->mask_on_assert)
+
 struct ionic_intr_status {
 	u32 status[2];
 };
@@ -2477,6 +2973,28 @@ union ionic_notifyq_comp {
 	struct ionic_log_event log;
 };
 
+/**
+ * struct ionic_eq_comp - Event queue completion descriptor
+ *
+ * @code:	Event code, see enum ionic_eq_comp_code
+ * @lif_index:	To which LIF the event pertains
+ * @qid:	To which queue id the event pertains
+ * @gen_color:	Event queue wrap counter, init 1, incr each wrap
+ */
+struct ionic_eq_comp {
+	__le16 code;
+	__le16 lif_index;
+	__le32 qid;
+	u8 rsvd[7];
+	u8 gen_color;
+};
+
+enum ionic_eq_comp_code {
+	IONIC_EQ_COMP_CODE_NONE = 0,
+	IONIC_EQ_COMP_CODE_RX_COMP = 1,
+	IONIC_EQ_COMP_CODE_TX_COMP = 2,
+};
+
 /* Deprecate */
 struct ionic_identity {
 	union ionic_drv_identity drv;
@@ -2484,8 +3002,7 @@ struct ionic_identity {
 	union ionic_lif_identity lif;
 	union ionic_port_identity port;
 	union ionic_qos_identity qos;
+	union ionic_q_identity txq;
 };
 
-#pragma pack(pop)
-
 #endif /* _IONIC_IF_H_ */
diff --git a/drivers/net/ionic/ionic_regs.h b/drivers/net/ionic/ionic_regs.h
index 3adc2bc7c..6ebc48d04 100644
--- a/drivers/net/ionic/ionic_regs.h
+++ b/drivers/net/ionic/ionic_regs.h
@@ -21,9 +21,6 @@ struct ionic_intr {
 	uint32_t rsvd[3];
 };
 
-#define IONIC_INTR_CTRL_REGS_MAX	2048
-#define IONIC_INTR_CTRL_COAL_MAX	0x3F
-
 /** enum ionic_intr_mask_vals - valid values for mask and mask_assert.
  * @IONIC_INTR_MASK_CLEAR:	unmask interrupt.
  * @IONIC_INTR_MASK_SET:	mask interrupt.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH 4/8] ionic: check for devcmd/admincmd completion more frequently
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (2 preceding siblings ...)
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 3/8] ionic: update ionic_if.h to the latest version Andrew Boyer
@ 2020-11-02 18:35 ` Andrew Boyer
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 5/8] ionic: remove some unused fields Andrew Boyer
                   ` (14 subsequent siblings)
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-11-02 18:35 UTC (permalink / raw)
  To: dev; +Cc: cardigliano, Andrew Boyer, Neel Patel

This reduces the startup time by a few seconds.

Signed-off-by: Neel Patel <neel@pensando.io>
Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_dev.h   |  4 +++-
 drivers/net/ionic/ionic_main.c  | 36 ++++++++++++++++-----------------
 drivers/net/ionic/ionic_osdep.h | 10 ---------
 3 files changed, 21 insertions(+), 29 deletions(-)

diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index 532255a60..dc64a6d28 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -20,7 +20,9 @@
 
 #define IONIC_LIFS_MAX			1024
 
-#define IONIC_DEVCMD_TIMEOUT	30 /* devcmd_timeout */
+#define IONIC_DEVCMD_TIMEOUT		5	/* devcmd_timeout */
+#define IONIC_DEVCMD_CHECK_PERIOD_US	10	/* devcmd status chk period */
+
 #define	IONIC_ALIGN             4096
 
 struct ionic_adapter;
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index 2ade213d2..f77bddaa4 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -144,12 +144,12 @@ static int
 ionic_wait_ctx_for_completion(struct ionic_lif *lif, struct ionic_qcq *qcq,
 		struct ionic_admin_ctx *ctx, unsigned long max_wait)
 {
-	unsigned long step_msec = 1;
-	unsigned int max_wait_msec = max_wait * 1000;
-	unsigned long elapsed_msec = 0;
+	unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US;
+	unsigned long max_wait_usec = max_wait * 1000000L;
+	unsigned long elapsed_usec = 0;
 	int budget = 8;
 
-	while (ctx->pending_work && elapsed_msec < max_wait_msec) {
+	while (ctx->pending_work && elapsed_usec < max_wait_usec) {
 		/*
 		 * Locking here as adminq is served inline (this could be called
 		 * from multiple places)
@@ -160,8 +160,8 @@ ionic_wait_ctx_for_completion(struct ionic_lif *lif, struct ionic_qcq *qcq,
 
 		rte_spinlock_unlock(&lif->adminq_service_lock);
 
-		msec_delay(step_msec);
-		elapsed_msec += step_msec;
+		rte_delay_us_block(step_usec);
+		elapsed_usec += step_usec;
 	}
 
 	return (!ctx->pending_work);
@@ -195,9 +195,9 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 static int
 ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait)
 {
-	unsigned long step_msec = 100;
-	unsigned int max_wait_msec = max_wait * 1000;
-	unsigned long elapsed_msec = 0;
+	unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US;
+	unsigned long max_wait_usec = max_wait * 1000000L;
+	unsigned long elapsed_usec = 0;
 	int done;
 
 	/* Wait for dev cmd to complete.. but no more than max_wait sec */
@@ -205,20 +205,20 @@ ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait)
 	do {
 		done = ionic_dev_cmd_done(idev);
 		if (done) {
-			IONIC_PRINT(DEBUG, "DEVCMD %d done took %ld msecs",
-				idev->dev_cmd->cmd.cmd.opcode,
-				elapsed_msec);
+			IONIC_PRINT(DEBUG, "DEVCMD %d done took %ld usecs",
+				ioread8(&idev->dev_cmd->cmd.cmd.opcode),
+				elapsed_usec);
 			return 0;
 		}
 
-		msec_delay(step_msec);
+		rte_delay_us_block(step_usec);
 
-		elapsed_msec += step_msec;
-	} while (elapsed_msec < max_wait_msec);
+		elapsed_usec += step_usec;
+	} while (elapsed_usec < max_wait_usec);
 
-	IONIC_PRINT(DEBUG, "DEVCMD %d timeout after %ld msecs",
-		idev->dev_cmd->cmd.cmd.opcode,
-		elapsed_msec);
+	IONIC_PRINT(ERR, "DEVCMD %d timeout after %ld usecs",
+		ioread8(&idev->dev_cmd->cmd.cmd.opcode),
+		elapsed_usec);
 
 	return -ETIMEDOUT;
 }
diff --git a/drivers/net/ionic/ionic_osdep.h b/drivers/net/ionic/ionic_osdep.h
index e04bb8f65..a55d59918 100644
--- a/drivers/net/ionic/ionic_osdep.h
+++ b/drivers/net/ionic/ionic_osdep.h
@@ -20,13 +20,8 @@
 
 #include "ionic_logs.h"
 
-#define DELAY(x) rte_delay_us(x)
-#define usec_delay(x) DELAY(x)
-#define msec_delay(x) DELAY(1000 * (x))
-
 #define BIT(nr)            (1UL << (nr))
 #define BIT_ULL(nr)        (1ULL << (nr))
-#define BITS_TO_LONGS(nr)  div_round_up(nr, 8 * sizeof(long))
 
 #ifndef PAGE_SHIFT
 #define PAGE_SHIFT      12
@@ -44,11 +39,6 @@ typedef uint16_t __le16;
 typedef uint32_t __le32;
 typedef uint64_t __le64;
 
-static inline uint32_t div_round_up(uint32_t n, uint32_t d)
-{
-	return (n + d - 1) / d;
-}
-
 #define ioread8(reg)		rte_read8(reg)
 #define ioread32(reg)		rte_read32(reg)
 #define iowrite8(value, reg)	rte_write8(value, reg)
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH 5/8] ionic: remove some unused fields
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (3 preceding siblings ...)
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 4/8] ionic: check for devcmd/admincmd completion more frequently Andrew Boyer
@ 2020-11-02 18:35 ` Andrew Boyer
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 6/8] ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
                   ` (13 subsequent siblings)
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-11-02 18:35 UTC (permalink / raw)
  To: dev; +Cc: cardigliano, Andrew Boyer

These fields were constant or unused.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_dev.c |  5 +----
 drivers/net/ionic/ionic_dev.h |  7 +------
 drivers/net/ionic/ionic_lif.c | 22 ++++++----------------
 drivers/net/ionic/ionic_lif.h |  2 --
 4 files changed, 8 insertions(+), 28 deletions(-)

diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c
index 5c2820b7a..fc68f5c74 100644
--- a/drivers/net/ionic/ionic_dev.c
+++ b/drivers/net/ionic/ionic_dev.c
@@ -65,7 +65,6 @@ ionic_dev_setup(struct ionic_adapter *adapter)
 	}
 
 	idev->db_pages = bar->vaddr;
-	idev->phy_db_pages = bar->bus_addr;
 
 	return 0;
 }
@@ -343,7 +342,6 @@ ionic_dev_cmd_adminq_init(struct ionic_dev *idev,
 		.q_init.type = q->type,
 		.q_init.index = q->index,
 		.q_init.flags = IONIC_QINIT_F_ENA,
-		.q_init.pid = q->pid,
 		.q_init.intr_index = intr_index,
 		.q_init.ring_size = rte_log2_u32(q->num_descs),
 		.q_init.ring_base = q->base_pa,
@@ -419,7 +417,7 @@ ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,
 int
 ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	     struct ionic_queue *q, uint32_t index, uint32_t num_descs,
-	     size_t desc_size, size_t sg_desc_size, uint32_t pid)
+	     size_t desc_size, size_t sg_desc_size)
 {
 	uint32_t ring_size;
 
@@ -439,7 +437,6 @@ ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	q->sg_desc_size = sg_desc_size;
 	q->head_idx = 0;
 	q->tail_idx = 0;
-	q->pid = pid;
 
 	return 0;
 }
diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index dc64a6d28..7150f7f2c 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -120,10 +120,7 @@ struct ionic_dev {
 	union ionic_dev_cmd_regs __iomem *dev_cmd;
 
 	struct ionic_doorbell __iomem *db_pages;
-	rte_iova_t phy_db_pages;
-
 	struct ionic_intr __iomem *intr_ctrl;
-
 	struct ionic_intr_status __iomem *intr_status;
 
 	struct ionic_port_info *port_info;
@@ -163,11 +160,9 @@ struct ionic_queue {
 	uint32_t num_descs;
 	uint32_t desc_size;
 	uint32_t sg_desc_size;
-	uint32_t pid;
 	uint32_t qid;
 	uint32_t qtype;
 	struct ionic_doorbell __iomem *db;
-	void *nop_desc;
 };
 
 #define IONIC_INTR_INDEX_NOT_ASSIGNED	(-1)
@@ -257,7 +252,7 @@ uint32_t ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,
 
 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	struct ionic_queue *q, uint32_t index, uint32_t num_descs,
-	size_t desc_size, size_t sg_desc_size, uint32_t pid);
+	size_t desc_size, size_t sg_desc_size);
 void ionic_q_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
 void ionic_q_sg_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
 void ionic_q_flush(struct ionic_queue *q);
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 60a5f3d53..bc15d75fd 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -536,8 +536,6 @@ ionic_lif_change_mtu(struct ionic_lif *lif, int new_mtu)
 	if (err)
 		return err;
 
-	lif->mtu = new_mtu;
-
 	return 0;
 }
 
@@ -583,7 +581,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 		uint32_t desc_size,
 		uint32_t cq_desc_size,
 		uint32_t sg_desc_size,
-		uint32_t pid, struct ionic_qcq **qcq)
+		struct ionic_qcq **qcq)
 {
 	struct ionic_dev *idev = &lif->adapter->idev;
 	struct ionic_qcq *new;
@@ -633,7 +631,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 	new->q.type = type;
 
 	err = ionic_q_init(lif, idev, &new->q, index, num_descs,
-		desc_size, sg_desc_size, pid);
+		desc_size, sg_desc_size);
 	if (err) {
 		IONIC_PRINT(ERR, "Queue initialization failed");
 		return err;
@@ -734,7 +732,7 @@ ionic_rx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t nrxq_descs,
 		sizeof(struct ionic_rxq_desc),
 		sizeof(struct ionic_rxq_comp),
 		sizeof(struct ionic_rxq_sg_desc),
-		lif->kern_pid, &lif->rxqcqs[index]);
+		&lif->rxqcqs[index]);
 	if (err)
 		return err;
 
@@ -756,7 +754,7 @@ ionic_tx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t ntxq_descs,
 		sizeof(struct ionic_txq_desc),
 		sizeof(struct ionic_txq_comp),
 		sizeof(struct ionic_txq_sg_desc),
-		lif->kern_pid, &lif->txqcqs[index]);
+		&lif->txqcqs[index]);
 	if (err)
 		return err;
 
@@ -777,7 +775,7 @@ ionic_admin_qcq_alloc(struct ionic_lif *lif)
 		sizeof(struct ionic_admin_cmd),
 		sizeof(struct ionic_admin_comp),
 		0,
-		lif->kern_pid, &lif->adminqcq);
+		&lif->adminqcq);
 	if (err)
 		return err;
 
@@ -798,7 +796,7 @@ ionic_notify_qcq_alloc(struct ionic_lif *lif)
 		sizeof(struct ionic_notifyq_cmd),
 		sizeof(union ionic_notifyq_comp),
 		0,
-		lif->kern_pid, &lif->notifyqcq);
+		&lif->notifyqcq);
 	if (err)
 		return err;
 
@@ -831,8 +829,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
 	rte_spinlock_init(&lif->adminq_lock);
 	rte_spinlock_init(&lif->adminq_service_lock);
 
-	lif->kern_pid = 0;
-
 	dbpage_num = ionic_db_page_num(lif, 0);
 
 	lif->kern_dbpage = ionic_bus_map_dbpage(adapter, dbpage_num);
@@ -1211,13 +1207,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
 			.index = q->index,
 			.flags = (IONIC_QINIT_F_IRQ | IONIC_QINIT_F_ENA),
 			.intr_index = qcq->intr.index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 		}
 	};
 
-	IONIC_PRINT(DEBUG, "notifyq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "notifyq_init.index %d",
 		ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
@@ -1320,7 +1314,6 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 			.index = q->index,
 			.flags = IONIC_QINIT_F_SG,
 			.intr_index = cq->bound_intr->index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 			.cq_ring_base = cq->base_pa,
@@ -1329,7 +1322,6 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "txq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "txq_init.index %d", ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "txq_init.ring_base 0x%" PRIx64 "",
 		ctx.cmd.q_init.ring_base);
@@ -1368,7 +1360,6 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 			.index = q->index,
 			.flags = IONIC_QINIT_F_SG,
 			.intr_index = cq->bound_intr->index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 			.cq_ring_base = cq->base_pa,
@@ -1377,7 +1368,6 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "rxq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "rxq_init.index %d", ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "rxq_init.ring_base 0x%" PRIx64 "",
 		ctx.cmd.q_init.ring_base);
diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 425762d65..4e091719f 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -84,13 +84,11 @@ struct ionic_lif {
 	struct ionic_adapter *adapter;
 	struct rte_eth_dev *eth_dev;
 	uint16_t port_id;  /**< Device port identifier */
-	uint16_t mtu;
 	uint32_t index;
 	uint32_t hw_index;
 	uint32_t state;
 	uint32_t ntxqcqs;
 	uint32_t nrxqcqs;
-	uint32_t kern_pid;
 	rte_spinlock_t adminq_lock;
 	rte_spinlock_t adminq_service_lock;
 	struct ionic_qcq *adminqcq;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH 6/8] ionic: convert 'deferred' boolean to a flag bit
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (4 preceding siblings ...)
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 5/8] ionic: remove some unused fields Andrew Boyer
@ 2020-11-02 18:35 ` Andrew Boyer
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 7/8] ionic: warn if RTE tries to enable loopback mode Andrew Boyer
                   ` (12 subsequent siblings)
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-11-02 18:35 UTC (permalink / raw)
  To: dev; +Cc: cardigliano, Andrew Boyer

This saves space in the structure.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_lif.c  |  4 ++--
 drivers/net/ionic/ionic_lif.h  |  2 +-
 drivers/net/ionic/ionic_rxtx.c | 10 ++++++----
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index bc15d75fd..2e33fb8d9 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -1590,7 +1590,7 @@ ionic_lif_start(struct ionic_lif *lif)
 
 	for (i = 0; i < lif->nrxqcqs; i++) {
 		struct ionic_qcq *rxq = lif->rxqcqs[i];
-		if (!rxq->deferred_start) {
+		if (!(rxq->flags & IONIC_QCQ_F_DEFERRED)) {
 			err = ionic_dev_rx_queue_start(lif->eth_dev, i);
 
 			if (err)
@@ -1600,7 +1600,7 @@ ionic_lif_start(struct ionic_lif *lif)
 
 	for (i = 0; i < lif->ntxqcqs; i++) {
 		struct ionic_qcq *txq = lif->txqcqs[i];
-		if (!txq->deferred_start) {
+		if (!(txq->flags & IONIC_QCQ_F_DEFERRED)) {
 			err = ionic_dev_tx_queue_start(lif->eth_dev, i);
 
 			if (err)
diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 4e091719f..8e2b42443 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -50,6 +50,7 @@ struct ionic_rx_stats {
 #define IONIC_QCQ_F_SG		BIT(1)
 #define IONIC_QCQ_F_INTR	BIT(2)
 #define IONIC_QCQ_F_NOTIFYQ	BIT(3)
+#define IONIC_QCQ_F_DEFERRED	BIT(4)
 
 /* Queue / Completion Queue */
 struct ionic_qcq {
@@ -68,7 +69,6 @@ struct ionic_qcq {
 	uint32_t total_size;
 	uint32_t flags;
 	struct ionic_intr_info intr;
-	bool deferred_start;
 };
 
 #define IONIC_Q_TO_QCQ(q)	container_of(q, struct ionic_qcq, q)
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index 2592f5cab..b953aff49 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -64,7 +64,7 @@ ionic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
 
 	qinfo->nb_desc = q->num_descs;
 	qinfo->conf.offloads = txq->offloads;
-	qinfo->conf.tx_deferred_start = txq->deferred_start;
+	qinfo->conf.tx_deferred_start = txq->flags & IONIC_QCQ_F_DEFERRED;
 }
 
 static inline void __rte_cold
@@ -196,7 +196,8 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	}
 
 	/* Do not start queue with rte_eth_dev_start() */
-	txq->deferred_start = tx_conf->tx_deferred_start;
+	if (tx_conf->tx_deferred_start)
+		txq->flags |= IONIC_QCQ_F_DEFERRED;
 
 	txq->offloads = offloads;
 
@@ -605,7 +606,7 @@ ionic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
 	qinfo->mp = rxq->mb_pool;
 	qinfo->scattered_rx = dev->data->scattered_rx;
 	qinfo->nb_desc = q->num_descs;
-	qinfo->conf.rx_deferred_start = rxq->deferred_start;
+	qinfo->conf.rx_deferred_start = rxq->flags & IONIC_QCQ_F_DEFERRED;
 	qinfo->conf.offloads = rxq->offloads;
 }
 
@@ -703,7 +704,8 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	 */
 
 	/* Do not start queue with rte_eth_dev_start() */
-	rxq->deferred_start = rx_conf->rx_deferred_start;
+	if (rx_conf->rx_deferred_start)
+		rxq->flags |= IONIC_QCQ_F_DEFERRED;
 
 	rxq->offloads = offloads;
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH 7/8] ionic: warn if RTE tries to enable loopback mode
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (5 preceding siblings ...)
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 6/8] ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
@ 2020-11-02 18:35 ` Andrew Boyer
  2020-11-03 12:52   ` Ferruh Yigit
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 8/8] ionic: nits - whitespace, logging, helper variables Andrew Boyer
                   ` (11 subsequent siblings)
  18 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-11-02 18:35 UTC (permalink / raw)
  To: dev; +Cc: cardigliano, Andrew Boyer

The ionic FW does not support loopback mode at this time.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_ethdev.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index 600333e20..ff5c2e51a 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -919,6 +919,9 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
 		return -EINVAL;
 	}
 
+	if (dev_conf->lpbk_mode)
+		IONIC_PRINT(WARNING, "Loopback mode not supported");
+
 	err = ionic_lif_start(lif);
 	if (err) {
 		IONIC_PRINT(ERR, "Cannot start LIF: %d", err);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH 8/8] ionic: nits - whitespace, logging, helper variables
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (6 preceding siblings ...)
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 7/8] ionic: warn if RTE tries to enable loopback mode Andrew Boyer
@ 2020-11-02 18:35 ` Andrew Boyer
  2020-11-03 13:06   ` Ferruh Yigit
  2020-11-03 13:11 ` [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Ferruh Yigit
                   ` (10 subsequent siblings)
  18 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-11-02 18:35 UTC (permalink / raw)
  To: dev; +Cc: cardigliano, Andrew Boyer

These are minor cleanups which did not deserve their own patches.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_ethdev.c | 10 ++++------
 drivers/net/ionic/ionic_lif.c    | 22 ++++++++++-----------
 drivers/net/ionic/ionic_main.c   |  4 +---
 drivers/net/ionic/ionic_rxtx.c   | 33 ++++++++++++++------------------
 4 files changed, 29 insertions(+), 40 deletions(-)

diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index ff5c2e51a..04d4c989c 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -571,7 +571,7 @@ ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,
 
 	if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
 		IONIC_PRINT(ERR, "The size of hash lookup table configured "
-			"(%d) doesn't match the number hardware can supported "
+			"(%d) doesn't match the number hardware can support "
 			"(%d)",
 			reta_size, ident->lif.eth.rss_ind_tbl_sz);
 		return -EINVAL;
@@ -605,7 +605,7 @@ ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,
 
 	if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
 		IONIC_PRINT(ERR, "The size of hash lookup table configured "
-			"(%d) doesn't match the number hardware can supported "
+			"(%d) doesn't match the number hardware can support "
 			"(%d)",
 			reta_size, ident->lif.eth.rss_ind_tbl_sz);
 		return -EINVAL;
@@ -901,7 +901,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
 	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 	struct ionic_adapter *adapter = lif->adapter;
 	struct ionic_dev *idev = &adapter->idev;
-	uint32_t allowed_speeds;
+	uint32_t speed, allowed_speeds;
 	int err;
 
 	IONIC_PRINT_CALL();
@@ -929,8 +929,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
 	}
 
 	if (eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED) {
-		uint32_t speed = ionic_parse_link_speeds(dev_conf->link_speeds);
-
+		speed = ionic_parse_link_speeds(dev_conf->link_speeds);
 		if (speed)
 			ionic_dev_cmd_port_speed(idev, speed);
 	}
@@ -1264,7 +1263,6 @@ eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 	}
 
 	err = ionic_configure_intr(adapter);
-
 	if (err) {
 		IONIC_PRINT(ERR, "Failed to configure interrupts");
 		goto err_free_adapter;
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 2e33fb8d9..018103c5b 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -85,7 +85,8 @@ ionic_lif_reset(struct ionic_lif *lif)
 }
 
 static void
-ionic_lif_get_abs_stats(const struct ionic_lif *lif, struct rte_eth_stats *stats)
+ionic_lif_get_abs_stats(const struct ionic_lif *lif,
+		struct rte_eth_stats *stats)
 {
 	struct ionic_lif_stats *ls = &lif->info->stats;
 	uint32_t i;
@@ -305,10 +306,11 @@ ionic_dev_add_mac(struct rte_eth_dev *eth_dev,
 }
 
 void
-ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused)
+ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index)
 {
 	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 	struct ionic_adapter *adapter = lif->adapter;
+	struct rte_ether_addr *mac_addr;
 
 	IONIC_PRINT_CALL();
 
@@ -319,11 +321,12 @@ ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused)
 		return;
 	}
 
-	if (!rte_is_valid_assigned_ether_addr(&eth_dev->data->mac_addrs[index]))
+	mac_addr = &eth_dev->data->mac_addrs[index];
+
+	if (!rte_is_valid_assigned_ether_addr(mac_addr))
 		return;
 
-	ionic_lif_addr_del(lif, (const uint8_t *)
-		&eth_dev->data->mac_addrs[index]);
+	ionic_lif_addr_del(lif, (const uint8_t *)mac_addr);
 }
 
 int
@@ -658,7 +661,6 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 	new->base_z = rte_eth_dma_zone_reserve(lif->eth_dev,
 		base /* name */, index /* queue_idx */,
 		total_size, IONIC_ALIGN, socket_id);
-
 	if (!new->base_z) {
 		IONIC_PRINT(ERR, "Cannot reserve queue DMA memory");
 		err = -ENOMEM;
@@ -682,8 +684,8 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 		ionic_q_sg_map(&new->q, sg_base, sg_base_pa);
 	}
 
-	IONIC_PRINT(DEBUG, "Q-Base-PA = %ju CQ-Base-PA = %ju "
-		"SG-base-PA = %ju",
+	IONIC_PRINT(DEBUG, "Q-Base-PA = %#lx CQ-Base-PA = %#lx "
+		"SG-base-PA = %#lx",
 		q_base_pa, cq_base_pa, sg_base_pa);
 
 	ionic_q_map(&new->q, q_base, q_base_pa);
@@ -839,7 +841,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
 
 	lif->txqcqs = rte_zmalloc("ionic", sizeof(*lif->txqcqs) *
 		adapter->max_ntxqs_per_lif, 0);
-
 	if (!lif->txqcqs) {
 		IONIC_PRINT(ERR, "Cannot allocate tx queues array");
 		return -ENOMEM;
@@ -847,7 +848,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
 
 	lif->rxqcqs = rte_zmalloc("ionic", sizeof(*lif->rxqcqs) *
 		adapter->max_nrxqs_per_lif, 0);
-
 	if (!lif->rxqcqs) {
 		IONIC_PRINT(ERR, "Cannot allocate rx queues array");
 		return -ENOMEM;
@@ -863,8 +863,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
 
 	IONIC_PRINT(DEBUG, "Allocating Admin Queue");
 
-	IONIC_PRINT(DEBUG, "Allocating Admin Queue");
-
 	err = ionic_admin_qcq_alloc(lif);
 	if (err) {
 		IONIC_PRINT(ERR, "Cannot allocate admin queue");
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index f77bddaa4..a0cbaebe2 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -181,15 +181,13 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 	if (err) {
 		IONIC_PRINT(ERR, "Failure posting to the admin queue %d (%d)",
 			ctx->cmd.cmd.opcode, err);
-
 		return err;
 	}
 
 	done = ionic_wait_ctx_for_completion(lif, qcq, ctx,
 		IONIC_DEVCMD_TIMEOUT);
 
-	err = ionic_adminq_check_err(ctx, !done /* timed out */);
-	return err;
+	return ionic_adminq_check_err(ctx, !done /* timed out */);
 }
 
 static int
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index b953aff49..e955fdbfe 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -133,7 +133,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 {
 	struct ionic_qcq *txq;
 
-	IONIC_PRINT_CALL();
+	IONIC_PRINT(DEBUG, "Stopping TX queue %u", tx_queue_id);
 
 	txq = eth_dev->data->tx_queues[tx_queue_id];
 
@@ -164,11 +164,6 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	uint64_t offloads;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Configuring TX queue %u with %u buffers",
-		tx_queue_id, nb_desc);
-
 	if (tx_queue_id >= lif->ntxqcqs) {
 		IONIC_PRINT(DEBUG, "Queue index %u not available "
 			"(max %u queues)",
@@ -177,6 +172,9 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	}
 
 	offloads = tx_conf->offloads | eth_dev->data->dev_conf.txmode.offloads;
+	IONIC_PRINT(DEBUG,
+		"Configuring TX queue %u with %u buffers, offloads %lx",
+		tx_queue_id, nb_desc, offloads);
 
 	/* Validate number of receive descriptors */
 	if (!rte_is_power_of_2(nb_desc) || nb_desc < IONIC_MIN_RING_DESC)
@@ -215,10 +213,11 @@ ionic_dev_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 	struct ionic_qcq *txq;
 	int err;
 
-	IONIC_PRINT_CALL();
-
 	txq = eth_dev->data->tx_queues[tx_queue_id];
 
+	IONIC_PRINT(DEBUG, "Starting TX queue %u, %u descs",
+		tx_queue_id, txq->q.num_descs);
+
 	err = ionic_lif_txq_init(txq);
 	if (err)
 		return err;
@@ -651,11 +650,6 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	uint64_t offloads;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Configuring RX queue %u with %u buffers",
-		rx_queue_id, nb_desc);
-
 	if (rx_queue_id >= lif->nrxqcqs) {
 		IONIC_PRINT(ERR,
 			"Queue index %u not available (max %u queues)",
@@ -664,6 +658,9 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	}
 
 	offloads = rx_conf->offloads | eth_dev->data->dev_conf.rxmode.offloads;
+	IONIC_PRINT(DEBUG,
+		"Configuring RX queue %u with %u buffers, offloads %lx",
+		rx_queue_id, nb_desc, offloads);
 
 	/* Validate number of receive descriptors */
 	if (!rte_is_power_of_2(nb_desc) ||
@@ -959,13 +956,11 @@ ionic_dev_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)
 	struct ionic_qcq *rxq;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Allocating RX queue buffers (size: %u)",
-		frame_size);
-
 	rxq = eth_dev->data->rx_queues[rx_queue_id];
 
+	IONIC_PRINT(DEBUG, "Starting RX queue %u, %u descs (size: %u)",
+		rx_queue_id, rxq->q.num_descs, frame_size);
+
 	err = ionic_lif_rxq_init(rxq);
 	if (err)
 		return err;
@@ -1045,7 +1040,7 @@ ionic_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)
 {
 	struct ionic_qcq *rxq;
 
-	IONIC_PRINT_CALL();
+	IONIC_PRINT(DEBUG, "Stopping RX queue %u", rx_queue_id);
 
 	rxq = eth_dev->data->rx_queues[rx_queue_id];
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH 1/8] ionic: update documentation and MAINTAINERS
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 1/8] ionic: update documentation and MAINTAINERS Andrew Boyer
@ 2020-11-03 12:35   ` Ferruh Yigit
  2020-11-03 14:43     ` Andrew Boyer
  0 siblings, 1 reply; 79+ messages in thread
From: Ferruh Yigit @ 2020-11-03 12:35 UTC (permalink / raw)
  To: Andrew Boyer, dev; +Cc: cardigliano

On 11/2/2020 6:35 PM, Andrew Boyer wrote:
> The ionic PMD is being actively maintained.
> 
> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
> ---
>   MAINTAINERS               |  5 +++--
>   doc/guides/nics/ionic.rst | 13 +++++++------
>   2 files changed, 10 insertions(+), 8 deletions(-)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5b390d1d8..7afed5f0a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -842,8 +842,9 @@ F: doc/guides/nics/pfe.rst
>   F: drivers/net/pfe/
>   F: doc/guides/nics/features/pfe.ini
>   
> -Pensando ionic - UNMAINTAINED

The trigger to mark PMD unmaintained was it didn't comply with new close dev_ops 
behavior [1], can you please make that patch before updating the status?

[1]
https://patches.dpdk.org/project/dpdk/list/?series=12565&state=*

> -M: Alfredo Cardigliano <cardigliano@ntop.org>
> +Pensando ionic
> +M: Andrew Boyer <aboyer@pensando.io>
> +M: Pensando Drivers <drivers@pensando.io>

Hi Andrew, Welcome.

I think better to not include the group as maintainer, it is very hard to follow 
who is behind it and who it actually responsible when a group is added.
Can we just use actual people for the maintainer?

>   F: drivers/net/ionic/
>   F: doc/guides/nics/ionic.rst
>   F: doc/guides/nics/features/ionic.ini
> diff --git a/doc/guides/nics/ionic.rst b/doc/guides/nics/ionic.rst
> index fd32926bf..2a394d15d 100644
> --- a/doc/guides/nics/ionic.rst
> +++ b/doc/guides/nics/ionic.rst
> @@ -1,5 +1,5 @@
>   ..  SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
> -    Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
> +    Copyright(c) 2018-2020 Pensando Systems, Inc. All rights reserved.
>   
>   IONIC Driver
>   ============
> @@ -7,15 +7,16 @@ IONIC Driver
>   The ionic driver provides support for Pensando server adapters.
>   It currently supports the below models:
>   
> -- `Naples DSC-25 <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>`_
> -- `Naples DSC-100 <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>`_
> +- DSC-25 dual-port 25G Distributed Services Card
> +- DSC-100 dual-port 100G Distributed Services Card

It was good to have product documentation, I see the old ones are not available 
now but can it be possible to replace with valid ones instead of removing?

>   
> -Please visit https://pensando.io for more information.
> +Please visit the Pensando web site at https://pensando.io for more information.
> +The `Documents <https://pensando.io/documents/>`_ page contains Product Briefs and other product information.
>   
>   Identifying the Adapter
>   -----------------------
>   
> -To find if one or more Pensando PCI Ethernet devices are installed
> +To determine if one or more Pensando DSC Ethernet devices are installed
>   on the host, check for the PCI devices:
>   
>      .. code-block:: console
> @@ -28,6 +29,6 @@ on the host, check for the PCI devices:
>   Building DPDK
>   -------------
>   
> -The ionic PMD driver supports UIO and VFIO, please refer to the
> +The ionic PMD driver supports UIO and VFIO. Please refer to the

I think "PMD driver" is wrong since 'PMD' is "poll mode driver"

>   :ref:`DPDK documentation that comes with the DPDK suite <linux_gsg>`
>   for instructions on how to build DPDK.
> 


^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH 3/8] ionic: update ionic_if.h to the latest version
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 3/8] ionic: update ionic_if.h to the latest version Andrew Boyer
@ 2020-11-03 12:44   ` Ferruh Yigit
  2020-11-03 14:36     ` Andrew Boyer
  0 siblings, 1 reply; 79+ messages in thread
From: Ferruh Yigit @ 2020-11-03 12:44 UTC (permalink / raw)
  To: Andrew Boyer, dev; +Cc: cardigliano

On 11/2/2020 6:35 PM, Andrew Boyer wrote:
> This file contains the firmware interface definitions.
> 

Is the version number stored somewhere for documentation?

> Signed-off-by: Andrew Boyer<aboyer@pensando.io>
> ---
>   drivers/net/ionic/ionic_if.h   | 1349 ++++++++++++++++++++++----------
>   drivers/net/ionic/ionic_regs.h |    3 -
>   2 files changed, 933 insertions(+), 419 deletions(-)
> 
> diff --git a/drivers/net/ionic/ionic_if.h b/drivers/net/ionic/ionic_if.h
> index f83c8711b..fe6b52b17 100644
> --- a/drivers/net/ionic/ionic_if.h
> +++ b/drivers/net/ionic/ionic_if.h
> @@ -1,17 +1,15 @@
> -/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB OR BSD-3-Clause */
> -/* Copyright (c) 2017-2019 Pensando Systems, Inc.  All rights reserved. */
> +/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB OR BSD-2-Clause */
> +/* Copyright (c) 2017-2020 Pensando Systems, Inc.  All rights reserved. */

This is changing the license, for any specific reason?


^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH 7/8] ionic: warn if RTE tries to enable loopback mode
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 7/8] ionic: warn if RTE tries to enable loopback mode Andrew Boyer
@ 2020-11-03 12:52   ` Ferruh Yigit
  0 siblings, 0 replies; 79+ messages in thread
From: Ferruh Yigit @ 2020-11-03 12:52 UTC (permalink / raw)
  To: Andrew Boyer, dev; +Cc: cardigliano

On 11/2/2020 6:35 PM, Andrew Boyer wrote:
> The ionic FW does not support loopback mode at this time.
> 

"RTE tries to enable"? what about,
net/ionic: warn if loopback mode is requested

> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
> ---
>   drivers/net/ionic/ionic_ethdev.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
> index 600333e20..ff5c2e51a 100644
> --- a/drivers/net/ionic/ionic_ethdev.c
> +++ b/drivers/net/ionic/ionic_ethdev.c
> @@ -919,6 +919,9 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
>   		return -EINVAL;
>   	}
>   
> +	if (dev_conf->lpbk_mode)
> +		IONIC_PRINT(WARNING, "Loopback mode not supported");
> +
>   	err = ionic_lif_start(lif);
>   	if (err) {
>   		IONIC_PRINT(ERR, "Cannot start LIF: %d", err);
> 


^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH 8/8] ionic: nits - whitespace, logging, helper variables
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 8/8] ionic: nits - whitespace, logging, helper variables Andrew Boyer
@ 2020-11-03 13:06   ` Ferruh Yigit
  2020-11-03 14:00     ` Andrew Boyer
  0 siblings, 1 reply; 79+ messages in thread
From: Ferruh Yigit @ 2020-11-03 13:06 UTC (permalink / raw)
  To: Andrew Boyer, dev; +Cc: cardigliano

On 11/2/2020 6:35 PM, Andrew Boyer wrote:
> These are minor cleanups which did not deserve their own patches.
> 
> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
> ---
>   drivers/net/ionic/ionic_ethdev.c | 10 ++++------
>   drivers/net/ionic/ionic_lif.c    | 22 ++++++++++-----------
>   drivers/net/ionic/ionic_main.c   |  4 +---
>   drivers/net/ionic/ionic_rxtx.c   | 33 ++++++++++++++------------------
>   4 files changed, 29 insertions(+), 40 deletions(-)
> 
> diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
> index ff5c2e51a..04d4c989c 100644
> --- a/drivers/net/ionic/ionic_ethdev.c
> +++ b/drivers/net/ionic/ionic_ethdev.c
> @@ -571,7 +571,7 @@ ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,
>   
>   	if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
>   		IONIC_PRINT(ERR, "The size of hash lookup table configured "
> -			"(%d) doesn't match the number hardware can supported "
> +			"(%d) doesn't match the number hardware can support "
>   			"(%d)",
>   			reta_size, ident->lif.eth.rss_ind_tbl_sz);
>   		return -EINVAL;
> @@ -605,7 +605,7 @@ ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,
>   
>   	if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
>   		IONIC_PRINT(ERR, "The size of hash lookup table configured "
> -			"(%d) doesn't match the number hardware can supported "
> +			"(%d) doesn't match the number hardware can support "
>   			"(%d)",
>   			reta_size, ident->lif.eth.rss_ind_tbl_sz);
>   		return -EINVAL;
> @@ -901,7 +901,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
>   	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
>   	struct ionic_adapter *adapter = lif->adapter;
>   	struct ionic_dev *idev = &adapter->idev;
> -	uint32_t allowed_speeds;
> +	uint32_t speed, allowed_speeds;
>   	int err;
>   
>   	IONIC_PRINT_CALL();
> @@ -929,8 +929,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
>   	}
>   
>   	if (eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED) {
> -		uint32_t speed = ionic_parse_link_speeds(dev_conf->link_speeds);
> -
> +		speed = ionic_parse_link_speeds(dev_conf->link_speeds);
>   		if (speed)
>   			ionic_dev_cmd_port_speed(idev, speed);
>   	}

I guess this is personal choice, but I suggest reducing the whitespace change as 
much as possible, if there is nothing to fix or refactor.

> @@ -1264,7 +1263,6 @@ eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
>   	}
>   
>   	err = ionic_configure_intr(adapter);
> -
>   	if (err) {
>   		IONIC_PRINT(ERR, "Failed to configure interrupts");
>   		goto err_free_adapter;
> diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
> index 2e33fb8d9..018103c5b 100644
> --- a/drivers/net/ionic/ionic_lif.c
> +++ b/drivers/net/ionic/ionic_lif.c
> @@ -85,7 +85,8 @@ ionic_lif_reset(struct ionic_lif *lif)
>   }
>   
>   static void
> -ionic_lif_get_abs_stats(const struct ionic_lif *lif, struct rte_eth_stats *stats)
> +ionic_lif_get_abs_stats(const struct ionic_lif *lif,
> +		struct rte_eth_stats *stats)
>   {
>   	struct ionic_lif_stats *ls = &lif->info->stats;
>   	uint32_t i;
> @@ -305,10 +306,11 @@ ionic_dev_add_mac(struct rte_eth_dev *eth_dev,
>   }
>   
>   void
> -ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused)
> +ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index)
>   {
>   	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
>   	struct ionic_adapter *adapter = lif->adapter;
> +	struct rte_ether_addr *mac_addr;
>   
>   	IONIC_PRINT_CALL();
>   
> @@ -319,11 +321,12 @@ ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused)
>   		return;
>   	}
>   
> -	if (!rte_is_valid_assigned_ether_addr(&eth_dev->data->mac_addrs[index]))
> +	mac_addr = &eth_dev->data->mac_addrs[index];
> +
> +	if (!rte_is_valid_assigned_ether_addr(mac_addr))
>   		return;
>   
> -	ionic_lif_addr_del(lif, (const uint8_t *)
> -		&eth_dev->data->mac_addrs[index]);
> +	ionic_lif_addr_del(lif, (const uint8_t *)mac_addr);
>   }
>   
>   int
> @@ -658,7 +661,6 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
>   	new->base_z = rte_eth_dma_zone_reserve(lif->eth_dev,
>   		base /* name */, index /* queue_idx */,
>   		total_size, IONIC_ALIGN, socket_id);
> -
>   	if (!new->base_z) {
>   		IONIC_PRINT(ERR, "Cannot reserve queue DMA memory");
>   		err = -ENOMEM;
> @@ -682,8 +684,8 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
>   		ionic_q_sg_map(&new->q, sg_base, sg_base_pa);
>   	}
>   
> -	IONIC_PRINT(DEBUG, "Q-Base-PA = %ju CQ-Base-PA = %ju "
> -		"SG-base-PA = %ju",
> +	IONIC_PRINT(DEBUG, "Q-Base-PA = %#lx CQ-Base-PA = %#lx "
> +		"SG-base-PA = %#lx",
>   		q_base_pa, cq_base_pa, sg_base_pa);

As far as I remember '%j' used intentionally, otherwise this will break the 
32bit build.

>   
>   	ionic_q_map(&new->q, q_base, q_base_pa);
> @@ -839,7 +841,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
>   
>   	lif->txqcqs = rte_zmalloc("ionic", sizeof(*lif->txqcqs) *
>   		adapter->max_ntxqs_per_lif, 0);
> -
>   	if (!lif->txqcqs) {
>   		IONIC_PRINT(ERR, "Cannot allocate tx queues array");
>   		return -ENOMEM;

As far as I can see this patchset has,
1- minor fixes
2- some code refactoring
3- Whitespace updates

Would you mind whitespace changes for now, and separate patch for 1 & 2?

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (7 preceding siblings ...)
  2020-11-02 18:35 ` [dpdk-dev] [PATCH 8/8] ionic: nits - whitespace, logging, helper variables Andrew Boyer
@ 2020-11-03 13:11 ` Ferruh Yigit
  2020-11-03 14:45   ` Andrew Boyer
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
                   ` (9 subsequent siblings)
  18 siblings, 1 reply; 79+ messages in thread
From: Ferruh Yigit @ 2020-11-03 13:11 UTC (permalink / raw)
  To: Andrew Boyer, dev; +Cc: cardigliano

On 11/2/2020 6:35 PM, Andrew Boyer wrote:
> These patches make some minor changes to the ionic PMD. This is my first
> patch submission to DPDK, so please let me know if there is anything amiss.
> 
> Andrew Boyer (8):
>    ionic: update documentation and MAINTAINERS
>    ionic: connect to the meson build system
>    ionic: update ionic_if.h to the latest version
>    ionic: check for devcmd/admincmd completion more frequently
>    ionic: remove some unused fields
>    ionic: convert 'deferred' boolean to a flag bit
>    ionic: warn if RTE tries to enable loopback mode
>    ionic: nits - whitespace, logging, helper variables
> 

Hi Andrew,

Can you please use "net/ionic: " prefix for the patch titles.

Also please fix warnings of the following scripts:
./devtools/checkpatches.sh -n8
./devtools/check-git-log.sh -n8

checkpatch reports following typos, you need codespell to see them, I am pasting 
here for any case:

### ionic: update ionic_if.h to the latest version

WARNING:TYPO_SPELLING: 'Maximim' may be misspelled - perhaps 'Maximum'?
#355: FILE: drivers/net/ionic/ionic_if.h:404: 
 

+ *     @max_frame_size:     Maximim size of frames to be sent

WARNING:TYPO_SPELLING: 'tranceiver' may be misspelled - perhaps 'transceiver'?
#1158: FILE: drivers/net/ionic/ionic_if.h:1236:
+ * @xcvr:               tranceiver status

WARNING:TYPO_SPELLING: 'autonegotation' may be misspelled - perhaps 
'autonegotiation'?
#1219: FILE: drivers/net/ionic/ionic_if.h:1328:
+ * @IONIC_PORT_ATTR_AUTONEG:    Port autonegotation attribute

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH 8/8] ionic: nits - whitespace, logging, helper variables
  2020-11-03 13:06   ` Ferruh Yigit
@ 2020-11-03 14:00     ` Andrew Boyer
  2020-11-03 14:02       ` Ferruh Yigit
  0 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-11-03 14:00 UTC (permalink / raw)
  To: Ferruh Yigit; +Cc: dev, cardigliano



> On Nov 3, 2020, at 8:06 AM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
> 
> On 11/2/2020 6:35 PM, Andrew Boyer wrote:
>> These are minor cleanups which did not deserve their own patches.
>> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
>> ---
>>  drivers/net/ionic/ionic_ethdev.c | 10 ++++------
>>  drivers/net/ionic/ionic_lif.c    | 22 ++++++++++-----------
>>  drivers/net/ionic/ionic_main.c   |  4 +---
>>  drivers/net/ionic/ionic_rxtx.c   | 33 ++++++++++++++------------------
>>  4 files changed, 29 insertions(+), 40 deletions(-)

>> ...
> 
> As far as I can see this patchset has,
> 1- minor fixes
> 2- some code refactoring
> 3- Whitespace updates
> 
> Would you mind whitespace changes for now, and separate patch for 1 & 2?

Please clarify - looks like there’s a word missing?

-Andrew

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH 8/8] ionic: nits - whitespace, logging, helper variables
  2020-11-03 14:00     ` Andrew Boyer
@ 2020-11-03 14:02       ` Ferruh Yigit
  0 siblings, 0 replies; 79+ messages in thread
From: Ferruh Yigit @ 2020-11-03 14:02 UTC (permalink / raw)
  To: Andrew Boyer; +Cc: dev, cardigliano

On 11/3/2020 2:00 PM, Andrew Boyer wrote:
> 
> 
>> On Nov 3, 2020, at 8:06 AM, Ferruh Yigit <ferruh.yigit@intel.com 
>> <mailto:ferruh.yigit@intel.com>> wrote:
>>
>> On 11/2/2020 6:35 PM, Andrew Boyer wrote:
>>> These are minor cleanups which did not deserve their own patches.
>>> Signed-off-by: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io>>
>>> ---
>>>  drivers/net/ionic/ionic_ethdev.c | 10 ++++------
>>>  drivers/net/ionic/ionic_lif.c    | 22 ++++++++++-----------
>>>  drivers/net/ionic/ionic_main.c   |  4 +---
>>>  drivers/net/ionic/ionic_rxtx.c   | 33 ++++++++++++++------------------
>>>  4 files changed, 29 insertions(+), 40 deletions(-)
> 
>>> ...
>>
>> As far as I can see this patchset has,
>> 1- minor fixes
>> 2- some code refactoring
>> 3- Whitespace updates
>>
>> Would you mind whitespace changes for now, and separate patch for 1 & 2?
> 
> Please clarify - looks like there’s a word missing?
> 

it is :)

Would you mind leaving/dropping the whitespace changes for now, and have two 
separate patches for 1 & 2?

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH 3/8] ionic: update ionic_if.h to the latest version
  2020-11-03 12:44   ` Ferruh Yigit
@ 2020-11-03 14:36     ` Andrew Boyer
  2020-11-03 15:55       ` Ferruh Yigit
  0 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-11-03 14:36 UTC (permalink / raw)
  To: Ferruh Yigit; +Cc: dev, cardigliano



> On Nov 3, 2020, at 7:44 AM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
> 
> On 11/2/2020 6:35 PM, Andrew Boyer wrote:
>> This file contains the firmware interface definitions.
> 
> Is the version number stored somewhere for documentation?
> 

No, it is controlled by our internal repository.

>> Signed-off-by: Andrew Boyer<aboyer@pensando.io>
>> ---
>>  drivers/net/ionic/ionic_if.h   | 1349 ++++++++++++++++++++++----------
>>  drivers/net/ionic/ionic_regs.h |    3 -
>>  2 files changed, 933 insertions(+), 419 deletions(-)
>> diff --git a/drivers/net/ionic/ionic_if.h b/drivers/net/ionic/ionic_if.h
>> index f83c8711b..fe6b52b17 100644
>> --- a/drivers/net/ionic/ionic_if.h
>> +++ b/drivers/net/ionic/ionic_if.h
>> @@ -1,17 +1,15 @@
>> -/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB OR BSD-3-Clause */
>> -/* Copyright (c) 2017-2019 Pensando Systems, Inc.  All rights reserved. */
>> +/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB OR BSD-2-Clause */
>> +/* Copyright (c) 2017-2020 Pensando Systems, Inc.  All rights reserved. */
> 
> This is changing the license, for any specific reason?

Good catch... I am surprised to see the internal and external version of this file have different licenses. (Well, technically different.) I’ll revert that part.

-Andrew


^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH 1/8] ionic: update documentation and MAINTAINERS
  2020-11-03 12:35   ` Ferruh Yigit
@ 2020-11-03 14:43     ` Andrew Boyer
  0 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-11-03 14:43 UTC (permalink / raw)
  To: Ferruh Yigit; +Cc: dev, cardigliano

> On Nov 3, 2020, at 7:35 AM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
> 
> On 11/2/2020 6:35 PM, Andrew Boyer wrote:
>> The ionic PMD is being actively maintained.
>> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
>> ---
>>  MAINTAINERS               |  5 +++--
>>  doc/guides/nics/ionic.rst | 13 +++++++------
>>  2 files changed, 10 insertions(+), 8 deletions(-)
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 5b390d1d8..7afed5f0a 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -842,8 +842,9 @@ F: doc/guides/nics/pfe.rst
>>  F: drivers/net/pfe/
>>  F: doc/guides/nics/features/pfe.ini
>>  -Pensando ionic - UNMAINTAINED
> 
> The trigger to mark PMD unmaintained was it didn't comply with new close dev_ops behavior [1], can you please make that patch before updating the status?

I have the change for this, but we’re not ready to submit yet. This was just the initial batch of harmless stuff. I’ll hold off on removing the status.

> [1]
> https://patches.dpdk.org/project/dpdk/list/?series=12565&state=* <https://patches.dpdk.org/project/dpdk/list/?series=12565&state=*>
> 
>> -M: Alfredo Cardigliano <cardigliano@ntop.org <mailto:cardigliano@ntop.org>>
>> +Pensando ionic
>> +M: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io>>
>> +M: Pensando Drivers <drivers@pensando.io <mailto:drivers@pensando.io>>
> 
> Hi Andrew, Welcome.
> 
> I think better to not include the group as maintainer, it is very hard to follow who is behind it and who it actually responsible when a group is added.
> Can we just use actual people for the maintainer?

Does it hurt to have the list there? We can pledge to always have at least one real person. The ‘UNMAINTAINED’ thing above arose because the listed maintainer wasn’t actually a maintainer any more and no one else at the company was able to respond in time. Especially at a startup, it would be nice to have the list as a backup. That’s what we do for the Linux kernel, too.

>>  F: drivers/net/ionic/
>>  F: doc/guides/nics/ionic.rst
>>  F: doc/guides/nics/features/ionic.ini
>> diff --git a/doc/guides/nics/ionic.rst b/doc/guides/nics/ionic.rst
>> index fd32926bf..2a394d15d 100644
>> --- a/doc/guides/nics/ionic.rst
>> +++ b/doc/guides/nics/ionic.rst
>> @@ -1,5 +1,5 @@
>>  ..  SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
>> -    Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
>> +    Copyright(c) 2018-2020 Pensando Systems, Inc. All rights reserved.
>>    IONIC Driver
>>  ============
>> @@ -7,15 +7,16 @@ IONIC Driver
>>  The ionic driver provides support for Pensando server adapters.
>>  It currently supports the below models:
>>  -- `Naples DSC-25 <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>`_
>> -- `Naples DSC-100 <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>`_
>> +- DSC-25 dual-port 25G Distributed Services Card
>> +- DSC-100 dual-port 100G Distributed Services Card
> 
> It was good to have product documentation, I see the old ones are not available now but can it be possible to replace with valid ones instead of removing?

The updated documents are available at the link listed right below (Documents page). I don’t control the URLs on the public-facing web site so it would be better going forward to not list the individual PDFs, IMO.

>>  -Please visit https://pensando.io for more information.
>> +Please visit the Pensando web site at https://pensando.io for more information.
>> +The `Documents <https://pensando.io/documents/>`_ page contains Product Briefs and other product information.
>>    Identifying the Adapter
>>  -----------------------
>>  -To find if one or more Pensando PCI Ethernet devices are installed
>> +To determine if one or more Pensando DSC Ethernet devices are installed
>>  on the host, check for the PCI devices:
>>       .. code-block:: console
>> @@ -28,6 +29,6 @@ on the host, check for the PCI devices:
>>  Building DPDK
>>  -------------
>>  -The ionic PMD driver supports UIO and VFIO, please refer to the
>> +The ionic PMD driver supports UIO and VFIO. Please refer to the
> 
> I think "PMD driver" is wrong since 'PMD' is "poll mode driver"

Send me your SSN number and your code for the ATM machine, and then we’ll talk... <kidding> Will fix

-Andrew

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation
  2020-11-03 13:11 ` [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Ferruh Yigit
@ 2020-11-03 14:45   ` Andrew Boyer
  0 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-11-03 14:45 UTC (permalink / raw)
  To: Ferruh Yigit; +Cc: dev, cardigliano



> On Nov 3, 2020, at 8:11 AM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
> 
> On 11/2/2020 6:35 PM, Andrew Boyer wrote:
>> These patches make some minor changes to the ionic PMD. This is my first
>> patch submission to DPDK, so please let me know if there is anything amiss.
>> Andrew Boyer (8):
>>   ionic: update documentation and MAINTAINERS
>>   ionic: connect to the meson build system
>>   ionic: update ionic_if.h to the latest version
>>   ionic: check for devcmd/admincmd completion more frequently
>>   ionic: remove some unused fields
>>   ionic: convert 'deferred' boolean to a flag bit
>>   ionic: warn if RTE tries to enable loopback mode
>>   ionic: nits - whitespace, logging, helper variables
> 
> Hi Andrew,
> 
> Can you please use "net/ionic: " prefix for the patch titles.
> 
> Also please fix warnings of the following scripts:
> ./devtools/checkpatches.sh -n8
> ./devtools/check-git-log.sh -n8
> 
> checkpatch reports following typos, you need codespell to see them, I am pasting here for any case:
> 
> ### ionic: update ionic_if.h to the latest version
> 
> WARNING:TYPO_SPELLING: 'Maximim' may be misspelled - perhaps 'Maximum'?
> #355: FILE: drivers/net/ionic/ionic_if.h:404: 
> + *     @max_frame_size:     Maximim size of frames to be sent
> 
> WARNING:TYPO_SPELLING: 'tranceiver' may be misspelled - perhaps 'transceiver'?
> #1158: FILE: drivers/net/ionic/ionic_if.h:1236:
> + * @xcvr:               tranceiver status
> 
> WARNING:TYPO_SPELLING: 'autonegotation' may be misspelled - perhaps 'autonegotiation'?
> #1219: FILE: drivers/net/ionic/ionic_if.h:1328:
> + * @IONIC_PORT_ATTR_AUTONEG:    Port autonegotation attribute

Thank you. Your bot responded immediately with the same spelling issues and Travis caught the 32-bit build issue (%#lx).

-Andrew

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH 3/8] ionic: update ionic_if.h to the latest version
  2020-11-03 14:36     ` Andrew Boyer
@ 2020-11-03 15:55       ` Ferruh Yigit
  0 siblings, 0 replies; 79+ messages in thread
From: Ferruh Yigit @ 2020-11-03 15:55 UTC (permalink / raw)
  To: Andrew Boyer; +Cc: dev, cardigliano

On 11/3/2020 2:36 PM, Andrew Boyer wrote:
> 
> 
>> On Nov 3, 2020, at 7:44 AM, Ferruh Yigit <ferruh.yigit@intel.com 
>> <mailto:ferruh.yigit@intel.com>> wrote:
>>
>> On 11/2/2020 6:35 PM, Andrew Boyer wrote:
>>> This file contains the firmware interface definitions.
>>
>> Is the version number stored somewhere for documentation?
>>
> 
> No, it is controlled by our internal repository.
> 

It can help you to have one somewhere in the repo (.h, text file, at worst in 
commit log).

>>> Signed-off-by: Andrew Boyer<aboyer@pensando.io <mailto:aboyer@pensando.io>>
>>> ---
>>>  drivers/net/ionic/ionic_if.h   | 1349 ++++++++++++++++++++++----------
>>>  drivers/net/ionic/ionic_regs.h |    3 -
>>>  2 files changed, 933 insertions(+), 419 deletions(-)
>>> diff --git a/drivers/net/ionic/ionic_if.h b/drivers/net/ionic/ionic_if.h
>>> index f83c8711b..fe6b52b17 100644
>>> --- a/drivers/net/ionic/ionic_if.h
>>> +++ b/drivers/net/ionic/ionic_if.h
>>> @@ -1,17 +1,15 @@
>>> -/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB OR BSD-3-Clause */
>>> -/* Copyright (c) 2017-2019 Pensando Systems, Inc.  All rights reserved. */
>>> +/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB OR BSD-2-Clause */
>>> +/* Copyright (c) 2017-2020 Pensando Systems, Inc.  All rights reserved. */
>>
>> This is changing the license, for any specific reason?
> 
> Good catch... I am surprised to see the internal and external version of this 
> file have different licenses. (Well, technically different.) I’ll revert that part.
> 
> -Andrew
> 


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v2 0/9] net/ionic: minor updates and documentation
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (8 preceding siblings ...)
  2020-11-03 13:11 ` [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Ferruh Yigit
@ 2020-12-03 20:34 ` Andrew Boyer
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
                     ` (9 more replies)
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 1/9] net/ionic: connect ionic to the build system Andrew Boyer
                   ` (8 subsequent siblings)
  18 siblings, 10 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-03 20:34 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

These patches make some minor changes to the ionic PMD.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>

---
v2:
* Address Ferruh's comments (thank you!)
* Switch to net/ionic: prefix
* Leave UNMAINTAINED flag for now
* Split patch 8 into patch 8 & 9; drop whitespace changes

Andrew Boyer (9):
  net/ionic: connect ionic to the build system
  net/ionic: update interface file to the latest version
  net/ionic: update documentation and MAINTAINERS
  net/ionic: check for cmd completion more frequently
  net/ionic: remove some unused fields
  net/ionic: convert 'deferred' boolean to a flag bit
  net/ionic: warn if loopback mode is requested
  net/ionic: minor refactorings and helper variables
  net/ionic: minor logging fixups

 MAINTAINERS                        |    3 +-
 doc/guides/nics/features/ionic.ini |    2 +
 doc/guides/nics/ionic.rst          |   13 +-
 drivers/net/ionic/ionic.h          |    2 +-
 drivers/net/ionic/ionic_dev.c      |   10 +-
 drivers/net/ionic/ionic_dev.h      |   13 +-
 drivers/net/ionic/ionic_ethdev.c   |   14 +-
 drivers/net/ionic/ionic_if.h       | 1343 +++++++++++++++++++---------
 drivers/net/ionic/ionic_lif.c      |  100 +--
 drivers/net/ionic/ionic_lif.h      |    4 +-
 drivers/net/ionic/ionic_mac_api.c  |    4 +-
 drivers/net/ionic/ionic_main.c     |   86 +-
 drivers/net/ionic/ionic_osdep.h    |   10 -
 drivers/net/ionic/ionic_regs.h     |    9 -
 drivers/net/ionic/ionic_rxtx.c     |   51 +-
 drivers/net/meson.build            |    1 +
 16 files changed, 1079 insertions(+), 586 deletions(-)

-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v2 1/9] net/ionic: connect ionic to the build system
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (9 preceding siblings ...)
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
@ 2020-12-03 20:34 ` Andrew Boyer
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 2/9] net/ionic: update interface file to the latest version Andrew Boyer
                   ` (7 subsequent siblings)
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-03 20:34 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

Otherwise the ionic PMD is never built.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/meson.build | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index 29f477750..6e4aa6bf3 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -26,6 +26,7 @@ drivers = ['af_packet',
 	'iavf',
 	'ice',
 	'igc',
+	'ionic',
 	'ipn3ke',
 	'ixgbe',
 	'kni',
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v2 2/9] net/ionic: update interface file to the latest version
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (10 preceding siblings ...)
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 1/9] net/ionic: connect ionic to the build system Andrew Boyer
@ 2020-12-03 20:34 ` Andrew Boyer
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
                   ` (6 subsequent siblings)
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-03 20:34 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

The ionic_if.h file contains the firmware interface definitions.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_if.h   | 1343 ++++++++++++++++++++++----------
 drivers/net/ionic/ionic_regs.h |    3 -
 2 files changed, 930 insertions(+), 416 deletions(-)

diff --git a/drivers/net/ionic/ionic_if.h b/drivers/net/ionic/ionic_if.h
index f83c8711b..ba4cc4b72 100644
--- a/drivers/net/ionic/ionic_if.h
+++ b/drivers/net/ionic/ionic_if.h
@@ -1,17 +1,15 @@
 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB OR BSD-3-Clause */
-/* Copyright (c) 2017-2019 Pensando Systems, Inc.  All rights reserved. */
+/* Copyright (c) 2017-2020 Pensando Systems, Inc.  All rights reserved. */
 
 #ifndef _IONIC_IF_H_
 #define _IONIC_IF_H_
 
-#pragma pack(push, 1)
-
 #define IONIC_DEV_INFO_SIGNATURE		0x44455649      /* 'DEVI' */
 #define IONIC_DEV_INFO_VERSION			1
 #define IONIC_IFNAMSIZ				16
 
 /**
- * Commands
+ * enum ionic_cmd_opcode - Device commands
  */
 enum ionic_cmd_opcode {
 	IONIC_CMD_NOP				= 0,
@@ -42,6 +40,7 @@ enum ionic_cmd_opcode {
 	IONIC_CMD_RX_FILTER_DEL			= 32,
 
 	/* Queue commands */
+	IONIC_CMD_Q_IDENTIFY			= 39,
 	IONIC_CMD_Q_INIT			= 40,
 	IONIC_CMD_Q_CONTROL			= 41,
 
@@ -51,10 +50,17 @@ enum ionic_cmd_opcode {
 	IONIC_CMD_RDMA_CREATE_CQ		= 52,
 	IONIC_CMD_RDMA_CREATE_ADMINQ		= 53,
 
+	/* SR/IOV commands */
+	IONIC_CMD_VF_GETATTR			= 60,
+	IONIC_CMD_VF_SETATTR			= 61,
+
 	/* QoS commands */
 	IONIC_CMD_QOS_CLASS_IDENTIFY		= 240,
 	IONIC_CMD_QOS_CLASS_INIT		= 241,
 	IONIC_CMD_QOS_CLASS_RESET		= 242,
+	IONIC_CMD_QOS_CLASS_UPDATE		= 243,
+	IONIC_CMD_QOS_CLEAR_STATS		= 244,
+	IONIC_CMD_QOS_RESET			= 245,
 
 	/* Firmware commands */
 	IONIC_CMD_FW_DOWNLOAD			= 254,
@@ -62,7 +68,7 @@ enum ionic_cmd_opcode {
 };
 
 /**
- * Command Return codes
+ * enum ionic_status_code - Device command return codes
  */
 enum ionic_status_code {
 	IONIC_RC_SUCCESS	= 0,	/* Success */
@@ -86,8 +92,8 @@ enum ionic_status_code {
 	IONIC_RC_DEV_CMD	= 18,	/* Device cmd attempted on AdminQ */
 	IONIC_RC_ENOSUPP	= 19,	/* Operation not supported */
 	IONIC_RC_ERROR		= 29,	/* Generic error */
-
 	IONIC_RC_ERDMA		= 30,	/* Generic RDMA error */
+	IONIC_RC_EVFID		= 31,	/* VF ID does not exist */
 };
 
 enum ionic_notifyq_opcode {
@@ -95,10 +101,11 @@ enum ionic_notifyq_opcode {
 	IONIC_EVENT_RESET		= 2,
 	IONIC_EVENT_HEARTBEAT		= 3,
 	IONIC_EVENT_LOG			= 4,
+	IONIC_EVENT_XCVR		= 5,
 };
 
 /**
- * struct cmd - General admin command format
+ * struct ionic_admin_cmd - General admin command format
  * @opcode:     Opcode for the command
  * @lif_index:  LIF index
  * @cmd_data:   Opcode-specific command bytes
@@ -112,12 +119,11 @@ struct ionic_admin_cmd {
 
 /**
  * struct ionic_admin_comp - General admin command completion format
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
- * @cmd_data:   Command-specific bytes.
- * @color:      Color bit.  (Always 0 for commands issued to the
- *              Device Cmd Registers.)
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @cmd_data:   Command-specific bytes
+ * @color:      Color bit (Always 0 for commands issued to the
+ *              Device Cmd Registers)
  */
 struct ionic_admin_comp {
 	u8     status;
@@ -144,7 +150,7 @@ struct ionic_nop_cmd {
 
 /**
  * struct ionic_nop_comp - NOP command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_nop_comp {
 	u8 status;
@@ -154,7 +160,7 @@ struct ionic_nop_comp {
 /**
  * struct ionic_dev_init_cmd - Device init command
  * @opcode:    opcode
- * @type:      device type
+ * @type:      Device type
  */
 struct ionic_dev_init_cmd {
 	u8     opcode;
@@ -163,8 +169,8 @@ struct ionic_dev_init_cmd {
 };
 
 /**
- * struct init_comp - Device init command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_init_comp - Device init command completion
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_dev_init_comp {
 	u8 status;
@@ -181,8 +187,8 @@ struct ionic_dev_reset_cmd {
 };
 
 /**
- * struct reset_comp - Reset command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_reset_comp - Reset command completion
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_dev_reset_comp {
 	u8 status;
@@ -203,8 +209,8 @@ struct ionic_dev_identify_cmd {
 };
 
 /**
- * struct dev_identify_comp - Driver/device identify command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_identify_comp - Driver/device identify command completion
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_dev_identify_comp {
@@ -223,8 +229,8 @@ enum ionic_os_type {
 };
 
 /**
- * union drv_identity - driver identity information
- * @os_type:          OS type (see enum os_type)
+ * union ionic_drv_identity - driver identity information
+ * @os_type:          OS type (see enum ionic_os_type)
  * @os_dist:          OS distribution, numeric format
  * @os_dist_str:      OS distribution, string format
  * @kernel_ver:       Kernel version, numeric format
@@ -240,26 +246,26 @@ union ionic_drv_identity {
 		char   kernel_ver_str[32];
 		char   driver_ver_str[32];
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
- * union dev_identity - device identity information
+ * union ionic_dev_identity - device identity information
  * @version:          Version of device identify
  * @type:             Identify type (0 for now)
  * @nports:           Number of ports provisioned
  * @nlifs:            Number of LIFs provisioned
  * @nintrs:           Number of interrupts provisioned
  * @ndbpgs_per_lif:   Number of doorbell pages per LIF
- * @intr_coal_mult:   Interrupt coalescing multiplication factor.
+ * @intr_coal_mult:   Interrupt coalescing multiplication factor
  *                    Scale user-supplied interrupt coalescing
  *                    value in usecs to device units using:
  *                    device units = usecs * mult / div
- * @intr_coal_div:    Interrupt coalescing division factor.
+ * @intr_coal_div:    Interrupt coalescing division factor
  *                    Scale user-supplied interrupt coalescing
  *                    value in usecs to device units using:
  *                    device units = usecs * mult / div
- *
+ * @eq_count:         Number of shared event queues
  */
 union ionic_dev_identity {
 	struct {
@@ -273,8 +279,9 @@ union ionic_dev_identity {
 		__le32 ndbpgs_per_lif;
 		__le32 intr_coal_mult;
 		__le32 intr_coal_div;
+		__le32 eq_count;
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 enum ionic_lif_type {
@@ -284,10 +291,10 @@ enum ionic_lif_type {
 };
 
 /**
- * struct ionic_lif_identify_cmd - lif identify command
+ * struct ionic_lif_identify_cmd - LIF identify command
  * @opcode:  opcode
- * @type:    lif type (enum lif_type)
- * @ver:     version of identify returned by device
+ * @type:    LIF type (enum ionic_lif_type)
+ * @ver:     Version of identify returned by device
  */
 struct ionic_lif_identify_cmd {
 	u8 opcode;
@@ -297,9 +304,9 @@ struct ionic_lif_identify_cmd {
 };
 
 /**
- * struct ionic_lif_identify_comp - lif identify command completion
- * @status:  status of the command (enum status_code)
- * @ver:     version of identify returned by device
+ * struct ionic_lif_identify_comp - LIF identify command completion
+ * @status:  Status of the command (enum ionic_status_code)
+ * @ver:     Version of identify returned by device
  */
 struct ionic_lif_identify_comp {
 	u8 status;
@@ -307,13 +314,24 @@ struct ionic_lif_identify_comp {
 	u8 rsvd2[14];
 };
 
+/**
+ * enum ionic_lif_capability - LIF capabilities
+ * @IONIC_LIF_CAP_ETH:     LIF supports Ethernet
+ * @IONIC_LIF_CAP_RDMA:    LIF support RDMA
+ */
 enum ionic_lif_capability {
 	IONIC_LIF_CAP_ETH        = BIT(0),
 	IONIC_LIF_CAP_RDMA       = BIT(1),
 };
 
 /**
- * Logical Queue Types
+ * enum ionic_logical_qtype - Logical Queue Types
+ * @IONIC_QTYPE_ADMINQ:    Administrative Queue
+ * @IONIC_QTYPE_NOTIFYQ:   Notify Queue
+ * @IONIC_QTYPE_RXQ:       Receive Queue
+ * @IONIC_QTYPE_TXQ:       Transmit Queue
+ * @IONIC_QTYPE_EQ:        Event Queue
+ * @IONIC_QTYPE_MAX:       Max queue type supported
  */
 enum ionic_logical_qtype {
 	IONIC_QTYPE_ADMINQ  = 0,
@@ -325,11 +343,10 @@ enum ionic_logical_qtype {
 };
 
 /**
- * struct ionic_lif_logical_qtype - Descriptor of logical to hardware queue
- * type.
- * @qtype:          Hardware Queue Type.
- * @qid_count:      Number of Queue IDs of the logical type.
- * @qid_base:       Minimum Queue ID of the logical type.
+ * struct ionic_lif_logical_qtype - Descriptor of logical to HW queue type
+ * @qtype:          Hardware Queue Type
+ * @qid_count:      Number of Queue IDs of the logical type
+ * @qid_base:       Minimum Queue ID of the logical type
  */
 struct ionic_lif_logical_qtype {
 	u8     qtype;
@@ -338,20 +355,27 @@ struct ionic_lif_logical_qtype {
 	__le32 qid_base;
 };
 
+/**
+ * enum ionic_lif_state - LIF state
+ * @IONIC_LIF_DISABLE:     LIF disabled
+ * @IONIC_LIF_ENABLE:      LIF enabled
+ * @IONIC_LIF_QUIESCE:     LIF Quiesced
+ */
 enum ionic_lif_state {
-	IONIC_LIF_DISABLE	= 0,
+	IONIC_LIF_QUIESCE	= 0,
 	IONIC_LIF_ENABLE	= 1,
-	IONIC_LIF_HANG_RESET	= 2,
+	IONIC_LIF_DISABLE	= 2,
 };
 
 /**
- * LIF configuration
- * @state:          lif state (enum lif_state)
- * @name:           lif name
- * @mtu:            mtu
- * @mac:            station mac address
- * @features:       features (enum ionic_eth_hw_features)
- * @queue_count:    queue counts per queue-type
+ * union ionic_lif_config - LIF configuration
+ * @state:          LIF state (enum ionic_lif_state)
+ * @name:           LIF name
+ * @mtu:            MTU
+ * @mac:            Station MAC address
+ * @vlan:           Default Vlan ID
+ * @features:       Features (enum ionic_eth_hw_features)
+ * @queue_count:    Queue counts per queue-type
  */
 union ionic_lif_config {
 	struct {
@@ -360,45 +384,44 @@ union ionic_lif_config {
 		char   name[IONIC_IFNAMSIZ];
 		__le32 mtu;
 		u8     mac[6];
-		u8     rsvd2[2];
+		__le16 vlan;
 		__le64 features;
 		__le32 queue_count[IONIC_QTYPE_MAX];
-	};
+	} __rte_packed;
 	__le32 words[64];
 };
 
 /**
- * struct ionic_lif_identity - lif identity information (type-specific)
+ * struct ionic_lif_identity - LIF identity information (type-specific)
  *
- * @capabilities    LIF capabilities
+ * @capabilities:        LIF capabilities
  *
- * Ethernet:
- *     @version:          Ethernet identify structure version.
- *     @features:         Ethernet features supported on this lif type.
- *     @max_ucast_filters:  Number of perfect unicast addresses supported.
- *     @max_mcast_filters:  Number of perfect multicast addresses supported.
- *     @min_frame_size:   Minimum size of frames to be sent
- *     @max_frame_size:   Maximum size of frames to be sent
- *     @config:           LIF config struct with features, mtu, mac, q counts
+ * @eth:                    Ethernet identify structure
+ *     @version:            Ethernet identify structure version
+ *     @max_ucast_filters:  Number of perfect unicast addresses supported
+ *     @max_mcast_filters:  Number of perfect multicast addresses supported
+ *     @min_frame_size:     Minimum size of frames to be sent
+ *     @max_frame_size:     Maximum size of frames to be sent
+ *     @config:             LIF config struct with features, mtu, mac, q counts
  *
- * RDMA:
- *     @version:         RDMA version of opcodes and queue descriptors.
- *     @qp_opcodes:      Number of rdma queue pair opcodes supported.
- *     @admin_opcodes:   Number of rdma admin opcodes supported.
- *     @npts_per_lif:    Page table size per lif
- *     @nmrs_per_lif:    Number of memory regions per lif
- *     @nahs_per_lif:    Number of address handles per lif
- *     @max_stride:      Max work request stride.
- *     @cl_stride:       Cache line stride.
- *     @pte_stride:      Page table entry stride.
- *     @rrq_stride:      Remote RQ work request stride.
- *     @rsq_stride:      Remote SQ work request stride.
+ * @rdma:                RDMA identify structure
+ *     @version:         RDMA version of opcodes and queue descriptors
+ *     @qp_opcodes:      Number of RDMA queue pair opcodes supported
+ *     @admin_opcodes:   Number of RDMA admin opcodes supported
+ *     @npts_per_lif:    Page table size per LIF
+ *     @nmrs_per_lif:    Number of memory regions per LIF
+ *     @nahs_per_lif:    Number of address handles per LIF
+ *     @max_stride:      Max work request stride
+ *     @cl_stride:       Cache line stride
+ *     @pte_stride:      Page table entry stride
+ *     @rrq_stride:      Remote RQ work request stride
+ *     @rsq_stride:      Remote SQ work request stride
  *     @dcqcn_profiles:  Number of DCQCN profiles
- *     @aq_qtype:        RDMA Admin Qtype.
- *     @sq_qtype:        RDMA Send Qtype.
- *     @rq_qtype:        RDMA Receive Qtype.
- *     @cq_qtype:        RDMA Completion Qtype.
- *     @eq_qtype:        RDMA Event Qtype.
+ *     @aq_qtype:        RDMA Admin Qtype
+ *     @sq_qtype:        RDMA Send Qtype
+ *     @rq_qtype:        RDMA Receive Qtype
+ *     @cq_qtype:        RDMA Completion Qtype
+ *     @eq_qtype:        RDMA Event Qtype
  */
 union ionic_lif_identity {
 	struct {
@@ -414,7 +437,7 @@ union ionic_lif_identity {
 			__le32 max_frame_size;
 			u8 rsvd2[106];
 			union ionic_lif_config config;
-		} eth;
+		} __rte_packed eth;
 
 		struct {
 			u8 version;
@@ -436,17 +459,17 @@ union ionic_lif_identity {
 			struct ionic_lif_logical_qtype rq_qtype;
 			struct ionic_lif_logical_qtype cq_qtype;
 			struct ionic_lif_logical_qtype eq_qtype;
-		} rdma;
-	};
-	__le32 words[512];
+		} __rte_packed rdma;
+	} __rte_packed;
+	__le32 words[478];
 };
 
 /**
  * struct ionic_lif_init_cmd - LIF init command
- * @opcode:       opcode
- * @type:         LIF type (enum lif_type)
+ * @opcode:       Opcode
+ * @type:         LIF type (enum ionic_lif_type)
  * @index:        LIF index
- * @info_pa:      destination address for lif info (struct ionic_lif_info)
+ * @info_pa:      Destination address for LIF info (struct ionic_lif_info)
  */
 struct ionic_lif_init_cmd {
 	u8     opcode;
@@ -459,7 +482,8 @@ struct ionic_lif_init_cmd {
 
 /**
  * struct ionic_lif_init_comp - LIF init command completion
- * @status: The status of the command (enum status_code)
+ * @status:	Status of the command (enum ionic_status_code)
+ * @hw_index:	Hardware index of the initialized LIF
  */
 struct ionic_lif_init_comp {
 	u8 status;
@@ -468,14 +492,74 @@ struct ionic_lif_init_comp {
 	u8 rsvd2[12];
 };
 
+/**
+ * struct ionic_q_identify_cmd - queue identify command
+ * @opcode:     opcode
+ * @lif_type:   LIF type (enum ionic_lif_type)
+ * @type:       Logical queue type (enum ionic_logical_qtype)
+ * @ver:        Highest queue type version that the driver supports
+ */
+struct ionic_q_identify_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 lif_type;
+	u8     type;
+	u8     ver;
+	u8     rsvd2[58];
+};
+
+/**
+ * struct ionic_q_identify_comp - queue identify command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @ver:        Queue type version that can be used with FW
+ */
+struct ionic_q_identify_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	u8     ver;
+	u8     rsvd2[11];
+};
+
+/**
+ * union ionic_q_identity - queue identity information
+ *     @version:        Queue type version that can be used with FW
+ *     @supported:      Bitfield of queue versions, first bit = ver 0
+ *     @features:       Queue features
+ *     @desc_sz:        Descriptor size
+ *     @comp_sz:        Completion descriptor size
+ *     @sg_desc_sz:     Scatter/Gather descriptor size
+ *     @max_sg_elems:   Maximum number of Scatter/Gather elements
+ *     @sg_desc_stride: Number of Scatter/Gather elements per descriptor
+ */
+union ionic_q_identity {
+	struct {
+		u8      version;
+		u8      supported;
+		u8      rsvd[6];
+#define IONIC_QIDENT_F_CQ	0x01	/* queue has completion ring */
+#define IONIC_QIDENT_F_SG	0x02	/* queue has scatter/gather ring */
+#define IONIC_QIDENT_F_EQ	0x04	/* queue can use event queue */
+#define IONIC_QIDENT_F_CMB	0x08	/* queue is in cmb bar */
+		__le64  features;
+		__le16  desc_sz;
+		__le16  comp_sz;
+		__le16  sg_desc_sz;
+		__le16  max_sg_elems;
+		__le16  sg_desc_stride;
+	};
+	__le32 words[478];
+};
+
 /**
  * struct ionic_q_init_cmd - Queue init command
  * @opcode:       opcode
  * @type:         Logical queue type
- * @ver:          Queue version (defines opcode/descriptor scope)
+ * @ver:          Queue type version
  * @lif_index:    LIF index
- * @index:        (lif, qtype) relative admin queue index
- * @intr_index:   Interrupt control register index
+ * @index:        (LIF, qtype) relative admin queue index
+ * @intr_index:   Interrupt control register index, or Event queue index
  * @pid:          Process ID
  * @flags:
  *    IRQ:        Interrupt requested on completion
@@ -493,12 +577,11 @@ struct ionic_lif_init_comp {
  *                descriptors.  Values of ring_size <2 and >16 are
  *                reserved.
  *    EQ:         Enable the Event Queue
- * @cos:          Class of service for this queue.
+ * @cos:          Class of service for this queue
  * @ring_size:    Queue ring size, encoded as a log2(size)
  * @ring_base:    Queue ring base address
  * @cq_ring_base: Completion queue ring base address
  * @sg_ring_base: Scatter/Gather ring base address
- * @eq_index:	  Event queue index
  */
 struct ionic_q_init_cmd {
 	u8     opcode;
@@ -515,29 +598,27 @@ struct ionic_q_init_cmd {
 #define IONIC_QINIT_F_ENA	0x02	/* Enable the queue */
 #define IONIC_QINIT_F_SG	0x04	/* Enable scatter/gather on the queue */
 #define IONIC_QINIT_F_EQ	0x08	/* Enable event queue */
-#define IONIC_QINIT_F_DEBUG 0x80	/* Enable queue debugging */
+#define IONIC_QINIT_F_CMB	0x10	/* Enable cmb-based queue */
+#define IONIC_QINIT_F_DEBUG	0x80	/* Enable queue debugging */
 	u8     cos;
 	u8     ring_size;
 	__le64 ring_base;
 	__le64 cq_ring_base;
 	__le64 sg_ring_base;
-	__le32 eq_index;
-	u8     rsvd2[16];
-};
+	u8     rsvd2[20];
+} __rte_packed;
 
 /**
  * struct ionic_q_init_comp - Queue init command completion
- * @status:     The status of the command (enum status_code)
- * @ver:        Queue version (defines opcode/descriptor scope)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @hw_index:   Hardware Queue ID
  * @hw_type:    Hardware Queue type
  * @color:      Color
  */
 struct ionic_q_init_comp {
 	u8     status;
-	u8     ver;
+	u8     rsvd;
 	__le16 comp_index;
 	__le32 hw_index;
 	u8     hw_type;
@@ -558,10 +639,9 @@ enum ionic_txq_desc_opcode {
 
 /**
  * struct ionic_txq_desc - Ethernet Tx queue descriptor format
- * @opcode:       Tx operation, see TXQ_DESC_OPCODE_*:
+ * @cmd:          Tx operation, see IONIC_TXQ_DESC_OPCODE_*:
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_NONE:
- *
  *                      Non-offload send.  No segmentation,
  *                      fragmentation or checksum calc/insertion is
  *                      performed by device; packet is prepared
@@ -569,7 +649,6 @@ enum ionic_txq_desc_opcode {
  *                      no further manipulation from device.
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_PARTIAL:
- *
  *                      Offload 16-bit L4 checksum
  *                      calculation/insertion.  The device will
  *                      calculate the L4 checksum value and
@@ -578,14 +657,16 @@ enum ionic_txq_desc_opcode {
  *                      is calculated starting at @csum_start bytes
  *                      into the packet to the end of the packet.
  *                      The checksum insertion position is given
- *                      in @csum_offset.  This feature is only
- *                      applicable to protocols such as TCP, UDP
- *                      and ICMP where a standard (i.e. the
- *                      'IP-style' checksum) one's complement
- *                      16-bit checksum is used, using an IP
- *                      pseudo-header to seed the calculation.
- *                      Software will preload the L4 checksum
- *                      field with the IP pseudo-header checksum.
+ *                      in @csum_offset, which is the offset from
+ *                      @csum_start to the checksum field in the L4
+ *                      header.  This feature is only applicable to
+ *                      protocols such as TCP, UDP and ICMP where a
+ *                      standard (i.e. the 'IP-style' checksum)
+ *                      one's complement 16-bit checksum is used,
+ *                      using an IP pseudo-header to seed the
+ *                      calculation.  Software will preload the L4
+ *                      checksum field with the IP pseudo-header
+ *                      checksum.
  *
  *                      For tunnel encapsulation, @csum_start and
  *                      @csum_offset refer to the inner L4
@@ -597,11 +678,10 @@ enum ionic_txq_desc_opcode {
  *                      the @encap is set, the device will
  *                      offload the outer header checksums using
  *                      LCO (local checksum offload) (see
- *                      Documentation/networking/checksum-
- *                      offloads.txt for more info).
+ *                      Documentation/networking/checksum-offloads.rst
+ *                      for more info).
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_HW:
- *
  *                      Offload 16-bit checksum computation to hardware.
  *                      If @csum_l3 is set then the packet's L3 checksum is
  *                      updated. Similarly, if @csum_l4 is set the the L4
@@ -609,7 +689,6 @@ enum ionic_txq_desc_opcode {
  *                      checksums are also updated.
  *
  *                   IONIC_TXQ_DESC_OPCODE_TSO:
- *
  *                      Device performs TCP segmentation offload
  *                      (TSO).  @hdr_len is the number of bytes
  *                      to the end of TCP header (the offset to
@@ -636,40 +715,41 @@ enum ionic_txq_desc_opcode {
  *                      clear CWR in remaining segments.
  * @flags:
  *                vlan:
- *                    Insert an L2 VLAN header using @vlan_tci.
+ *                    Insert an L2 VLAN header using @vlan_tci
  *                encap:
- *                    Calculate encap header checksum.
+ *                    Calculate encap header checksum
  *                csum_l3:
- *                    Compute L3 header checksum.
+ *                    Compute L3 header checksum
  *                csum_l4:
- *                    Compute L4 header checksum.
+ *                    Compute L4 header checksum
  *                tso_sot:
  *                    TSO start
  *                tso_eot:
  *                    TSO end
  * @num_sg_elems: Number of scatter-gather elements in SG
  *                descriptor
- * @addr:         First data buffer's DMA address.
- *                (Subsequent data buffers are on txq_sg_desc).
+ * @addr:         First data buffer's DMA address
+ *                (Subsequent data buffers are on txq_sg_desc)
  * @len:          First data buffer's length, in bytes
  * @vlan_tci:     VLAN tag to insert in the packet (if requested
  *                by @V-bit).  Includes .1p and .1q tags
  * @hdr_len:      Length of packet headers, including
- *                encapsulating outer header, if applicable.
- *                Valid for opcodes TXQ_DESC_OPCODE_CALC_CSUM and
- *                TXQ_DESC_OPCODE_TSO.  Should be set to zero for
+ *                encapsulating outer header, if applicable
+ *                Valid for opcodes IONIC_TXQ_DESC_OPCODE_CALC_CSUM and
+ *                IONIC_TXQ_DESC_OPCODE_TSO.  Should be set to zero for
  *                all other modes.  For
- *                TXQ_DESC_OPCODE_CALC_CSUM, @hdr_len is length
+ *                IONIC_TXQ_DESC_OPCODE_CALC_CSUM, @hdr_len is length
  *                of headers up to inner-most L4 header.  For
- *                TXQ_DESC_OPCODE_TSO, @hdr_len is up to
+ *                IONIC_TXQ_DESC_OPCODE_TSO, @hdr_len is up to
  *                inner-most L4 payload, so inclusive of
  *                inner-most L4 header.
- * @mss:          Desired MSS value for TSO.  Only applicable for
- *                TXQ_DESC_OPCODE_TSO.
- * @csum_start:   Offset into inner-most L3 header of checksum
- * @csum_offset:  Offset into inner-most L4 header of checksum
+ * @mss:          Desired MSS value for TSO; only applicable for
+ *                IONIC_TXQ_DESC_OPCODE_TSO
+ * @csum_start:   Offset from packet to first byte checked in L4 checksum
+ * @csum_offset:  Offset from csum_start to L4 checksum field
  */
-
+struct ionic_txq_desc {
+	__le64  cmd;
 #define IONIC_TXQ_DESC_OPCODE_MASK		0xf
 #define IONIC_TXQ_DESC_OPCODE_SHIFT		4
 #define IONIC_TXQ_DESC_FLAGS_MASK		0xf
@@ -691,8 +771,6 @@ enum ionic_txq_desc_opcode {
 #define IONIC_TXQ_DESC_FLAG_TSO_SOT		0x4
 #define IONIC_TXQ_DESC_FLAG_TSO_EOT		0x8
 
-struct ionic_txq_desc {
-	__le64  cmd;
 	__le16  len;
 	union {
 		__le16  vlan_tci;
@@ -719,45 +797,60 @@ static inline u64 encode_txq_desc_cmd(u8 opcode, u8 flags,
 		IONIC_TXQ_DESC_OPCODE_SHIFT;
 	cmd |= (flags & IONIC_TXQ_DESC_FLAGS_MASK) <<
 		IONIC_TXQ_DESC_FLAGS_SHIFT;
-	cmd |= (nsge & IONIC_TXQ_DESC_NSGE_MASK) << IONIC_TXQ_DESC_NSGE_SHIFT;
-	cmd |= (addr & IONIC_TXQ_DESC_ADDR_MASK) << IONIC_TXQ_DESC_ADDR_SHIFT;
+	cmd |= (nsge & IONIC_TXQ_DESC_NSGE_MASK) <<
+		IONIC_TXQ_DESC_NSGE_SHIFT;
+	cmd |= (addr & IONIC_TXQ_DESC_ADDR_MASK) <<
+		IONIC_TXQ_DESC_ADDR_SHIFT;
 
 	return cmd;
 };
 
-static inline void decode_txq_desc_cmd(u64 cmd, u8 *opcode, u8 *flags,
+static inline void
+decode_txq_desc_cmd(u64 cmd, u8 *opcode, u8 *flags,
 				       u8 *nsge, u64 *addr)
 {
 	*opcode = (cmd >> IONIC_TXQ_DESC_OPCODE_SHIFT) &
 		IONIC_TXQ_DESC_OPCODE_MASK;
 	*flags = (cmd >> IONIC_TXQ_DESC_FLAGS_SHIFT) &
 		IONIC_TXQ_DESC_FLAGS_MASK;
-	*nsge = (cmd >> IONIC_TXQ_DESC_NSGE_SHIFT) & IONIC_TXQ_DESC_NSGE_MASK;
-	*addr = (cmd >> IONIC_TXQ_DESC_ADDR_SHIFT) & IONIC_TXQ_DESC_ADDR_MASK;
+	*nsge = (cmd >> IONIC_TXQ_DESC_NSGE_SHIFT) &
+		IONIC_TXQ_DESC_NSGE_MASK;
+	*addr = (cmd >> IONIC_TXQ_DESC_ADDR_SHIFT) &
+		IONIC_TXQ_DESC_ADDR_MASK;
 };
 
-#define IONIC_TX_MAX_SG_ELEMS	8
-#define IONIC_RX_MAX_SG_ELEMS	8
-
 /**
- * struct ionic_txq_sg_desc - Transmit scatter-gather (SG) list
+ * struct ionic_txq_sg_elem - Transmit scatter-gather (SG) descriptor element
  * @addr:      DMA address of SG element data buffer
  * @len:       Length of SG element data buffer, in bytes
  */
+struct ionic_txq_sg_elem {
+	__le64 addr;
+	__le16 len;
+	__le16 rsvd[3];
+};
+
+/**
+ * struct ionic_txq_sg_desc - Transmit scatter-gather (SG) list
+ * @elems:     Scatter-gather elements
+ */
 struct ionic_txq_sg_desc {
-	struct ionic_txq_sg_elem {
-		__le64 addr;
-		__le16 len;
-		__le16 rsvd[3];
-	} elems[IONIC_TX_MAX_SG_ELEMS];
+#define IONIC_TX_MAX_SG_ELEMS		8
+#define IONIC_TX_SG_DESC_STRIDE		8
+	struct ionic_txq_sg_elem elems[IONIC_TX_MAX_SG_ELEMS];
+};
+
+struct ionic_txq_sg_desc_v1 {
+#define IONIC_TX_MAX_SG_ELEMS_V1		15
+#define IONIC_TX_SG_DESC_STRIDE_V1		16
+	struct ionic_txq_sg_elem elems[IONIC_TX_SG_DESC_STRIDE_V1];
 };
 
 /**
  * struct ionic_txq_comp - Ethernet transmit queue completion descriptor
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *                 is the completion.
- * @color:      Color bit.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @color:      Color bit
  */
 struct ionic_txq_comp {
 	u8     status;
@@ -774,16 +867,15 @@ enum ionic_rxq_desc_opcode {
 
 /**
  * struct ionic_rxq_desc - Ethernet Rx queue descriptor format
- * @opcode:       Rx operation, see RXQ_DESC_OPCODE_*:
- *
- *                   RXQ_DESC_OPCODE_SIMPLE:
+ * @opcode:       Rx operation, see IONIC_RXQ_DESC_OPCODE_*:
  *
+ *                   IONIC_RXQ_DESC_OPCODE_SIMPLE:
  *                      Receive full packet into data buffer
  *                      starting at @addr.  Results of
  *                      receive, including actual bytes received,
  *                      are recorded in Rx completion descriptor.
  *
- * @len:          Data buffer's length, in bytes.
+ * @len:          Data buffer's length, in bytes
  * @addr:         Data buffer's DMA address
  */
 struct ionic_rxq_desc {
@@ -794,26 +886,33 @@ struct ionic_rxq_desc {
 };
 
 /**
- * struct ionic_rxq_sg_desc - Receive scatter-gather (SG) list
+ * struct ionic_rxq_sg_elem - Receive scatter-gather (SG) descriptor element
  * @addr:      DMA address of SG element data buffer
  * @len:       Length of SG element data buffer, in bytes
  */
+struct ionic_rxq_sg_elem {
+	__le64 addr;
+	__le16 len;
+	__le16 rsvd[3];
+};
+
+/**
+ * struct ionic_rxq_sg_desc - Receive scatter-gather (SG) list
+ * @elems:     Scatter-gather elements
+ */
 struct ionic_rxq_sg_desc {
-	struct ionic_rxq_sg_elem {
-		__le64 addr;
-		__le16 len;
-		__le16 rsvd[3];
-	} elems[IONIC_RX_MAX_SG_ELEMS];
+#define IONIC_RX_MAX_SG_ELEMS		8
+#define IONIC_RX_SG_DESC_STRIDE		8
+	struct ionic_rxq_sg_elem elems[IONIC_RX_SG_DESC_STRIDE];
 };
 
 /**
  * struct ionic_rxq_comp - Ethernet receive queue completion descriptor
- * @status:       The status of the command (enum status_code)
+ * @status:       Status of the command (enum ionic_status_code)
  * @num_sg_elems: Number of SG elements used by this descriptor
- * @comp_index:   The index in the descriptor ring for which this
- *                is the completion.
+ * @comp_index:   Index in the descriptor ring for which this is the completion
  * @rss_hash:     32-bit RSS hash
- * @csum:         16-bit sum of the packet's L2 payload.
+ * @csum:         16-bit sum of the packet's L2 payload
  *                If the packet's L2 payload is odd length, an extra
  *                zero-value byte is included in the @csum calculation but
  *                not included in @len.
@@ -821,33 +920,51 @@ struct ionic_rxq_sg_desc {
  *                set.  Includes .1p and .1q tags.
  * @len:          Received packet length, in bytes.  Excludes FCS.
  * @csum_calc     L2 payload checksum is computed or not
- * @csum_tcp_ok:  The TCP checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                TCP header
- * @csum_tcp_bad: The TCP checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                TCP header.
- * @csum_udp_ok:  The UDP checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                UDP header
- * @csum_udp_bad: The UDP checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                UDP header.
- * @csum_ip_ok:   The IPv4 checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                first IPv4 header.  If the receive packet
- *                contains both a tunnel IPv4 header and a
- *                transport IPv4 header, the device validates the
- *                checksum for the both IPv4 headers.
- * @csum_ip_bad:  The IPv4 checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                first IPv4 header. If the receive packet
- *                contains both a tunnel IPv4 header and a
- *                transport IPv4 header, the device validates the
- *                checksum for both IP headers.
- * @VLAN:         VLAN header was stripped and placed in @vlan_tci.
- * @pkt_type:     Packet type
- * @color:        Color bit.
+ * @csum_flags:   See IONIC_RXQ_COMP_CSUM_F_*:
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_TCP_OK:
+ *                    The TCP checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    TCP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_TCP_BAD:
+ *                    The TCP checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    TCP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_UDP_OK:
+ *                    The UDP checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    UDP header
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_UDP_BAD:
+ *                    The UDP checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    UDP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_IP_OK:
+ *                    The IPv4 checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    first IPv4 header.  If the receive packet
+ *                    contains both a tunnel IPv4 header and a
+ *                    transport IPv4 header, the device validates the
+ *                    checksum for the both IPv4 headers.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_IP_BAD:
+ *                    The IPv4 checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    first IPv4 header. If the receive packet
+ *                    contains both a tunnel IPv4 header and a
+ *                    transport IPv4 header, the device validates the
+ *                    checksum for both IP headers.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_VLAN:
+ *                    The VLAN header was stripped and placed in @vlan_tci.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_CALC:
+ *                    The checksum was calculated by the device.
+ *
+ * @pkt_type_color: Packet type and color bit; see IONIC_RXQ_COMP_PKT_TYPE_MASK
  */
 struct ionic_rxq_comp {
 	u8     status;
@@ -871,13 +988,21 @@ struct ionic_rxq_comp {
 };
 
 enum ionic_pkt_type {
-	IONIC_PKT_TYPE_NON_IP     = 0x000,
-	IONIC_PKT_TYPE_IPV4       = 0x001,
-	IONIC_PKT_TYPE_IPV4_TCP   = 0x003,
-	IONIC_PKT_TYPE_IPV4_UDP   = 0x005,
-	IONIC_PKT_TYPE_IPV6       = 0x008,
-	IONIC_PKT_TYPE_IPV6_TCP   = 0x018,
-	IONIC_PKT_TYPE_IPV6_UDP   = 0x028,
+	IONIC_PKT_TYPE_NON_IP		= 0x00,
+	IONIC_PKT_TYPE_IPV4		= 0x01,
+	IONIC_PKT_TYPE_IPV4_TCP		= 0x03,
+	IONIC_PKT_TYPE_IPV4_UDP		= 0x05,
+	IONIC_PKT_TYPE_IPV6		= 0x08,
+	IONIC_PKT_TYPE_IPV6_TCP		= 0x18,
+	IONIC_PKT_TYPE_IPV6_UDP		= 0x28,
+	/* below types are only used if encap offloads are enabled on lif */
+	IONIC_PKT_TYPE_ENCAP_NON_IP	= 0x40,
+	IONIC_PKT_TYPE_ENCAP_IPV4	= 0x41,
+	IONIC_PKT_TYPE_ENCAP_IPV4_TCP	= 0x43,
+	IONIC_PKT_TYPE_ENCAP_IPV4_UDP	= 0x45,
+	IONIC_PKT_TYPE_ENCAP_IPV6	= 0x48,
+	IONIC_PKT_TYPE_ENCAP_IPV6_TCP	= 0x58,
+	IONIC_PKT_TYPE_ENCAP_IPV6_UDP	= 0x68,
 };
 
 enum ionic_eth_hw_features {
@@ -894,10 +1019,13 @@ enum ionic_eth_hw_features {
 	IONIC_ETH_HW_TSO_ECN		= BIT(10),
 	IONIC_ETH_HW_TSO_GRE		= BIT(11),
 	IONIC_ETH_HW_TSO_GRE_CSUM	= BIT(12),
-	IONIC_ETH_HW_TSO_IPXIP4	= BIT(13),
-	IONIC_ETH_HW_TSO_IPXIP6	= BIT(14),
+	IONIC_ETH_HW_TSO_IPXIP4		= BIT(13),
+	IONIC_ETH_HW_TSO_IPXIP6		= BIT(14),
 	IONIC_ETH_HW_TSO_UDP		= BIT(15),
 	IONIC_ETH_HW_TSO_UDP_CSUM	= BIT(16),
+	IONIC_ETH_HW_RX_CSUM_GENEVE	= BIT(17),
+	IONIC_ETH_HW_TX_CSUM_GENEVE	= BIT(18),
+	IONIC_ETH_HW_TSO_GENEVE		= BIT(19)
 };
 
 /**
@@ -906,7 +1034,7 @@ enum ionic_eth_hw_features {
  * @type:       Queue type
  * @lif_index:  LIF index
  * @index:      Queue index
- * @oper:       Operation (enum q_control_oper)
+ * @oper:       Operation (enum ionic_q_control_oper)
  */
 struct ionic_q_control_cmd {
 	u8     opcode;
@@ -919,14 +1047,17 @@ struct ionic_q_control_cmd {
 
 typedef struct ionic_admin_comp ionic_q_control_comp;
 
-enum q_control_oper {
+enum ionic_q_control_oper {
 	IONIC_Q_DISABLE		= 0,
 	IONIC_Q_ENABLE		= 1,
 	IONIC_Q_HANG_RESET	= 2,
 };
 
 /**
- * Physical connection type
+ * enum ionic_phy_type - Physical connection type
+ * @IONIC_PHY_TYPE_NONE:    No PHY installed
+ * @IONIC_PHY_TYPE_COPPER:  Copper PHY
+ * @IONIC_PHY_TYPE_FIBER:   Fiber PHY
  */
 enum ionic_phy_type {
 	IONIC_PHY_TYPE_NONE	= 0,
@@ -935,18 +1066,23 @@ enum ionic_phy_type {
 };
 
 /**
- * Transceiver status
+ * enum ionic_xcvr_state - Transceiver status
+ * @IONIC_XCVR_STATE_REMOVED:        Transceiver removed
+ * @IONIC_XCVR_STATE_INSERTED:       Transceiver inserted
+ * @IONIC_XCVR_STATE_PENDING:        Transceiver pending
+ * @IONIC_XCVR_STATE_SPROM_READ:     Transceiver data read
+ * @IONIC_XCVR_STATE_SPROM_READ_ERR: Transceiver data read error
  */
 enum ionic_xcvr_state {
 	IONIC_XCVR_STATE_REMOVED	 = 0,
 	IONIC_XCVR_STATE_INSERTED	 = 1,
 	IONIC_XCVR_STATE_PENDING	 = 2,
 	IONIC_XCVR_STATE_SPROM_READ	 = 3,
-	IONIC_XCVR_STATE_SPROM_READ_ERR  = 4,
+	IONIC_XCVR_STATE_SPROM_READ_ERR	 = 4,
 };
 
 /**
- * Supported link modes
+ * enum ionic_xcvr_pid - Supported link modes
  */
 enum ionic_xcvr_pid {
 	IONIC_XCVR_PID_UNKNOWN           = 0,
@@ -980,67 +1116,74 @@ enum ionic_xcvr_pid {
 	IONIC_XCVR_PID_SFP_10GBASE_CU   = 68,
 	IONIC_XCVR_PID_QSFP_100G_CWDM4  = 69,
 	IONIC_XCVR_PID_QSFP_100G_PSM4   = 70,
+	IONIC_XCVR_PID_SFP_25GBASE_ACC  = 71,
 };
 
 /**
- * Port types
- */
-enum ionic_port_type {
-	IONIC_PORT_TYPE_NONE = 0,  /* port type not configured */
-	IONIC_PORT_TYPE_ETH  = 1,  /* port carries ethernet traffic (inband) */
-	IONIC_PORT_TYPE_MGMT = 2,  /* port carries mgmt traffic (out-of-band) */
-};
-
-/**
- * Port config state
+ * enum ionic_port_admin_state - Port config state
+ * @IONIC_PORT_ADMIN_STATE_NONE:    Port admin state not configured
+ * @IONIC_PORT_ADMIN_STATE_DOWN:    Port admin disabled
+ * @IONIC_PORT_ADMIN_STATE_UP:      Port admin enabled
  */
 enum ionic_port_admin_state {
-	IONIC_PORT_ADMIN_STATE_NONE = 0,   /* port admin state not configured */
-	IONIC_PORT_ADMIN_STATE_DOWN = 1,   /* port is admin disabled */
-	IONIC_PORT_ADMIN_STATE_UP   = 2,   /* port is admin enabled */
+	IONIC_PORT_ADMIN_STATE_NONE = 0,
+	IONIC_PORT_ADMIN_STATE_DOWN = 1,
+	IONIC_PORT_ADMIN_STATE_UP   = 2,
 };
 
 /**
- * Port operational status
+ * enum ionic_port_oper_status - Port operational status
+ * @IONIC_PORT_OPER_STATUS_NONE:    Port disabled
+ * @IONIC_PORT_OPER_STATUS_UP:      Port link status up
+ * @IONIC_PORT_OPER_STATUS_DOWN:    Port link status down
  */
 enum ionic_port_oper_status {
-	IONIC_PORT_OPER_STATUS_NONE  = 0,	/* port is disabled */
-	IONIC_PORT_OPER_STATUS_UP    = 1,	/* port is linked up */
-	IONIC_PORT_OPER_STATUS_DOWN  = 2,	/* port link status is down */
+	IONIC_PORT_OPER_STATUS_NONE  = 0,
+	IONIC_PORT_OPER_STATUS_UP    = 1,
+	IONIC_PORT_OPER_STATUS_DOWN  = 2,
 };
 
 /**
- * Ethernet Forward error correction (fec) modes
+ * enum ionic_port_fec_type - Ethernet Forward error correction (FEC) modes
+ * @IONIC_PORT_FEC_TYPE_NONE:       FEC Disabled
+ * @IONIC_PORT_FEC_TYPE_FC:         FireCode FEC
+ * @IONIC_PORT_FEC_TYPE_RS:         ReedSolomon FEC
  */
 enum ionic_port_fec_type {
-	IONIC_PORT_FEC_TYPE_NONE = 0,		/* Disabled */
-	IONIC_PORT_FEC_TYPE_FC   = 1,		/* FireCode */
-	IONIC_PORT_FEC_TYPE_RS   = 2,		/* ReedSolomon */
+	IONIC_PORT_FEC_TYPE_NONE = 0,
+	IONIC_PORT_FEC_TYPE_FC   = 1,
+	IONIC_PORT_FEC_TYPE_RS   = 2,
 };
 
 /**
- * Ethernet pause (flow control) modes
+ * enum ionic_port_pause_type - Ethernet pause (flow control) modes
+ * @IONIC_PORT_PAUSE_TYPE_NONE:     Disable Pause
+ * @IONIC_PORT_PAUSE_TYPE_LINK:     Link level pause
+ * @IONIC_PORT_PAUSE_TYPE_PFC:      Priority-Flow Control
  */
 enum ionic_port_pause_type {
-	IONIC_PORT_PAUSE_TYPE_NONE = 0,	/* Disable Pause */
-	IONIC_PORT_PAUSE_TYPE_LINK = 1,	/* Link level pause */
-	IONIC_PORT_PAUSE_TYPE_PFC  = 2,	/* Priority-Flow control */
+	IONIC_PORT_PAUSE_TYPE_NONE = 0,
+	IONIC_PORT_PAUSE_TYPE_LINK = 1,
+	IONIC_PORT_PAUSE_TYPE_PFC  = 2,
 };
 
 /**
- * Loopback modes
+ * enum ionic_port_loopback_mode - Loopback modes
+ * @IONIC_PORT_LOOPBACK_MODE_NONE:  Disable loopback
+ * @IONIC_PORT_LOOPBACK_MODE_MAC:   MAC loopback
+ * @IONIC_PORT_LOOPBACK_MODE_PHY:   PHY/SerDes loopback
  */
 enum ionic_port_loopback_mode {
-	IONIC_PORT_LOOPBACK_MODE_NONE = 0,	/* Disable loopback */
-	IONIC_PORT_LOOPBACK_MODE_MAC  = 1,	/* MAC loopback */
-	IONIC_PORT_LOOPBACK_MODE_PHY  = 2,	/* PHY/Serdes loopback */
+	IONIC_PORT_LOOPBACK_MODE_NONE = 0,
+	IONIC_PORT_LOOPBACK_MODE_MAC  = 1,
+	IONIC_PORT_LOOPBACK_MODE_PHY  = 2,
 };
 
 /**
- * Transceiver Status information
+ * struct ionic_xcvr_status - Transceiver Status information
  * @state:    Transceiver status (enum ionic_xcvr_state)
  * @phy:      Physical connection type (enum ionic_phy_type)
- * @pid:      Transceiver link mode (enum pid)
+ * @pid:      Transceiver link mode (enum ionic_xcvr_pid)
  * @sprom:    Transceiver sprom contents
  */
 struct ionic_xcvr_status {
@@ -1051,10 +1194,10 @@ struct ionic_xcvr_status {
 };
 
 /**
- * Port configuration
+ * union ionic_port_config - Port configuration
  * @speed:              port speed (in Mbps)
  * @mtu:                mtu
- * @state:              port admin state (enum port_admin_state)
+ * @state:              port admin state (enum ionic_port_admin_state)
  * @an_enable:          autoneg enable
  * @fec_type:           fec type (enum ionic_port_fec_type)
  * @pause_type:         pause type (enum ionic_port_pause_type)
@@ -1084,19 +1227,23 @@ union ionic_port_config {
 };
 
 /**
- * Port Status information
+ * struct ionic_port_status - Port Status information
  * @status:             link status (enum ionic_port_oper_status)
  * @id:                 port id
  * @speed:              link speed (in Mbps)
+ * @link_down_count:    number of times link went from up to down
+ * @fec_type:           fec type (enum ionic_port_fec_type)
  * @xcvr:               transceiver status
  */
 struct ionic_port_status {
 	__le32 id;
 	__le32 speed;
 	u8     status;
-	u8     rsvd[51];
+	__le16 link_down_count;
+	u8     fec_type;
+	u8     rsvd[48];
 	struct ionic_xcvr_status  xcvr;
-};
+} __rte_packed;
 
 /**
  * struct ionic_port_identify_cmd - Port identify command
@@ -1113,7 +1260,7 @@ struct ionic_port_identify_cmd {
 
 /**
  * struct ionic_port_identify_comp - Port identify command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_port_identify_comp {
@@ -1138,7 +1285,7 @@ struct ionic_port_init_cmd {
 
 /**
  * struct ionic_port_init_comp - Port initialization command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_port_init_comp {
 	u8 status;
@@ -1158,7 +1305,7 @@ struct ionic_port_reset_cmd {
 
 /**
  * struct ionic_port_reset_comp - Port reset command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_port_reset_comp {
 	u8 status;
@@ -1166,15 +1313,23 @@ struct ionic_port_reset_comp {
 };
 
 /**
- * enum stats_ctl_cmd - List of commands for stats control
+ * enum ionic_stats_ctl_cmd - List of commands for stats control
+ * @IONIC_STATS_CTL_RESET:      Reset statistics
  */
 enum ionic_stats_ctl_cmd {
 	IONIC_STATS_CTL_RESET		= 0,
 };
 
-
 /**
  * enum ionic_port_attr - List of device attributes
+ * @IONIC_PORT_ATTR_STATE:      Port state attribute
+ * @IONIC_PORT_ATTR_SPEED:      Port speed attribute
+ * @IONIC_PORT_ATTR_MTU:        Port MTU attribute
+ * @IONIC_PORT_ATTR_AUTONEG:    Port autonegotiation attribute
+ * @IONIC_PORT_ATTR_FEC:        Port FEC attribute
+ * @IONIC_PORT_ATTR_PAUSE:      Port pause attribute
+ * @IONIC_PORT_ATTR_LOOPBACK:   Port loopback attribute
+ * @IONIC_PORT_ATTR_STATS_CTRL: Port statistics control attribute
  */
 enum ionic_port_attr {
 	IONIC_PORT_ATTR_STATE		= 0,
@@ -1189,9 +1344,17 @@ enum ionic_port_attr {
 
 /**
  * struct ionic_port_setattr_cmd - Set port attributes on the NIC
- * @opcode:     Opcode
- * @index:      port index
- * @attr:       Attribute type (enum ionic_port_attr)
+ * @opcode:         Opcode
+ * @index:          Port index
+ * @attr:           Attribute type (enum ionic_port_attr)
+ * @state:          Port state
+ * @speed:          Port speed
+ * @mtu:            Port MTU
+ * @an_enable:      Port autonegotiation setting
+ * @fec_type:       Port FEC type setting
+ * @pause_type:     Port pause type setting
+ * @loopback_mode:  Port loopback mode
+ * @stats_ctl:      Port stats setting
  */
 struct ionic_port_setattr_cmd {
 	u8     opcode;
@@ -1206,14 +1369,14 @@ struct ionic_port_setattr_cmd {
 		u8      fec_type;
 		u8      pause_type;
 		u8      loopback_mode;
-		u8	stats_ctl;
+		u8      stats_ctl;
 		u8      rsvd2[60];
 	};
 };
 
 /**
  * struct ionic_port_setattr_comp - Port set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @color:      Color bit
  */
 struct ionic_port_setattr_comp {
@@ -1237,8 +1400,15 @@ struct ionic_port_getattr_cmd {
 
 /**
  * struct ionic_port_getattr_comp - Port get attr command completion
- * @status:     The status of the command (enum status_code)
- * @color:      Color bit
+ * @status:         Status of the command (enum ionic_status_code)
+ * @state:          Port state
+ * @speed:          Port speed
+ * @mtu:            Port MTU
+ * @an_enable:      Port autonegotiation setting
+ * @fec_type:       Port FEC type setting
+ * @pause_type:     Port pause type setting
+ * @loopback_mode:  Port loopback mode
+ * @color:          Color bit
  */
 struct ionic_port_getattr_comp {
 	u8     status;
@@ -1252,17 +1422,17 @@ struct ionic_port_getattr_comp {
 		u8      pause_type;
 		u8      loopback_mode;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
 /**
- * struct ionic_lif_status - Lif status register
+ * struct ionic_lif_status - LIF status register
  * @eid:             most recent NotifyQ event id
- * @port_num:        port the lif is connected to
+ * @port_num:        port the LIF is connected to
  * @link_status:     port status (enum ionic_port_oper_status)
  * @link_speed:      speed of link in Mbps
- * @link_down_count: number of times link status changes
+ * @link_down_count: number of times link went from up to down
  */
 struct ionic_lif_status {
 	__le64 eid;
@@ -1296,6 +1466,9 @@ enum ionic_dev_state {
 
 /**
  * enum ionic_dev_attr - List of device attributes
+ * @IONIC_DEV_ATTR_STATE:     Device state attribute
+ * @IONIC_DEV_ATTR_NAME:      Device name attribute
+ * @IONIC_DEV_ATTR_FEATURES:  Device feature attributes
  */
 enum ionic_dev_attr {
 	IONIC_DEV_ATTR_STATE    = 0,
@@ -1320,12 +1493,12 @@ struct ionic_dev_setattr_cmd {
 		char    name[IONIC_IFNAMSIZ];
 		__le64  features;
 		u8      rsvd2[60];
-	};
+	} __rte_packed;
 };
 
 /**
  * struct ionic_dev_setattr_comp - Device set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @features:   Device features
  * @color:      Color bit
  */
@@ -1335,7 +1508,7 @@ struct ionic_dev_setattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1352,7 +1525,7 @@ struct ionic_dev_getattr_cmd {
 
 /**
  * struct ionic_dev_setattr_comp - Device set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @features:   Device features
  * @color:      Color bit
  */
@@ -1362,7 +1535,7 @@ struct ionic_dev_getattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1382,6 +1555,13 @@ enum ionic_rss_hash_types {
 
 /**
  * enum ionic_lif_attr - List of LIF attributes
+ * @IONIC_LIF_ATTR_STATE:       LIF state attribute
+ * @IONIC_LIF_ATTR_NAME:        LIF name attribute
+ * @IONIC_LIF_ATTR_MTU:         LIF MTU attribute
+ * @IONIC_LIF_ATTR_MAC:         LIF MAC attribute
+ * @IONIC_LIF_ATTR_FEATURES:    LIF features attribute
+ * @IONIC_LIF_ATTR_RSS:         LIF RSS attribute
+ * @IONIC_LIF_ATTR_STATS_CTRL:  LIF statistics control attribute
  */
 enum ionic_lif_attr {
 	IONIC_LIF_ATTR_STATE        = 0,
@@ -1396,18 +1576,18 @@ enum ionic_lif_attr {
 /**
  * struct ionic_lif_setattr_cmd - Set LIF attributes on the NIC
  * @opcode:     Opcode
- * @type:       Attribute type (enum ionic_lif_attr)
+ * @attr:       Attribute type (enum ionic_lif_attr)
  * @index:      LIF index
- * @state:      lif state (enum lif_state)
+ * @state:      LIF state (enum ionic_lif_state)
  * @name:       The netdev name string, 0 terminated
  * @mtu:        Mtu
  * @mac:        Station mac
  * @features:   Features (enum ionic_eth_hw_features)
  * @rss:        RSS properties
- *              @types:     The hash types to enable (see rss_hash_types).
- *              @key:       The hash secret key.
- *              @addr:      Address for the indirection table shared memory.
- * @stats_ctl:  stats control commands (enum stats_ctl_cmd)
+ *              @types:     The hash types to enable (see rss_hash_types)
+ *              @key:       The hash secret key
+ *              @addr:      Address for the indirection table shared memory
+ * @stats_ctl:  stats control commands (enum ionic_stats_ctl_cmd)
  */
 struct ionic_lif_setattr_cmd {
 	u8     opcode;
@@ -1425,16 +1605,15 @@ struct ionic_lif_setattr_cmd {
 			u8     rsvd[6];
 			__le64 addr;
 		} rss;
-		u8	stats_ctl;
+		u8      stats_ctl;
 		u8      rsvd[60];
-	};
+	} __rte_packed;
 };
 
 /**
  * struct ionic_lif_setattr_comp - LIF set attr command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @features:   features (enum ionic_eth_hw_features)
  * @color:      Color bit
  */
@@ -1445,7 +1624,7 @@ struct ionic_lif_setattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1464,10 +1643,9 @@ struct ionic_lif_getattr_cmd {
 
 /**
  * struct ionic_lif_getattr_comp - LIF get attr command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
- * @state:      lif state (enum lif_state)
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @state:      LIF state (enum ionic_lif_state)
  * @name:       The netdev name string, 0 terminated
  * @mtu:        Mtu
  * @mac:        Station mac
@@ -1484,16 +1662,17 @@ struct ionic_lif_getattr_comp {
 		u8      mac[6];
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
 enum ionic_rx_mode {
-	IONIC_RX_MODE_F_UNICAST    = BIT(0),
-	IONIC_RX_MODE_F_MULTICAST  = BIT(1),
-	IONIC_RX_MODE_F_BROADCAST  = BIT(2),
-	IONIC_RX_MODE_F_PROMISC    = BIT(3),
-	IONIC_RX_MODE_F_ALLMULTI   = BIT(4),
+	IONIC_RX_MODE_F_UNICAST		= BIT(0),
+	IONIC_RX_MODE_F_MULTICAST	= BIT(1),
+	IONIC_RX_MODE_F_BROADCAST	= BIT(2),
+	IONIC_RX_MODE_F_PROMISC		= BIT(3),
+	IONIC_RX_MODE_F_ALLMULTI	= BIT(4),
+	IONIC_RX_MODE_F_RDMA_SNIFFER	= BIT(5),
 };
 
 /**
@@ -1501,11 +1680,12 @@ enum ionic_rx_mode {
  * @opcode:     opcode
  * @lif_index:  LIF index
  * @rx_mode:    Rx mode flags:
- *                  IONIC_RX_MODE_F_UNICAST: Accept known unicast packets.
- *                  IONIC_RX_MODE_F_MULTICAST: Accept known multicast packets.
- *                  IONIC_RX_MODE_F_BROADCAST: Accept broadcast packets.
- *                  IONIC_RX_MODE_F_PROMISC: Accept any packets.
- *                  IONIC_RX_MODE_F_ALLMULTI: Accept any multicast packets.
+ *                  IONIC_RX_MODE_F_UNICAST: Accept known unicast packets
+ *                  IONIC_RX_MODE_F_MULTICAST: Accept known multicast packets
+ *                  IONIC_RX_MODE_F_BROADCAST: Accept broadcast packets
+ *                  IONIC_RX_MODE_F_PROMISC: Accept any packets
+ *                  IONIC_RX_MODE_F_ALLMULTI: Accept any multicast packets
+ *                  IONIC_RX_MODE_F_RDMA_SNIFFER: Sniff RDMA packets
  */
 struct ionic_rx_mode_set_cmd {
 	u8     opcode;
@@ -1529,9 +1709,14 @@ enum ionic_rx_filter_match_type {
  * @qtype:      Queue type
  * @lif_index:  LIF index
  * @qid:        Queue ID
- * @match:      Rx filter match type.  (See IONIC_RX_FILTER_MATCH_xxx)
- * @vlan:       VLAN ID
- * @addr:       MAC address (network-byte order)
+ * @match:      Rx filter match type (see IONIC_RX_FILTER_MATCH_xxx)
+ * @vlan:       VLAN filter
+ *              @vlan:  VLAN ID
+ * @mac:        MAC filter
+ *              @addr:  MAC address (network-byte order)
+ * @mac_vlan:   MACVLAN filter
+ *              @vlan:  VLAN ID
+ *              @addr:  MAC address (network-byte order)
  */
 struct ionic_rx_filter_add_cmd {
 	u8     opcode;
@@ -1556,11 +1741,10 @@ struct ionic_rx_filter_add_cmd {
 
 /**
  * struct ionic_rx_filter_add_comp - Add LIF Rx filter command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @filter_id:  Filter ID
- * @color:      Color bit.
+ * @color:      Color bit
  */
 struct ionic_rx_filter_add_comp {
 	u8     status;
@@ -1587,9 +1771,99 @@ struct ionic_rx_filter_del_cmd {
 
 typedef struct ionic_admin_comp ionic_rx_filter_del_comp;
 
+enum ionic_vf_attr {
+	IONIC_VF_ATTR_SPOOFCHK	= 1,
+	IONIC_VF_ATTR_TRUST	= 2,
+	IONIC_VF_ATTR_MAC	= 3,
+	IONIC_VF_ATTR_LINKSTATE	= 4,
+	IONIC_VF_ATTR_VLAN	= 5,
+	IONIC_VF_ATTR_RATE	= 6,
+	IONIC_VF_ATTR_STATSADDR	= 7,
+};
+
+/**
+ * enum ionic_vf_link_status - Virtual Function link status
+ * @IONIC_VF_LINK_STATUS_AUTO:   Use link state of the uplink
+ * @IONIC_VF_LINK_STATUS_UP:     Link always up
+ * @IONIC_VF_LINK_STATUS_DOWN:   Link always down
+ */
+enum ionic_vf_link_status {
+	IONIC_VF_LINK_STATUS_AUTO = 0,
+	IONIC_VF_LINK_STATUS_UP   = 1,
+	IONIC_VF_LINK_STATUS_DOWN = 2,
+};
+
+/**
+ * struct ionic_vf_setattr_cmd - Set VF attributes on the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_vf_attr)
+ * @vf_index:   VF index
+ *	@macaddr:	mac address
+ *	@vlanid:	vlan ID
+ *	@maxrate:	max Tx rate in Mbps
+ *	@spoofchk:	enable address spoof checking
+ *	@trust:		enable VF trust
+ *	@linkstate:	set link up or down
+ *	@stats_pa:	set DMA address for VF stats
+ */
+struct ionic_vf_setattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 vf_index;
+	union {
+		u8     macaddr[6];
+		__le16 vlanid;
+		__le32 maxrate;
+		u8     spoofchk;
+		u8     trust;
+		u8     linkstate;
+		__le64 stats_pa;
+		u8     pad[60];
+	} __rte_packed;
+};
+
+struct ionic_vf_setattr_comp {
+	u8     status;
+	u8     attr;
+	__le16 vf_index;
+	__le16 comp_index;
+	u8     rsvd[9];
+	u8     color;
+};
+
+/**
+ * struct ionic_vf_getattr_cmd - Get VF attributes from the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_vf_attr)
+ * @vf_index:   VF index
+ */
+struct ionic_vf_getattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 vf_index;
+	u8     rsvd[60];
+};
+
+struct ionic_vf_getattr_comp {
+	u8     status;
+	u8     attr;
+	__le16 vf_index;
+	union {
+		u8     macaddr[6];
+		__le16 vlanid;
+		__le32 maxrate;
+		u8     spoofchk;
+		u8     trust;
+		u8     linkstate;
+		__le64 stats_pa;
+		u8     pad[11];
+	} __rte_packed;
+	u8     color;
+};
+
 /**
  * struct ionic_qos_identify_cmd - QoS identify command
- * @opcode:    opcode
+ * @opcode:  opcode
  * @ver:     Highest version of identify supported by driver
  *
  */
@@ -1601,7 +1875,7 @@ struct ionic_qos_identify_cmd {
 
 /**
  * struct ionic_qos_identify_comp - QoS identify command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_qos_identify_comp {
@@ -1610,9 +1884,15 @@ struct ionic_qos_identify_comp {
 	u8 rsvd[14];
 };
 
+#define IONIC_QOS_TC_MAX		8
+#define IONIC_QOS_ALL_TC		0xFF
+/* Capri max supported, should be renamed. */
 #define IONIC_QOS_CLASS_MAX		7
-#define IONIC_QOS_CLASS_NAME_SZ		32
-#define IONIC_QOS_DSCP_MAX_VALUES	64
+#define IONIC_QOS_PCP_MAX		8
+#define IONIC_QOS_CLASS_NAME_SZ	32
+#define IONIC_QOS_DSCP_MAX		64
+#define IONIC_QOS_ALL_PCP		0xFF
+#define IONIC_DSCP_BLOCK_SIZE		8
 
 /**
  * enum ionic_qos_class
@@ -1629,42 +1909,44 @@ enum ionic_qos_class {
 
 /**
  * enum ionic_qos_class_type - Traffic classification criteria
+ * @IONIC_QOS_CLASS_TYPE_NONE:    No QoS
+ * @IONIC_QOS_CLASS_TYPE_PCP:     Dot1Q PCP
+ * @IONIC_QOS_CLASS_TYPE_DSCP:    IP DSCP
  */
 enum ionic_qos_class_type {
 	IONIC_QOS_CLASS_TYPE_NONE	= 0,
-	IONIC_QOS_CLASS_TYPE_PCP	= 1,	/* Dot1Q pcp */
-	IONIC_QOS_CLASS_TYPE_DSCP	= 2,	/* IP dscp */
+	IONIC_QOS_CLASS_TYPE_PCP	= 1,
+	IONIC_QOS_CLASS_TYPE_DSCP	= 2,
 };
 
 /**
- * enum ionic_qos_sched_type - Qos class scheduling type
+ * enum ionic_qos_sched_type - QoS class scheduling type
+ * @IONIC_QOS_SCHED_TYPE_STRICT:  Strict priority
+ * @IONIC_QOS_SCHED_TYPE_DWRR:    Deficit weighted round-robin
  */
 enum ionic_qos_sched_type {
-	/* Strict priority */
 	IONIC_QOS_SCHED_TYPE_STRICT	= 0,
-	/* Deficit weighted round-robin */
 	IONIC_QOS_SCHED_TYPE_DWRR	= 1,
 };
 
 /**
- * union ionic_qos_config - Qos configuration structure
+ * union ionic_qos_config - QoS configuration structure
  * @flags:		Configuration flags
  *	IONIC_QOS_CONFIG_F_ENABLE		enable
- *	IONIC_QOS_CONFIG_F_DROP			drop/nodrop
+ *	IONIC_QOS_CONFIG_F_NO_DROP		drop/nodrop
  *	IONIC_QOS_CONFIG_F_RW_DOT1Q_PCP		enable dot1q pcp rewrite
  *	IONIC_QOS_CONFIG_F_RW_IP_DSCP		enable ip dscp rewrite
- * @sched_type:		Qos class scheduling type (enum ionic_qos_sched_type)
- * @class_type:		Qos class type (enum ionic_qos_class_type)
- * @pause_type:		Qos pause type (enum qos_pause_type)
- * @name:		Qos class name
+ *	IONIC_QOS_CONFIG_F_NON_DISRUPTIVE	Non-disruptive TC update
+ * @sched_type:		QoS class scheduling type (enum ionic_qos_sched_type)
+ * @class_type:		QoS class type (enum ionic_qos_class_type)
+ * @pause_type:		QoS pause type (enum ionic_qos_pause_type)
+ * @name:		QoS class name
  * @mtu:		MTU of the class
- * @pfc_dot1q_pcp:	Pcp value for pause frames (valid iff F_NODROP)
- * @dwrr_weight:	Qos class scheduling weight
+ * @pfc_cos:		Priority-Flow Control class of service
+ * @dwrr_weight:	QoS class scheduling weight
  * @strict_rlmt:	Rate limit for strict priority scheduling
- * @rw_dot1q_pcp:	Rewrite dot1q pcp to this value
- *			(valid iff F_RW_DOT1Q_PCP)
- * @rw_ip_dscp:		Rewrite ip dscp to this value
- *			(valid iff F_RW_IP_DSCP)
+ * @rw_dot1q_pcp:	Rewrite dot1q pcp to value (valid iff F_RW_DOT1Q_PCP)
+ * @rw_ip_dscp:		Rewrite ip dscp to value (valid iff F_RW_IP_DSCP)
  * @dot1q_pcp:		Dot1q pcp value
  * @ndscp:		Number of valid dscp values in the ip_dscp field
  * @ip_dscp:		IP dscp values
@@ -1672,9 +1954,12 @@ enum ionic_qos_sched_type {
 union ionic_qos_config {
 	struct {
 #define IONIC_QOS_CONFIG_F_ENABLE		BIT(0)
-#define IONIC_QOS_CONFIG_F_DROP			BIT(1)
+#define IONIC_QOS_CONFIG_F_NO_DROP		BIT(1)
+/* Used to rewrite PCP or DSCP value. */
 #define IONIC_QOS_CONFIG_F_RW_DOT1Q_PCP		BIT(2)
 #define IONIC_QOS_CONFIG_F_RW_IP_DSCP		BIT(3)
+/* Non-disruptive TC update */
+#define IONIC_QOS_CONFIG_F_NON_DISRUPTIVE	BIT(4)
 		u8      flags;
 		u8      sched_type;
 		u8      class_type;
@@ -1689,6 +1974,7 @@ union ionic_qos_config {
 			__le64  strict_rlmt;
 		};
 		/* marking */
+		/* Used to rewrite PCP or DSCP value. */
 		union {
 			u8      rw_dot1q_pcp;
 			u8      rw_ip_dscp;
@@ -1698,10 +1984,10 @@ union ionic_qos_config {
 			u8      dot1q_pcp;
 			struct {
 				u8      ndscp;
-				u8      ip_dscp[IONIC_QOS_DSCP_MAX_VALUES];
+				u8      ip_dscp[IONIC_QOS_DSCP_MAX];
 			};
 		};
-	};
+	} __rte_packed;
 	__le32  words[64];
 };
 
@@ -1717,15 +2003,15 @@ union ionic_qos_identity {
 		u8     version;
 		u8     type;
 		u8     rsvd[62];
-		union  ionic_qos_config config[IONIC_QOS_CLASS_MAX];
+		union ionic_qos_config config[IONIC_QOS_CLASS_MAX];
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
- * struct qos_init_cmd - QoS config init command
+ * struct ionic_qos_init_cmd - QoS config init command
  * @opcode:	Opcode
- * @group:	Qos class id
+ * @group:	QoS class id
  * @info_pa:	destination address for qos info
  */
 struct ionic_qos_init_cmd {
@@ -1739,8 +2025,9 @@ struct ionic_qos_init_cmd {
 typedef struct ionic_admin_comp ionic_qos_init_comp;
 
 /**
- * struct ionic_qos_reset_cmd - Qos config reset command
+ * struct ionic_qos_reset_cmd - QoS config reset command
  * @opcode:	Opcode
+ * @group:	QoS class id
  */
 struct ionic_qos_reset_cmd {
 	u8    opcode;
@@ -1748,6 +2035,16 @@ struct ionic_qos_reset_cmd {
 	u8    rsvd[62];
 };
 
+/**
+ * struct ionic_qos_clear_port_stats_cmd - Qos config reset command
+ * @opcode:	Opcode
+ */
+struct ionic_qos_clear_stats_cmd {
+	u8    opcode;
+	u8    group_bitmap;
+	u8    rsvd[62];
+};
+
 typedef struct ionic_admin_comp ionic_qos_reset_comp;
 
 /**
@@ -1767,10 +2064,16 @@ struct ionic_fw_download_cmd {
 
 typedef struct ionic_admin_comp ionic_fw_download_comp;
 
+/**
+ * enum ionic_fw_control_oper - FW control operations
+ * @IONIC_FW_RESET:     Reset firmware
+ * @IONIC_FW_INSTALL:   Install firmware
+ * @IONIC_FW_ACTIVATE:  Acticate firmware
+ */
 enum ionic_fw_control_oper {
-	IONIC_FW_RESET		= 0,	/* Reset firmware */
-	IONIC_FW_INSTALL	= 1,	/* Install firmware */
-	IONIC_FW_ACTIVATE	= 2,	/* Activate firmware */
+	IONIC_FW_RESET		= 0,
+	IONIC_FW_INSTALL	= 1,
+	IONIC_FW_ACTIVATE	= 2,
 };
 
 /**
@@ -1789,8 +2092,10 @@ struct ionic_fw_control_cmd {
 
 /**
  * struct ionic_fw_control_comp - Firmware control copletion
- * @opcode:    opcode
- * @slot:      slot where the firmware was installed
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @slot:       Slot where the firmware was installed
+ * @color:      Color bit
  */
 struct ionic_fw_control_comp {
 	u8     status;
@@ -1808,11 +2113,11 @@ struct ionic_fw_control_comp {
 /**
  * struct ionic_rdma_reset_cmd - Reset RDMA LIF cmd
  * @opcode:        opcode
- * @lif_index:     lif index
+ * @lif_index:     LIF index
  *
- * There is no rdma specific dev command completion struct.  Completion uses
+ * There is no RDMA specific dev command completion struct.  Completion uses
  * the common struct ionic_admin_comp.  Only the status is indicated.
- * Nonzero status means the LIF does not support rdma.
+ * Nonzero status means the LIF does not support RDMA.
  **/
 struct ionic_rdma_reset_cmd {
 	u8     opcode;
@@ -1824,30 +2129,29 @@ struct ionic_rdma_reset_cmd {
 /**
  * struct ionic_rdma_queue_cmd - Create RDMA Queue command
  * @opcode:        opcode, 52, 53
- * @lif_index      lif index
- * @qid_ver:       (qid | (rdma version << 24))
+ * @lif_index:     LIF index
+ * @qid_ver:       (qid | (RDMA version << 24))
  * @cid:           intr, eq_id, or cq_id
  * @dbid:          doorbell page id
  * @depth_log2:    log base two of queue depth
  * @stride_log2:   log base two of queue stride
  * @dma_addr:      address of the queue memory
- * @xxx_table_index: temporary, but should not need pgtbl for contig. queues.
  *
- * The same command struct is used to create an rdma event queue, completion
- * queue, or rdma admin queue.  The cid is an interrupt number for an event
+ * The same command struct is used to create an RDMA event queue, completion
+ * queue, or RDMA admin queue.  The cid is an interrupt number for an event
  * queue, an event queue id for a completion queue, or a completion queue id
- * for an rdma admin queue.
+ * for an RDMA admin queue.
  *
  * The queue created via a dev command must be contiguous in dma space.
  *
  * The dev commands are intended only to be used during driver initialization,
- * to create queues supporting the rdma admin queue.  Other queues, and other
- * types of rdma resources like memory regions, will be created and registered
- * via the rdma admin queue, and will support a more complete interface
+ * to create queues supporting the RDMA admin queue.  Other queues, and other
+ * types of RDMA resources like memory regions, will be created and registered
+ * via the RDMA admin queue, and will support a more complete interface
  * providing scatter gather lists for larger, scattered queue buffers and
  * memory registration.
  *
- * There is no rdma specific dev command completion struct.  Completion uses
+ * There is no RDMA specific dev command completion struct.  Completion uses
  * the common struct ionic_admin_comp.  Only the status is indicated.
  **/
 struct ionic_rdma_queue_cmd {
@@ -1860,8 +2164,7 @@ struct ionic_rdma_queue_cmd {
 	u8     depth_log2;
 	u8     stride_log2;
 	__le64 dma_addr;
-	u8     rsvd2[36];
-	__le32 xxx_table_index;
+	u8     rsvd2[40];
 };
 
 /******************************************************************
@@ -1869,7 +2172,7 @@ struct ionic_rdma_queue_cmd {
  ******************************************************************/
 
 /**
- * struct ionic_notifyq_event
+ * struct ionic_notifyq_event - Generic event reporting structure
  * @eid:   event number
  * @ecode: event code
  * @data:  unspecified data about the event
@@ -1884,10 +2187,10 @@ struct ionic_notifyq_event {
 };
 
 /**
- * struct ionic_link_change_event
+ * struct ionic_link_change_event - Link change event notification
  * @eid:		event number
- * @ecode:		event code = EVENT_OPCODE_LINK_CHANGE
- * @link_status:	link up or down, with error bits (enum port_status)
+ * @ecode:		event code = IONIC_EVENT_LINK_CHANGE
+ * @link_status:	link up/down, with error bits (enum ionic_port_status)
  * @link_speed:		speed of the network link
  *
  * Sent when the network link state changes between UP and DOWN
@@ -1901,9 +2204,9 @@ struct ionic_link_change_event {
 };
 
 /**
- * struct ionic_reset_event
+ * struct ionic_reset_event - Reset event notification
  * @eid:		event number
- * @ecode:		event code = EVENT_OPCODE_RESET
+ * @ecode:		event code = IONIC_EVENT_RESET
  * @reset_code:		reset type
  * @state:		0=pending, 1=complete, 2=error
  *
@@ -1919,11 +2222,9 @@ struct ionic_reset_event {
 };
 
 /**
- * struct ionic_heartbeat_event
+ * struct ionic_heartbeat_event - Sent periodically by NIC to indicate health
  * @eid:	event number
- * @ecode:	event code = EVENT_OPCODE_HEARTBEAT
- *
- * Sent periodically by the NIC to indicate continued health
+ * @ecode:	event code = IONIC_EVENT_HEARTBEAT
  */
 struct ionic_heartbeat_event {
 	__le64 eid;
@@ -1932,12 +2233,10 @@ struct ionic_heartbeat_event {
 };
 
 /**
- * struct ionic_log_event
+ * struct ionic_log_event - Sent to notify the driver of an internal error
  * @eid:	event number
- * @ecode:	event code = EVENT_OPCODE_LOG
+ * @ecode:	event code = IONIC_EVENT_LOG
  * @data:	log data
- *
- * Sent to notify the driver of an internal error.
  */
 struct ionic_log_event {
 	__le64 eid;
@@ -1946,7 +2245,18 @@ struct ionic_log_event {
 };
 
 /**
- * struct ionic_port_stats
+ * struct ionic_xcvr_event - Transceiver change event
+ * @eid:	event number
+ * @ecode:	event code = IONIC_EVENT_XCVR
+ */
+struct ionic_xcvr_event {
+	__le64 eid;
+	__le16 ecode;
+	u8     rsvd[54];
+};
+
+/**
+ * struct ionic_port_stats - Port statistics structure
  */
 struct ionic_port_stats {
 	__le64 frames_rx_ok;
@@ -2051,34 +2361,109 @@ struct ionic_mgmt_port_stats {
 	__le64 frames_rx_multicast;
 	__le64 frames_rx_broadcast;
 	__le64 frames_rx_pause;
-	__le64 frames_rx_bad_length0;
-	__le64 frames_rx_undersized1;
-	__le64 frames_rx_oversized2;
-	__le64 frames_rx_fragments3;
-	__le64 frames_rx_jabber4;
-	__le64 frames_rx_64b5;
-	__le64 frames_rx_65b_127b6;
-	__le64 frames_rx_128b_255b7;
-	__le64 frames_rx_256b_511b8;
-	__le64 frames_rx_512b_1023b9;
-	__le64 frames_rx_1024b_1518b0;
-	__le64 frames_rx_gt_1518b1;
-	__le64 frames_rx_fifo_full2;
-	__le64 frames_tx_ok3;
-	__le64 frames_tx_all4;
-	__le64 frames_tx_bad5;
-	__le64 octets_tx_ok6;
-	__le64 octets_tx_total7;
-	__le64 frames_tx_unicast8;
-	__le64 frames_tx_multicast9;
-	__le64 frames_tx_broadcast0;
-	__le64 frames_tx_pause1;
+	__le64 frames_rx_bad_length;
+	__le64 frames_rx_undersized;
+	__le64 frames_rx_oversized;
+	__le64 frames_rx_fragments;
+	__le64 frames_rx_jabber;
+	__le64 frames_rx_64b;
+	__le64 frames_rx_65b_127b;
+	__le64 frames_rx_128b_255b;
+	__le64 frames_rx_256b_511b;
+	__le64 frames_rx_512b_1023b;
+	__le64 frames_rx_1024b_1518b;
+	__le64 frames_rx_gt_1518b;
+	__le64 frames_rx_fifo_full;
+	__le64 frames_tx_ok;
+	__le64 frames_tx_all;
+	__le64 frames_tx_bad;
+	__le64 octets_tx_ok;
+	__le64 octets_tx_total;
+	__le64 frames_tx_unicast;
+	__le64 frames_tx_multicast;
+	__le64 frames_tx_broadcast;
+	__le64 frames_tx_pause;
+};
+
+enum ionic_pb_buffer_drop_stats {
+	IONIC_BUFFER_INTRINSIC_DROP = 0,
+	IONIC_BUFFER_DISCARDED,
+	IONIC_BUFFER_ADMITTED,
+	IONIC_BUFFER_OUT_OF_CELLS_DROP,
+	IONIC_BUFFER_OUT_OF_CELLS_DROP_2,
+	IONIC_BUFFER_OUT_OF_CREDIT_DROP,
+	IONIC_BUFFER_TRUNCATION_DROP,
+	IONIC_BUFFER_PORT_DISABLED_DROP,
+	IONIC_BUFFER_COPY_TO_CPU_TAIL_DROP,
+	IONIC_BUFFER_SPAN_TAIL_DROP,
+	IONIC_BUFFER_MIN_SIZE_VIOLATION_DROP,
+	IONIC_BUFFER_ENQUEUE_ERROR_DROP,
+	IONIC_BUFFER_INVALID_PORT_DROP,
+	IONIC_BUFFER_INVALID_OUTPUT_QUEUE_DROP,
+	IONIC_BUFFER_DROP_MAX,
+};
+
+enum ionic_oflow_drop_stats {
+	IONIC_OFLOW_OCCUPANCY_DROP,
+	IONIC_OFLOW_EMERGENCY_STOP_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_ACK_FILL_UP_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_ACK_FULL_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_FULL_DROP,
+	IONIC_OFLOW_CONTROL_FIFO_FULL_DROP,
+	IONIC_OFLOW_DROP_MAX,
+};
+
+/**
+ * struct port_pb_stats - packet buffers system stats
+ * uses ionic_pb_buffer_drop_stats for drop_counts[]
+ */
+struct ionic_port_pb_stats {
+	__le64 sop_count_in;
+	__le64 eop_count_in;
+	__le64 sop_count_out;
+	__le64 eop_count_out;
+	__le64 drop_counts[IONIC_BUFFER_DROP_MAX];
+	__le64 input_queue_buffer_occupancy[IONIC_QOS_TC_MAX];
+	__le64 input_queue_port_monitor[IONIC_QOS_TC_MAX];
+	__le64 output_queue_port_monitor[IONIC_QOS_TC_MAX];
+	__le64 oflow_drop_counts[IONIC_OFLOW_DROP_MAX];
+	__le64 input_queue_good_pkts_in[IONIC_QOS_TC_MAX];
+	__le64 input_queue_good_pkts_out[IONIC_QOS_TC_MAX];
+	__le64 input_queue_err_pkts_in[IONIC_QOS_TC_MAX];
+	__le64 input_queue_fifo_depth[IONIC_QOS_TC_MAX];
+	__le64 input_queue_max_fifo_depth[IONIC_QOS_TC_MAX];
+	__le64 input_queue_peak_occupancy[IONIC_QOS_TC_MAX];
+	__le64 output_queue_buffer_occupancy[IONIC_QOS_TC_MAX];
+};
+
+/**
+ * enum ionic_port_type - Port types
+ * @IONIC_ETH_UNKNOWN:             Port type not configured
+ * @IONIC_ETH_HOST:                Port carries ethernet traffic (inband)
+ * @IONIC_ETH_HOST_MGMT:           Port carries mgmt traffic (out-of-band)
+ * @IONIC_ETH_MNIC_OOB_MGMT:
+ * @IONIC_ETH_MNIC_INTERNAL_MGMT:
+ * @IONIC_ETH_MNIC_INBAND_MGMT:
+ * @IONIC_ETH_MNIC_CPU:
+ * @IONIC_ETH_MNIC_LEARN:
+ * @IONIC_ETH_MNIC_CONTROL:
+ */
+enum ionic_port_type {
+	IONIC_ETH_UNKNOWN,
+	IONIC_ETH_HOST,
+	IONIC_ETH_HOST_MGMT,
+	IONIC_ETH_MNIC_OOB_MGMT,
+	IONIC_ETH_MNIC_INTERNAL_MGMT,
+	IONIC_ETH_MNIC_INBAND_MGMT,
+	IONIC_ETH_MNIC_CPU,
+	IONIC_ETH_MNIC_LEARN,
+	IONIC_ETH_MNIC_CONTROL,
 };
 
 /**
  * struct ionic_port_identity - port identity structure
  * @version:        identity structure version
- * @type:           type of port (enum port_type)
+ * @type:           type of port (enum ionic_port_type)
  * @num_lanes:      number of lanes for the port
  * @autoneg:        autoneg supported
  * @min_frame_size: minimum frame size supported
@@ -2104,22 +2489,31 @@ union ionic_port_identity {
 		u8     rsvd2[44];
 		union ionic_port_config config;
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
  * struct ionic_port_info - port info structure
- * @port_status:     port status
- * @port_stats:      port stats
+ * @config:          Port configuration data
+ * @status:          Port status data
+ * @stats:           Port statistics data
+ * @mgmt_stats:      Port management statistics data
+ * @port_pb_drop_stats:   uplink pb drop stats
  */
 struct ionic_port_info {
 	union ionic_port_config config;
 	struct ionic_port_status status;
-	struct ionic_port_stats stats;
+	union {
+		struct ionic_port_stats      stats;
+		struct ionic_mgmt_port_stats mgmt_stats;
+	};
+	/* room for pb_stats to start at 2k offset */
+	u8                          rsvd[760];
+	struct ionic_port_pb_stats  pb_stats;
 };
 
 /**
- * struct ionic_lif_stats
+ * struct ionic_lif_stats - LIF statistics structure
  */
 struct ionic_lif_stats {
 	/* RX */
@@ -2172,7 +2566,7 @@ struct ionic_lif_stats {
 	__le64 tx_queue_error;
 	__le64 tx_desc_fetch_error;
 	__le64 tx_desc_data_error;
-	__le64 rsvd9;
+	__le64 tx_queue_empty;
 	__le64 rsvd10;
 	__le64 rsvd11;
 	__le64 rsvd12;
@@ -2273,7 +2667,10 @@ struct ionic_lif_stats {
 };
 
 /**
- * struct ionic_lif_info - lif info structure
+ * struct ionic_lif_info - LIF info structure
+ * @config:	LIF configuration structure
+ * @status:	LIF status structure
+ * @stats:	LIF statistics structure
  */
 struct ionic_lif_info {
 	union ionic_lif_config config;
@@ -2298,6 +2695,9 @@ union ionic_dev_cmd {
 	struct ionic_port_getattr_cmd port_getattr;
 	struct ionic_port_setattr_cmd port_setattr;
 
+	struct ionic_vf_setattr_cmd vf_setattr;
+	struct ionic_vf_getattr_cmd vf_getattr;
+
 	struct ionic_lif_identify_cmd lif_identify;
 	struct ionic_lif_init_cmd lif_init;
 	struct ionic_lif_reset_cmd lif_reset;
@@ -2305,8 +2705,11 @@ union ionic_dev_cmd {
 	struct ionic_qos_identify_cmd qos_identify;
 	struct ionic_qos_init_cmd qos_init;
 	struct ionic_qos_reset_cmd qos_reset;
+	struct ionic_qos_clear_stats_cmd qos_clear_stats;
 
+	struct ionic_q_identify_cmd q_identify;
 	struct ionic_q_init_cmd q_init;
+	struct ionic_q_control_cmd q_control;
 };
 
 union ionic_dev_cmd_comp {
@@ -2327,6 +2730,9 @@ union ionic_dev_cmd_comp {
 	struct ionic_port_getattr_comp port_getattr;
 	struct ionic_port_setattr_comp port_setattr;
 
+	struct ionic_vf_setattr_comp vf_setattr;
+	struct ionic_vf_getattr_comp vf_getattr;
+
 	struct ionic_lif_identify_comp lif_identify;
 	struct ionic_lif_init_comp lif_init;
 	ionic_lif_reset_comp lif_reset;
@@ -2335,19 +2741,20 @@ union ionic_dev_cmd_comp {
 	ionic_qos_init_comp qos_init;
 	ionic_qos_reset_comp qos_reset;
 
+	struct ionic_q_identify_comp q_identify;
 	struct ionic_q_init_comp q_init;
 };
 
 /**
- * union dev_info - Device info register format (read-only)
- * @signature:       Signature value of 0x44455649 ('DEVI').
- * @version:         Current version of info.
- * @asic_type:       Asic type.
- * @asic_rev:        Asic revision.
- * @fw_status:       Firmware status.
- * @fw_heartbeat:    Firmware heartbeat counter.
- * @serial_num:      Serial number.
- * @fw_version:      Firmware version.
+ * union ionic_dev_info_regs - Device info register format (read-only)
+ * @signature:       Signature value of 0x44455649 ('DEVI')
+ * @version:         Current version of info
+ * @asic_type:       Asic type
+ * @asic_rev:        Asic revision
+ * @fw_status:       Firmware status
+ * @fw_heartbeat:    Firmware heartbeat counter
+ * @serial_num:      Serial number
+ * @fw_version:      Firmware version
  */
 union ionic_dev_info_regs {
 #define IONIC_DEVINFO_FWVERS_BUFLEN 32
@@ -2357,6 +2764,7 @@ union ionic_dev_info_regs {
 		u8     version;
 		u8     asic_type;
 		u8     asic_rev;
+#define IONIC_FW_STS_F_RUNNING	0x1
 		u8     fw_status;
 		u32    fw_heartbeat;
 		char   fw_version[IONIC_DEVINFO_FWVERS_BUFLEN];
@@ -2367,10 +2775,10 @@ union ionic_dev_info_regs {
 
 /**
  * union ionic_dev_cmd_regs - Device command register format (read-write)
- * @doorbell:        Device Cmd Doorbell, write-only.
+ * @doorbell:        Device Cmd Doorbell, write-only
  *                   Write a 1 to signal device to process cmd,
  *                   poll done for completion.
- * @done:            Done indicator, bit 0 == 1 when command is complete.
+ * @done:            Done indicator, bit 0 == 1 when command is complete
  * @cmd:             Opcode-specific command bytes
  * @comp:            Opcode-specific response bytes
  * @data:            Opcode-specific side-data
@@ -2383,12 +2791,12 @@ union ionic_dev_cmd_regs {
 		union ionic_dev_cmd_comp    comp;
 		u8                    rsvd[48];
 		u32                   data[478];
-	};
+	} __rte_packed;
 	u32 words[512];
 };
 
 /**
- * union ionic_dev_regs - Device register format in for bar 0 page 0
+ * union ionic_dev_regs - Device register format for bar 0 page 0
  * @info:            Device info registers
  * @devcmd:          Device command registers
  */
@@ -2396,13 +2804,14 @@ union ionic_dev_regs {
 	struct {
 		union ionic_dev_info_regs info;
 		union ionic_dev_cmd_regs  devcmd;
-	};
+	} __rte_packed;
 	__le32 words[1024];
 };
 
 union ionic_adminq_cmd {
 	struct ionic_admin_cmd cmd;
 	struct ionic_nop_cmd nop;
+	struct ionic_q_identify_cmd q_identify;
 	struct ionic_q_init_cmd q_init;
 	struct ionic_q_control_cmd q_control;
 	struct ionic_lif_setattr_cmd lif_setattr;
@@ -2419,6 +2828,7 @@ union ionic_adminq_cmd {
 union ionic_adminq_comp {
 	struct ionic_admin_comp comp;
 	struct ionic_nop_comp nop;
+	struct ionic_q_identify_comp q_identify;
 	struct ionic_q_init_comp q_init;
 	struct ionic_lif_setattr_comp lif_setattr;
 	struct ionic_lif_getattr_comp lif_getattr;
@@ -2444,14 +2854,14 @@ union ionic_adminq_comp {
 /**
  * struct ionic_doorbell - Doorbell register layout
  * @p_index: Producer index
- * @ring:    Selects the specific ring of the queue to update.
+ * @ring:    Selects the specific ring of the queue to update
  *           Type-specific meaning:
- *              ring=0: Default producer/consumer queue.
+ *              ring=0: Default producer/consumer queue
  *              ring=1: (CQ, EQ) Re-Arm queue.  RDMA CQs
  *              send events to EQs when armed.  EQs send
  *              interrupts when armed.
- * @qid:     The queue id selects the queue destination for the
- *           producer index and flags.
+ * @qid_lo:  Queue destination for the producer index and flags (low bits)
+ * @qid_hi:  Queue destination for the producer index and flags (high bits)
  */
 struct ionic_doorbell {
 	__le16 p_index;
@@ -2461,6 +2871,92 @@ struct ionic_doorbell {
 	u16    rsvd2;
 };
 
+/**
+ * struct ionic_intr_ctrl - Interrupt control register
+ * @coalescing_init:  Coalescing timer initial value, in
+ *                    device units.  Use @identity->intr_coal_mult
+ *                    and @identity->intr_coal_div to convert from
+ *                    usecs to device units:
+ *
+ *                      coal_init = coal_usecs * coal_mutl / coal_div
+ *
+ *                    When an interrupt is sent the interrupt
+ *                    coalescing timer current value
+ *                    (@coalescing_curr) is initialized with this
+ *                    value and begins counting down.  No more
+ *                    interrupts are sent until the coalescing
+ *                    timer reaches 0.  When @coalescing_init=0
+ *                    interrupt coalescing is effectively disabled
+ *                    and every interrupt assert results in an
+ *                    interrupt.  Reset value: 0
+ * @mask:             Interrupt mask.  When @mask=1 the interrupt
+ *                    resource will not send an interrupt.  When
+ *                    @mask=0 the interrupt resource will send an
+ *                    interrupt if an interrupt event is pending
+ *                    or on the next interrupt assertion event.
+ *                    Reset value: 1
+ * @int_credits:      Interrupt credits.  This register indicates
+ *                    how many interrupt events the hardware has
+ *                    sent.  When written by software this
+ *                    register atomically decrements @int_credits
+ *                    by the value written.  When @int_credits
+ *                    becomes 0 then the "pending interrupt" bit
+ *                    in the Interrupt Status register is cleared
+ *                    by the hardware and any pending but unsent
+ *                    interrupts are cleared.
+ *                    !!!IMPORTANT!!! This is a signed register.
+ * @flags:            Interrupt control flags
+ *                       @unmask -- When this bit is written with a 1
+ *                       the interrupt resource will set mask=0.
+ *                       @coal_timer_reset -- When this
+ *                       bit is written with a 1 the
+ *                       @coalescing_curr will be reloaded with
+ *                       @coalescing_init to reset the coalescing
+ *                       timer.
+ * @mask_on_assert:   Automatically mask on assertion.  When
+ *                    @mask_on_assert=1 the interrupt resource
+ *                    will set @mask=1 whenever an interrupt is
+ *                    sent.  When using interrupts in Legacy
+ *                    Interrupt mode the driver must select
+ *                    @mask_on_assert=0 for proper interrupt
+ *                    operation.
+ * @coalescing_curr:  Coalescing timer current value, in
+ *                    microseconds.  When this value reaches 0
+ *                    the interrupt resource is again eligible to
+ *                    send an interrupt.  If an interrupt event
+ *                    is already pending when @coalescing_curr
+ *                    reaches 0 the pending interrupt will be
+ *                    sent, otherwise an interrupt will be sent
+ *                    on the next interrupt assertion event.
+ */
+struct ionic_intr_ctrl {
+	u8 coalescing_init;
+	u8 rsvd[3];
+	u8 mask;
+	u8 rsvd2[3];
+	u16 int_credits;
+	u16 flags;
+#define INTR_F_UNMASK		0x0001
+#define INTR_F_TIMER_RESET	0x0002
+	u8 mask_on_assert;
+	u8 rsvd3[3];
+	u8 coalescing_curr;
+	u8 rsvd4[3];
+	u32 rsvd6[3];
+};
+
+#define IONIC_INTR_CTRL_REGS_MAX	2048
+#define IONIC_INTR_CTRL_COAL_MAX	0x3F
+
+#define intr_to_coal(intr_ctrl)		\
+		((void __iomem *)&(intr_ctrl)->coalescing_init)
+#define intr_to_mask(intr_ctrl)		\
+		((void __iomem *)&(intr_ctrl)->mask)
+#define intr_to_credits(intr_ctrl)	\
+		((void __iomem *)&(intr_ctrl)->int_credits)
+#define intr_to_mask_on_assert(intr_ctrl)\
+		((void __iomem *)&(intr_ctrl)->mask_on_assert)
+
 struct ionic_intr_status {
 	u32 status[2];
 };
@@ -2477,6 +2973,28 @@ union ionic_notifyq_comp {
 	struct ionic_log_event log;
 };
 
+/**
+ * struct ionic_eq_comp - Event queue completion descriptor
+ *
+ * @code:	Event code, see enum ionic_eq_comp_code
+ * @lif_index:	To which LIF the event pertains
+ * @qid:	To which queue id the event pertains
+ * @gen_color:	Event queue wrap counter, init 1, incr each wrap
+ */
+struct ionic_eq_comp {
+	__le16 code;
+	__le16 lif_index;
+	__le32 qid;
+	u8 rsvd[7];
+	u8 gen_color;
+};
+
+enum ionic_eq_comp_code {
+	IONIC_EQ_COMP_CODE_NONE = 0,
+	IONIC_EQ_COMP_CODE_RX_COMP = 1,
+	IONIC_EQ_COMP_CODE_TX_COMP = 2,
+};
+
 /* Deprecate */
 struct ionic_identity {
 	union ionic_drv_identity drv;
@@ -2484,8 +3002,7 @@ struct ionic_identity {
 	union ionic_lif_identity lif;
 	union ionic_port_identity port;
 	union ionic_qos_identity qos;
+	union ionic_q_identity txq;
 };
 
-#pragma pack(pop)
-
 #endif /* _IONIC_IF_H_ */
diff --git a/drivers/net/ionic/ionic_regs.h b/drivers/net/ionic/ionic_regs.h
index 3adc2bc7c..6ebc48d04 100644
--- a/drivers/net/ionic/ionic_regs.h
+++ b/drivers/net/ionic/ionic_regs.h
@@ -21,9 +21,6 @@ struct ionic_intr {
 	uint32_t rsvd[3];
 };
 
-#define IONIC_INTR_CTRL_REGS_MAX	2048
-#define IONIC_INTR_CTRL_COAL_MAX	0x3F
-
 /** enum ionic_intr_mask_vals - valid values for mask and mask_assert.
  * @IONIC_INTR_MASK_CLEAR:	unmask interrupt.
  * @IONIC_INTR_MASK_SET:	mask interrupt.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v2 3/9] net/ionic: update documentation and MAINTAINERS
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (11 preceding siblings ...)
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 2/9] net/ionic: update interface file to the latest version Andrew Boyer
@ 2020-12-03 20:34 ` Andrew Boyer
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 4/9] net/ionic: check for cmd completion more frequently Andrew Boyer
                   ` (5 subsequent siblings)
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-03 20:34 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

The UNMAINTAINED flag will be removed in a future patch.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 MAINTAINERS                        |  3 ++-
 doc/guides/nics/features/ionic.ini |  2 ++
 doc/guides/nics/ionic.rst          | 13 +++++++------
 3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index eafe9f8c4..6534983c1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -841,7 +841,8 @@ F: drivers/net/pfe/
 F: doc/guides/nics/features/pfe.ini
 
 Pensando ionic - UNMAINTAINED
-M: Alfredo Cardigliano <cardigliano@ntop.org>
+M: Andrew Boyer <aboyer@pensando.io>
+M: Pensando Drivers <drivers@pensando.io>
 F: drivers/net/ionic/
 F: doc/guides/nics/ionic.rst
 F: doc/guides/nics/features/ionic.ini
diff --git a/doc/guides/nics/features/ionic.ini b/doc/guides/nics/features/ionic.ini
index 083c7bd99..dd29dbed6 100644
--- a/doc/guides/nics/features/ionic.ini
+++ b/doc/guides/nics/features/ionic.ini
@@ -8,6 +8,7 @@ Speed capabilities   = Y
 Link status          = Y
 Link status event    = Y
 Queue start/stop     = Y
+Lock-free Tx queue   = Y
 MTU update           = Y
 Jumbo frame          = Y
 Scattered Rx         = Y
@@ -19,6 +20,7 @@ Unicast MAC filter   = Y
 RSS hash             = Y
 RSS key update       = Y
 RSS reta update      = Y
+SR-IOV               = Y
 VLAN filter          = Y
 VLAN offload         = Y
 Flow control         = Y
diff --git a/doc/guides/nics/ionic.rst b/doc/guides/nics/ionic.rst
index fd32926bf..0b78cfbac 100644
--- a/doc/guides/nics/ionic.rst
+++ b/doc/guides/nics/ionic.rst
@@ -1,5 +1,5 @@
 ..  SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
-    Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
+    Copyright(c) 2018-2020 Pensando Systems, Inc. All rights reserved.
 
 IONIC Driver
 ============
@@ -7,15 +7,16 @@ IONIC Driver
 The ionic driver provides support for Pensando server adapters.
 It currently supports the below models:
 
-- `Naples DSC-25 <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>`_
-- `Naples DSC-100 <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>`_
+- DSC-25 dual-port 25G Distributed Services Card
+- DSC-100 dual-port 100G Distributed Services Card
 
-Please visit https://pensando.io for more information.
+Please visit the Pensando web site at https://pensando.io for more information.
+The `Documents <https://pensando.io/documents/>`_ page contains Product Briefs and other product information.
 
 Identifying the Adapter
 -----------------------
 
-To find if one or more Pensando PCI Ethernet devices are installed
+To determine if one or more Pensando DSC Ethernet devices are installed
 on the host, check for the PCI devices:
 
    .. code-block:: console
@@ -28,6 +29,6 @@ on the host, check for the PCI devices:
 Building DPDK
 -------------
 
-The ionic PMD driver supports UIO and VFIO, please refer to the
+The ionic PMD supports UIO and VFIO. Please refer to the
 :ref:`DPDK documentation that comes with the DPDK suite <linux_gsg>`
 for instructions on how to build DPDK.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v2 4/9] net/ionic: check for cmd completion more frequently
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (12 preceding siblings ...)
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
@ 2020-12-03 20:34 ` Andrew Boyer
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 5/9] net/ionic: remove some unused fields Andrew Boyer
                   ` (4 subsequent siblings)
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-03 20:34 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer, Neel Patel

This reduces the startup time a bit.

Signed-off-by: Neel Patel <neel@pensando.io>
Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_dev.h   |  4 +++-
 drivers/net/ionic/ionic_main.c  | 36 ++++++++++++++++-----------------
 drivers/net/ionic/ionic_osdep.h | 10 ---------
 3 files changed, 21 insertions(+), 29 deletions(-)

diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index 532255a60..dc64a6d28 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -20,7 +20,9 @@
 
 #define IONIC_LIFS_MAX			1024
 
-#define IONIC_DEVCMD_TIMEOUT	30 /* devcmd_timeout */
+#define IONIC_DEVCMD_TIMEOUT		5	/* devcmd_timeout */
+#define IONIC_DEVCMD_CHECK_PERIOD_US	10	/* devcmd status chk period */
+
 #define	IONIC_ALIGN             4096
 
 struct ionic_adapter;
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index 2ade213d2..f77bddaa4 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -144,12 +144,12 @@ static int
 ionic_wait_ctx_for_completion(struct ionic_lif *lif, struct ionic_qcq *qcq,
 		struct ionic_admin_ctx *ctx, unsigned long max_wait)
 {
-	unsigned long step_msec = 1;
-	unsigned int max_wait_msec = max_wait * 1000;
-	unsigned long elapsed_msec = 0;
+	unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US;
+	unsigned long max_wait_usec = max_wait * 1000000L;
+	unsigned long elapsed_usec = 0;
 	int budget = 8;
 
-	while (ctx->pending_work && elapsed_msec < max_wait_msec) {
+	while (ctx->pending_work && elapsed_usec < max_wait_usec) {
 		/*
 		 * Locking here as adminq is served inline (this could be called
 		 * from multiple places)
@@ -160,8 +160,8 @@ ionic_wait_ctx_for_completion(struct ionic_lif *lif, struct ionic_qcq *qcq,
 
 		rte_spinlock_unlock(&lif->adminq_service_lock);
 
-		msec_delay(step_msec);
-		elapsed_msec += step_msec;
+		rte_delay_us_block(step_usec);
+		elapsed_usec += step_usec;
 	}
 
 	return (!ctx->pending_work);
@@ -195,9 +195,9 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 static int
 ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait)
 {
-	unsigned long step_msec = 100;
-	unsigned int max_wait_msec = max_wait * 1000;
-	unsigned long elapsed_msec = 0;
+	unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US;
+	unsigned long max_wait_usec = max_wait * 1000000L;
+	unsigned long elapsed_usec = 0;
 	int done;
 
 	/* Wait for dev cmd to complete.. but no more than max_wait sec */
@@ -205,20 +205,20 @@ ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait)
 	do {
 		done = ionic_dev_cmd_done(idev);
 		if (done) {
-			IONIC_PRINT(DEBUG, "DEVCMD %d done took %ld msecs",
-				idev->dev_cmd->cmd.cmd.opcode,
-				elapsed_msec);
+			IONIC_PRINT(DEBUG, "DEVCMD %d done took %ld usecs",
+				ioread8(&idev->dev_cmd->cmd.cmd.opcode),
+				elapsed_usec);
 			return 0;
 		}
 
-		msec_delay(step_msec);
+		rte_delay_us_block(step_usec);
 
-		elapsed_msec += step_msec;
-	} while (elapsed_msec < max_wait_msec);
+		elapsed_usec += step_usec;
+	} while (elapsed_usec < max_wait_usec);
 
-	IONIC_PRINT(DEBUG, "DEVCMD %d timeout after %ld msecs",
-		idev->dev_cmd->cmd.cmd.opcode,
-		elapsed_msec);
+	IONIC_PRINT(ERR, "DEVCMD %d timeout after %ld usecs",
+		ioread8(&idev->dev_cmd->cmd.cmd.opcode),
+		elapsed_usec);
 
 	return -ETIMEDOUT;
 }
diff --git a/drivers/net/ionic/ionic_osdep.h b/drivers/net/ionic/ionic_osdep.h
index e04bb8f65..a55d59918 100644
--- a/drivers/net/ionic/ionic_osdep.h
+++ b/drivers/net/ionic/ionic_osdep.h
@@ -20,13 +20,8 @@
 
 #include "ionic_logs.h"
 
-#define DELAY(x) rte_delay_us(x)
-#define usec_delay(x) DELAY(x)
-#define msec_delay(x) DELAY(1000 * (x))
-
 #define BIT(nr)            (1UL << (nr))
 #define BIT_ULL(nr)        (1ULL << (nr))
-#define BITS_TO_LONGS(nr)  div_round_up(nr, 8 * sizeof(long))
 
 #ifndef PAGE_SHIFT
 #define PAGE_SHIFT      12
@@ -44,11 +39,6 @@ typedef uint16_t __le16;
 typedef uint32_t __le32;
 typedef uint64_t __le64;
 
-static inline uint32_t div_round_up(uint32_t n, uint32_t d)
-{
-	return (n + d - 1) / d;
-}
-
 #define ioread8(reg)		rte_read8(reg)
 #define ioread32(reg)		rte_read32(reg)
 #define iowrite8(value, reg)	rte_write8(value, reg)
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v2 5/9] net/ionic: remove some unused fields
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (13 preceding siblings ...)
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 4/9] net/ionic: check for cmd completion more frequently Andrew Boyer
@ 2020-12-03 20:34 ` Andrew Boyer
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 6/9] net/ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
                   ` (3 subsequent siblings)
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-03 20:34 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

This conserves resources.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic.h        |  1 -
 drivers/net/ionic/ionic_dev.c    |  5 +----
 drivers/net/ionic/ionic_dev.h    |  7 +------
 drivers/net/ionic/ionic_ethdev.c |  2 --
 drivers/net/ionic/ionic_lif.c    | 22 ++++++----------------
 drivers/net/ionic/ionic_lif.h    |  2 --
 drivers/net/ionic/ionic_regs.h   |  6 ------
 7 files changed, 8 insertions(+), 37 deletions(-)

diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h
index 1538df309..a93110326 100644
--- a/drivers/net/ionic/ionic.h
+++ b/drivers/net/ionic/ionic.h
@@ -59,7 +59,6 @@ struct ionic_adapter {
 	uint32_t link_speed;
 	uint32_t nintrs;
 	bool intrs[IONIC_INTR_CTRL_REGS_MAX];
-	bool is_mgmt_nic;
 	bool link_up;
 	char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN];
 	struct rte_pci_device *pci_dev;
diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c
index 5c2820b7a..fc68f5c74 100644
--- a/drivers/net/ionic/ionic_dev.c
+++ b/drivers/net/ionic/ionic_dev.c
@@ -65,7 +65,6 @@ ionic_dev_setup(struct ionic_adapter *adapter)
 	}
 
 	idev->db_pages = bar->vaddr;
-	idev->phy_db_pages = bar->bus_addr;
 
 	return 0;
 }
@@ -343,7 +342,6 @@ ionic_dev_cmd_adminq_init(struct ionic_dev *idev,
 		.q_init.type = q->type,
 		.q_init.index = q->index,
 		.q_init.flags = IONIC_QINIT_F_ENA,
-		.q_init.pid = q->pid,
 		.q_init.intr_index = intr_index,
 		.q_init.ring_size = rte_log2_u32(q->num_descs),
 		.q_init.ring_base = q->base_pa,
@@ -419,7 +417,7 @@ ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,
 int
 ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	     struct ionic_queue *q, uint32_t index, uint32_t num_descs,
-	     size_t desc_size, size_t sg_desc_size, uint32_t pid)
+	     size_t desc_size, size_t sg_desc_size)
 {
 	uint32_t ring_size;
 
@@ -439,7 +437,6 @@ ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	q->sg_desc_size = sg_desc_size;
 	q->head_idx = 0;
 	q->tail_idx = 0;
-	q->pid = pid;
 
 	return 0;
 }
diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index dc64a6d28..7150f7f2c 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -120,10 +120,7 @@ struct ionic_dev {
 	union ionic_dev_cmd_regs __iomem *dev_cmd;
 
 	struct ionic_doorbell __iomem *db_pages;
-	rte_iova_t phy_db_pages;
-
 	struct ionic_intr __iomem *intr_ctrl;
-
 	struct ionic_intr_status __iomem *intr_status;
 
 	struct ionic_port_info *port_info;
@@ -163,11 +160,9 @@ struct ionic_queue {
 	uint32_t num_descs;
 	uint32_t desc_size;
 	uint32_t sg_desc_size;
-	uint32_t pid;
 	uint32_t qid;
 	uint32_t qtype;
 	struct ionic_doorbell __iomem *db;
-	void *nop_desc;
 };
 
 #define IONIC_INTR_INDEX_NOT_ASSIGNED	(-1)
@@ -257,7 +252,7 @@ uint32_t ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,
 
 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	struct ionic_queue *q, uint32_t index, uint32_t num_descs,
-	size_t desc_size, size_t sg_desc_size, uint32_t pid);
+	size_t desc_size, size_t sg_desc_size);
 void ionic_q_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
 void ionic_q_sg_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
 void ionic_q_flush(struct ionic_queue *q);
diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index 600333e20..cd79f250e 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -1178,8 +1178,6 @@ eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 		goto err_free_adapter;
 	}
 
-	adapter->is_mgmt_nic = (pci_dev->id.device_id == IONIC_DEV_ID_ETH_MGMT);
-
 	adapter->num_bars = 0;
 	for (i = 0; i < PCI_MAX_RESOURCE && i < IONIC_BARS_MAX; i++) {
 		resource = &pci_dev->mem_resource[i];
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 60a5f3d53..bc15d75fd 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -536,8 +536,6 @@ ionic_lif_change_mtu(struct ionic_lif *lif, int new_mtu)
 	if (err)
 		return err;
 
-	lif->mtu = new_mtu;
-
 	return 0;
 }
 
@@ -583,7 +581,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 		uint32_t desc_size,
 		uint32_t cq_desc_size,
 		uint32_t sg_desc_size,
-		uint32_t pid, struct ionic_qcq **qcq)
+		struct ionic_qcq **qcq)
 {
 	struct ionic_dev *idev = &lif->adapter->idev;
 	struct ionic_qcq *new;
@@ -633,7 +631,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 	new->q.type = type;
 
 	err = ionic_q_init(lif, idev, &new->q, index, num_descs,
-		desc_size, sg_desc_size, pid);
+		desc_size, sg_desc_size);
 	if (err) {
 		IONIC_PRINT(ERR, "Queue initialization failed");
 		return err;
@@ -734,7 +732,7 @@ ionic_rx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t nrxq_descs,
 		sizeof(struct ionic_rxq_desc),
 		sizeof(struct ionic_rxq_comp),
 		sizeof(struct ionic_rxq_sg_desc),
-		lif->kern_pid, &lif->rxqcqs[index]);
+		&lif->rxqcqs[index]);
 	if (err)
 		return err;
 
@@ -756,7 +754,7 @@ ionic_tx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t ntxq_descs,
 		sizeof(struct ionic_txq_desc),
 		sizeof(struct ionic_txq_comp),
 		sizeof(struct ionic_txq_sg_desc),
-		lif->kern_pid, &lif->txqcqs[index]);
+		&lif->txqcqs[index]);
 	if (err)
 		return err;
 
@@ -777,7 +775,7 @@ ionic_admin_qcq_alloc(struct ionic_lif *lif)
 		sizeof(struct ionic_admin_cmd),
 		sizeof(struct ionic_admin_comp),
 		0,
-		lif->kern_pid, &lif->adminqcq);
+		&lif->adminqcq);
 	if (err)
 		return err;
 
@@ -798,7 +796,7 @@ ionic_notify_qcq_alloc(struct ionic_lif *lif)
 		sizeof(struct ionic_notifyq_cmd),
 		sizeof(union ionic_notifyq_comp),
 		0,
-		lif->kern_pid, &lif->notifyqcq);
+		&lif->notifyqcq);
 	if (err)
 		return err;
 
@@ -831,8 +829,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
 	rte_spinlock_init(&lif->adminq_lock);
 	rte_spinlock_init(&lif->adminq_service_lock);
 
-	lif->kern_pid = 0;
-
 	dbpage_num = ionic_db_page_num(lif, 0);
 
 	lif->kern_dbpage = ionic_bus_map_dbpage(adapter, dbpage_num);
@@ -1211,13 +1207,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
 			.index = q->index,
 			.flags = (IONIC_QINIT_F_IRQ | IONIC_QINIT_F_ENA),
 			.intr_index = qcq->intr.index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 		}
 	};
 
-	IONIC_PRINT(DEBUG, "notifyq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "notifyq_init.index %d",
 		ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
@@ -1320,7 +1314,6 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 			.index = q->index,
 			.flags = IONIC_QINIT_F_SG,
 			.intr_index = cq->bound_intr->index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 			.cq_ring_base = cq->base_pa,
@@ -1329,7 +1322,6 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "txq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "txq_init.index %d", ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "txq_init.ring_base 0x%" PRIx64 "",
 		ctx.cmd.q_init.ring_base);
@@ -1368,7 +1360,6 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 			.index = q->index,
 			.flags = IONIC_QINIT_F_SG,
 			.intr_index = cq->bound_intr->index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 			.cq_ring_base = cq->base_pa,
@@ -1377,7 +1368,6 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "rxq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "rxq_init.index %d", ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "rxq_init.ring_base 0x%" PRIx64 "",
 		ctx.cmd.q_init.ring_base);
diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 425762d65..4e091719f 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -84,13 +84,11 @@ struct ionic_lif {
 	struct ionic_adapter *adapter;
 	struct rte_eth_dev *eth_dev;
 	uint16_t port_id;  /**< Device port identifier */
-	uint16_t mtu;
 	uint32_t index;
 	uint32_t hw_index;
 	uint32_t state;
 	uint32_t ntxqcqs;
 	uint32_t nrxqcqs;
-	uint32_t kern_pid;
 	rte_spinlock_t adminq_lock;
 	rte_spinlock_t adminq_service_lock;
 	struct ionic_qcq *adminqcq;
diff --git a/drivers/net/ionic/ionic_regs.h b/drivers/net/ionic/ionic_regs.h
index 6ebc48d04..3bdec3424 100644
--- a/drivers/net/ionic/ionic_regs.h
+++ b/drivers/net/ionic/ionic_regs.h
@@ -130,10 +130,4 @@ enum ionic_dbell_bits {
 	IONIC_DBELL_INDEX_MASK		= 0xffff,
 };
 
-static inline void
-ionic_dbell_ring(u64 __iomem *db_page, int qtype, u64 val)
-{
-	writeq(val, &db_page[qtype]);
-}
-
 #endif /* _IONIC_REGS_H_ */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v2 6/9] net/ionic: convert 'deferred' boolean to a flag bit
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (14 preceding siblings ...)
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 5/9] net/ionic: remove some unused fields Andrew Boyer
@ 2020-12-03 20:34 ` Andrew Boyer
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 7/9] net/ionic: warn if loopback mode is requested Andrew Boyer
                   ` (2 subsequent siblings)
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-03 20:34 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

This conserves resources.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_lif.c  |  4 ++--
 drivers/net/ionic/ionic_lif.h  |  2 +-
 drivers/net/ionic/ionic_rxtx.c | 10 ++++++----
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index bc15d75fd..2e33fb8d9 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -1590,7 +1590,7 @@ ionic_lif_start(struct ionic_lif *lif)
 
 	for (i = 0; i < lif->nrxqcqs; i++) {
 		struct ionic_qcq *rxq = lif->rxqcqs[i];
-		if (!rxq->deferred_start) {
+		if (!(rxq->flags & IONIC_QCQ_F_DEFERRED)) {
 			err = ionic_dev_rx_queue_start(lif->eth_dev, i);
 
 			if (err)
@@ -1600,7 +1600,7 @@ ionic_lif_start(struct ionic_lif *lif)
 
 	for (i = 0; i < lif->ntxqcqs; i++) {
 		struct ionic_qcq *txq = lif->txqcqs[i];
-		if (!txq->deferred_start) {
+		if (!(txq->flags & IONIC_QCQ_F_DEFERRED)) {
 			err = ionic_dev_tx_queue_start(lif->eth_dev, i);
 
 			if (err)
diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 4e091719f..8e2b42443 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -50,6 +50,7 @@ struct ionic_rx_stats {
 #define IONIC_QCQ_F_SG		BIT(1)
 #define IONIC_QCQ_F_INTR	BIT(2)
 #define IONIC_QCQ_F_NOTIFYQ	BIT(3)
+#define IONIC_QCQ_F_DEFERRED	BIT(4)
 
 /* Queue / Completion Queue */
 struct ionic_qcq {
@@ -68,7 +69,6 @@ struct ionic_qcq {
 	uint32_t total_size;
 	uint32_t flags;
 	struct ionic_intr_info intr;
-	bool deferred_start;
 };
 
 #define IONIC_Q_TO_QCQ(q)	container_of(q, struct ionic_qcq, q)
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index 2592f5cab..b953aff49 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -64,7 +64,7 @@ ionic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
 
 	qinfo->nb_desc = q->num_descs;
 	qinfo->conf.offloads = txq->offloads;
-	qinfo->conf.tx_deferred_start = txq->deferred_start;
+	qinfo->conf.tx_deferred_start = txq->flags & IONIC_QCQ_F_DEFERRED;
 }
 
 static inline void __rte_cold
@@ -196,7 +196,8 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	}
 
 	/* Do not start queue with rte_eth_dev_start() */
-	txq->deferred_start = tx_conf->tx_deferred_start;
+	if (tx_conf->tx_deferred_start)
+		txq->flags |= IONIC_QCQ_F_DEFERRED;
 
 	txq->offloads = offloads;
 
@@ -605,7 +606,7 @@ ionic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
 	qinfo->mp = rxq->mb_pool;
 	qinfo->scattered_rx = dev->data->scattered_rx;
 	qinfo->nb_desc = q->num_descs;
-	qinfo->conf.rx_deferred_start = rxq->deferred_start;
+	qinfo->conf.rx_deferred_start = rxq->flags & IONIC_QCQ_F_DEFERRED;
 	qinfo->conf.offloads = rxq->offloads;
 }
 
@@ -703,7 +704,8 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	 */
 
 	/* Do not start queue with rte_eth_dev_start() */
-	rxq->deferred_start = rx_conf->rx_deferred_start;
+	if (rx_conf->rx_deferred_start)
+		rxq->flags |= IONIC_QCQ_F_DEFERRED;
 
 	rxq->offloads = offloads;
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v2 7/9] net/ionic: warn if loopback mode is requested
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (15 preceding siblings ...)
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 6/9] net/ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
@ 2020-12-03 20:34 ` Andrew Boyer
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 9/9] net/ionic: minor logging fixups Andrew Boyer
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-03 20:34 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

The ionic FW does not support loopback mode at this time.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_ethdev.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index cd79f250e..ce6ca9671 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -919,6 +919,9 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
 		return -EINVAL;
 	}
 
+	if (dev_conf->lpbk_mode)
+		IONIC_PRINT(WARNING, "Loopback mode not supported");
+
 	err = ionic_lif_start(lif);
 	if (err) {
 		IONIC_PRINT(ERR, "Cannot start LIF: %d", err);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v2 8/9] net/ionic: minor refactorings and helper variables
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (16 preceding siblings ...)
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 7/9] net/ionic: warn if loopback mode is requested Andrew Boyer
@ 2020-12-03 20:34 ` Andrew Boyer
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 9/9] net/ionic: minor logging fixups Andrew Boyer
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-03 20:34 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

This makes the code clearer and conserves resources.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_ethdev.c |  5 ++---
 drivers/net/ionic/ionic_lif.c    | 15 ++++++++++-----
 drivers/net/ionic/ionic_main.c   | 18 +++++++-----------
 3 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index ce6ca9671..a1c35ace3 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -901,7 +901,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
 	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 	struct ionic_adapter *adapter = lif->adapter;
 	struct ionic_dev *idev = &adapter->idev;
-	uint32_t allowed_speeds;
+	uint32_t speed, allowed_speeds;
 	int err;
 
 	IONIC_PRINT_CALL();
@@ -929,8 +929,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
 	}
 
 	if (eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED) {
-		uint32_t speed = ionic_parse_link_speeds(dev_conf->link_speeds);
-
+		speed = ionic_parse_link_speeds(dev_conf->link_speeds);
 		if (speed)
 			ionic_dev_cmd_port_speed(idev, speed);
 	}
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 2e33fb8d9..722a89565 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -77,11 +77,14 @@ void
 ionic_lif_reset(struct ionic_lif *lif)
 {
 	struct ionic_dev *idev = &lif->adapter->idev;
+	int err;
 
 	IONIC_PRINT_CALL();
 
 	ionic_dev_cmd_lif_reset(idev, lif->index);
-	ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
+	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
+	if (err)
+		IONIC_PRINT(WARNING, "Failed to reset lif");
 }
 
 static void
@@ -305,10 +308,11 @@ ionic_dev_add_mac(struct rte_eth_dev *eth_dev,
 }
 
 void
-ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused)
+ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index)
 {
 	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 	struct ionic_adapter *adapter = lif->adapter;
+	struct rte_ether_addr *mac_addr;
 
 	IONIC_PRINT_CALL();
 
@@ -319,11 +323,12 @@ ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused)
 		return;
 	}
 
-	if (!rte_is_valid_assigned_ether_addr(&eth_dev->data->mac_addrs[index]))
+	mac_addr = &eth_dev->data->mac_addrs[index];
+
+	if (!rte_is_valid_assigned_ether_addr(mac_addr))
 		return;
 
-	ionic_lif_addr_del(lif, (const uint8_t *)
-		&eth_dev->data->mac_addrs[index]);
+	ionic_lif_addr_del(lif, (const uint8_t *)mac_addr);
 }
 
 int
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index f77bddaa4..92cf0f398 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -188,8 +188,7 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 	done = ionic_wait_ctx_for_completion(lif, qcq, ctx,
 		IONIC_DEVCMD_TIMEOUT);
 
-	err = ionic_adminq_check_err(ctx, !done /* timed out */);
-	return err;
+	return ionic_adminq_check_err(ctx, !done /* timed out */);
 }
 
 static int
@@ -241,10 +240,11 @@ ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait)
 	int err;
 
 	err = ionic_dev_cmd_wait(idev, max_wait);
-	if (err)
-		return err;
 
-	return ionic_dev_cmd_check_error(idev);
+	if (!err)
+		err = ionic_dev_cmd_check_error(idev);
+
+	return err;
 }
 
 int
@@ -299,22 +299,18 @@ int
 ionic_init(struct ionic_adapter *adapter)
 {
 	struct ionic_dev *idev = &adapter->idev;
-	int err;
 
 	ionic_dev_cmd_init(idev);
-	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
-	return err;
+	return ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 }
 
 int
 ionic_reset(struct ionic_adapter *adapter)
 {
 	struct ionic_dev *idev = &adapter->idev;
-	int err;
 
 	ionic_dev_cmd_reset(idev);
-	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
-	return err;
+	return ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 }
 
 int
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v2 9/9] net/ionic: minor logging fixups
  2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
                   ` (17 preceding siblings ...)
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
@ 2020-12-03 20:34 ` Andrew Boyer
  18 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-03 20:34 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

Expose ionic_opcode_to_str() so it can be used for dev cmds, too.
Store the device name in struct adapter.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic.h         |  1 +
 drivers/net/ionic/ionic_dev.c     |  5 +++
 drivers/net/ionic/ionic_dev.h     |  2 +
 drivers/net/ionic/ionic_ethdev.c  |  4 +-
 drivers/net/ionic/ionic_lif.c     | 61 +++++++++++++++----------------
 drivers/net/ionic/ionic_mac_api.c |  4 +-
 drivers/net/ionic/ionic_main.c    | 32 +++++++++-------
 drivers/net/ionic/ionic_rxtx.c    | 41 +++++++++------------
 8 files changed, 78 insertions(+), 72 deletions(-)

diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h
index a93110326..7ad0ab69e 100644
--- a/drivers/net/ionic/ionic.h
+++ b/drivers/net/ionic/ionic.h
@@ -48,6 +48,7 @@ struct ionic_hw {
 struct ionic_adapter {
 	struct ionic_hw hw;
 	struct ionic_dev idev;
+	const char *name;
 	struct ionic_dev_bar bars[IONIC_BARS_MAX];
 	struct ionic_identity	ident;
 	struct ionic_lif *lifs[IONIC_LIFS_MAX];
diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c
index fc68f5c74..f32966521 100644
--- a/drivers/net/ionic/ionic_dev.c
+++ b/drivers/net/ionic/ionic_dev.c
@@ -102,6 +102,9 @@ ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd)
 	uint32_t cmd_size = sizeof(cmd->words) /
 		sizeof(cmd->words[0]);
 
+	IONIC_PRINT(DEBUG, "Sending %s (%d) via dev_cmd",
+		    ionic_opcode_to_str(cmd->cmd.opcode), cmd->cmd.opcode);
+
 	for (i = 0; i < cmd_size; i++)
 		iowrite32(cmd->words[i], &idev->dev_cmd->cmd.words[i]);
 
@@ -348,6 +351,8 @@ ionic_dev_cmd_adminq_init(struct ionic_dev *idev,
 		.q_init.cq_ring_base = cq->base_pa,
 	};
 
+	IONIC_PRINT(DEBUG, "adminq.q_init.ver %u", cmd.q_init.ver);
+
 	ionic_dev_cmd_go(idev, &cmd);
 }
 
diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index 7150f7f2c..026c4a9f3 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -205,6 +205,8 @@ struct ionic_qcq;
 void ionic_intr_init(struct ionic_dev *idev, struct ionic_intr_info *intr,
 	unsigned long index);
 
+const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode);
+
 int ionic_dev_setup(struct ionic_adapter *adapter);
 
 void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);
diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index a1c35ace3..298b9eb86 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -571,7 +571,7 @@ ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,
 
 	if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
 		IONIC_PRINT(ERR, "The size of hash lookup table configured "
-			"(%d) doesn't match the number hardware can supported "
+			"(%d) doesn't match the number hardware can support "
 			"(%d)",
 			reta_size, ident->lif.eth.rss_ind_tbl_sz);
 		return -EINVAL;
@@ -605,7 +605,7 @@ ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,
 
 	if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
 		IONIC_PRINT(ERR, "The size of hash lookup table configured "
-			"(%d) doesn't match the number hardware can supported "
+			"(%d) doesn't match the number hardware can support "
 			"(%d)",
 			reta_size, ident->lif.eth.rss_ind_tbl_sz);
 		return -EINVAL;
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 722a89565..e4816a22c 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -84,7 +84,7 @@ ionic_lif_reset(struct ionic_lif *lif)
 	ionic_dev_cmd_lif_reset(idev, lif->index);
 	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 	if (err)
-		IONIC_PRINT(WARNING, "Failed to reset lif");
+		IONIC_PRINT(WARNING, "Failed to reset %s", lif->name);
 }
 
 static void
@@ -554,7 +554,7 @@ ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr)
 	/*
 	 * Note: interrupt handler is called for index = 0 only
 	 * (we use interrupts for the notifyq only anyway,
-	 * which hash index = 0)
+	 * which has index = 0)
 	 */
 
 	for (index = 0; index < adapter->nintrs; index++)
@@ -687,8 +687,8 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 		ionic_q_sg_map(&new->q, sg_base, sg_base_pa);
 	}
 
-	IONIC_PRINT(DEBUG, "Q-Base-PA = %ju CQ-Base-PA = %ju "
-		"SG-base-PA = %ju",
+	IONIC_PRINT(DEBUG, "Q-Base-PA = %#jx CQ-Base-PA = %#jx "
+		"SG-base-PA = %#jx",
 		q_base_pa, cq_base_pa, sg_base_pa);
 
 	ionic_q_map(&new->q, q_base, q_base_pa);
@@ -827,7 +827,9 @@ ionic_lif_alloc(struct ionic_lif *lif)
 	int dbpage_num;
 	int err;
 
-	snprintf(lif->name, sizeof(lif->name), "lif%u", lif->index);
+	strncpy(lif->name, lif->eth_dev->data->name, sizeof(lif->name) - 1);
+
+	IONIC_PRINT(DEBUG, "LIF: %s", lif->name);
 
 	IONIC_PRINT(DEBUG, "Allocating Lif Info");
 
@@ -868,8 +870,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
 
 	IONIC_PRINT(DEBUG, "Allocating Admin Queue");
 
-	IONIC_PRINT(DEBUG, "Allocating Admin Queue");
-
 	err = ionic_admin_qcq_alloc(lif);
 	if (err) {
 		IONIC_PRINT(ERR, "Cannot allocate admin queue");
@@ -1217,12 +1217,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
 		}
 	};
 
-	IONIC_PRINT(DEBUG, "notifyq_init.index %d",
-		ctx.cmd.q_init.index);
-	IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
-		ctx.cmd.q_init.ring_base);
+	IONIC_PRINT(DEBUG, "notifyq_init.index %d", q->index);
+	IONIC_PRINT(DEBUG, "notifyq_init.ring_base %#jx", q->base_pa);
 	IONIC_PRINT(DEBUG, "notifyq_init.ring_size %d",
 		ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "notifyq_init.ver %u", ctx.cmd.q_init.ver);
 
 	err = ionic_adminq_post_wait(lif, &ctx);
 	if (err)
@@ -1327,11 +1326,11 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "txq_init.index %d", ctx.cmd.q_init.index);
-	IONIC_PRINT(DEBUG, "txq_init.ring_base 0x%" PRIx64 "",
-		ctx.cmd.q_init.ring_base);
-	IONIC_PRINT(DEBUG, "txq_init.ring_size %d",
-		ctx.cmd.q_init.ring_size);
+
+	IONIC_PRINT(DEBUG, "txq_init.index %d", q->index);
+	IONIC_PRINT(DEBUG, "txq_init.ring_base %#jx", q->base_pa);
+	IONIC_PRINT(DEBUG, "txq_init.ring_size %d", ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "txq_init.ver %u", ctx.cmd.q_init.ver);
 
 	err = ionic_adminq_post_wait(qcq->lif, &ctx);
 	if (err)
@@ -1373,11 +1372,10 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "rxq_init.index %d", ctx.cmd.q_init.index);
-	IONIC_PRINT(DEBUG, "rxq_init.ring_base 0x%" PRIx64 "",
-		ctx.cmd.q_init.ring_base);
-	IONIC_PRINT(DEBUG, "rxq_init.ring_size %d",
-		ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "rxq_init.index %d", q->index);
+	IONIC_PRINT(DEBUG, "rxq_init.ring_base %#jx", q->base_pa);
+	IONIC_PRINT(DEBUG, "rxq_init.ring_size %d", ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "rxq_init.ver %u", ctx.cmd.q_init.ver);
 
 	err = ionic_adminq_post_wait(qcq->lif, &ctx);
 	if (err)
@@ -1449,7 +1447,7 @@ ionic_lif_set_name(struct ionic_lif *lif)
 	};
 
 	snprintf(ctx.cmd.lif_setattr.name, sizeof(ctx.cmd.lif_setattr.name),
-		"%d", lif->port_id);
+		"%s", lif->name);
 
 	ionic_adminq_post_wait(lif, &ctx);
 }
@@ -1643,23 +1641,23 @@ ionic_lif_identify(struct ionic_adapter *adapter)
 	for (i = 0; i < nwords; i++)
 		ident->lif.words[i] = ioread32(&idev->dev_cmd->data[i]);
 
-	IONIC_PRINT(INFO, "capabilities 0x%" PRIx64 " ",
+	IONIC_PRINT(INFO, "capabilities %#jx",
 		ident->lif.capabilities);
 
-	IONIC_PRINT(INFO, "eth.max_ucast_filters 0x%" PRIx32 " ",
+	IONIC_PRINT(INFO, "eth.max_ucast_filters %#x",
 		ident->lif.eth.max_ucast_filters);
-	IONIC_PRINT(INFO, "eth.max_mcast_filters 0x%" PRIx32 " ",
+	IONIC_PRINT(INFO, "eth.max_mcast_filters %#x",
 		ident->lif.eth.max_mcast_filters);
 
-	IONIC_PRINT(INFO, "eth.features 0x%" PRIx64 " ",
+	IONIC_PRINT(INFO, "eth.features %#jx",
 		ident->lif.eth.config.features);
-	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_ADMINQ] 0x%" PRIx32 " ",
+	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_ADMINQ] %#x",
 		ident->lif.eth.config.queue_count[IONIC_QTYPE_ADMINQ]);
-	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_NOTIFYQ] 0x%" PRIx32 " ",
+	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_NOTIFYQ] %#x",
 		ident->lif.eth.config.queue_count[IONIC_QTYPE_NOTIFYQ]);
-	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_RXQ] 0x%" PRIx32 " ",
+	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_RXQ] %#x",
 		ident->lif.eth.config.queue_count[IONIC_QTYPE_RXQ]);
-	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_TXQ] 0x%" PRIx32 " ",
+	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_TXQ] %#x",
 		ident->lif.eth.config.queue_count[IONIC_QTYPE_TXQ]);
 
 	return 0;
@@ -1680,7 +1678,8 @@ ionic_lifs_size(struct ionic_adapter *adapter)
 	nintrs = nlifs * 1 /* notifyq */;
 
 	if (nintrs > dev_nintrs) {
-		IONIC_PRINT(ERR, "At most %d intr queues supported, minimum required is %u",
+		IONIC_PRINT(ERR,
+			"At most %d intr supported, minimum req'd is %u",
 			dev_nintrs, nintrs);
 		return -ENOSPC;
 	}
diff --git a/drivers/net/ionic/ionic_mac_api.c b/drivers/net/ionic/ionic_mac_api.c
index c0ea042bc..7817b33e4 100644
--- a/drivers/net/ionic/ionic_mac_api.c
+++ b/drivers/net/ionic/ionic_mac_api.c
@@ -37,7 +37,7 @@ ionic_set_mac_type(struct ionic_hw *hw)
 	IONIC_PRINT_CALL();
 
 	if (hw->vendor_id != IONIC_PENSANDO_VENDOR_ID) {
-		IONIC_PRINT(ERR, "Unsupported vendor id: %" PRIx32 "",
+		IONIC_PRINT(ERR, "Unsupported vendor id: %#x",
 			hw->vendor_id);
 		return -EINVAL;
 	}
@@ -50,7 +50,7 @@ ionic_set_mac_type(struct ionic_hw *hw)
 		break;
 	default:
 		err = -EINVAL;
-		IONIC_PRINT(ERR, "Unsupported device id: %" PRIx32 "",
+		IONIC_PRINT(ERR, "Unsupported device id: %#x",
 			hw->device_id);
 		break;
 	}
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index 92cf0f398..ce5d11311 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -61,7 +61,7 @@ ionic_error_to_str(enum ionic_status_code code)
 	}
 }
 
-static const char *
+const char *
 ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
 {
 	switch (opcode) {
@@ -107,6 +107,8 @@ ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
 		return "IONIC_CMD_Q_INIT";
 	case IONIC_CMD_Q_CONTROL:
 		return "IONIC_CMD_Q_CONTROL";
+	case IONIC_CMD_Q_IDENTIFY:
+		return "IONIC_CMD_Q_IDENTIFY";
 	case IONIC_CMD_RDMA_RESET_LIF:
 		return "IONIC_CMD_RDMA_RESET_LIF";
 	case IONIC_CMD_RDMA_CREATE_EQ:
@@ -126,8 +128,9 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout)
 	const char *name;
 	const char *status;
 
+	name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
+
 	if (ctx->comp.comp.status || timeout) {
-		name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
 		status = ionic_error_to_str(ctx->comp.comp.status);
 		IONIC_PRINT(ERR, "%s (%d) failed: %s (%d)",
 			name,
@@ -137,6 +140,8 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout)
 		return -EIO;
 	}
 
+	IONIC_PRINT(DEBUG, "%s (%d) succeeded", name, ctx->cmd.cmd.opcode);
+
 	return 0;
 }
 
@@ -174,14 +179,13 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 	bool done;
 	int err;
 
-	IONIC_PRINT(DEBUG, "Sending %s to the admin queue",
-		ionic_opcode_to_str(ctx->cmd.cmd.opcode));
+	IONIC_PRINT(DEBUG, "Sending %s (%d) via the admin queue",
+		ionic_opcode_to_str(ctx->cmd.cmd.opcode), ctx->cmd.cmd.opcode);
 
 	err = ionic_adminq_post(lif, ctx);
 	if (err) {
-		IONIC_PRINT(ERR, "Failure posting to the admin queue %d (%d)",
+		IONIC_PRINT(ERR, "Failure posting %d to the admin queue (%d)",
 			ctx->cmd.cmd.opcode, err);
-
 		return err;
 	}
 
@@ -244,6 +248,7 @@ ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait)
 	if (!err)
 		err = ionic_dev_cmd_check_error(idev);
 
+	IONIC_PRINT(DEBUG, "dev_cmd returned %d", err);
 	return err;
 }
 
@@ -335,12 +340,12 @@ ionic_port_identify(struct ionic_adapter *adapter)
 				ioread32(&idev->dev_cmd->data[i]);
 	}
 
-	IONIC_PRINT(INFO, "speed %d ", ident->port.config.speed);
-	IONIC_PRINT(INFO, "mtu %d ", ident->port.config.mtu);
-	IONIC_PRINT(INFO, "state %d ", ident->port.config.state);
-	IONIC_PRINT(INFO, "an_enable %d ", ident->port.config.an_enable);
-	IONIC_PRINT(INFO, "fec_type %d ", ident->port.config.fec_type);
-	IONIC_PRINT(INFO, "pause_type %d ", ident->port.config.pause_type);
+	IONIC_PRINT(INFO, "speed %d", ident->port.config.speed);
+	IONIC_PRINT(INFO, "mtu %d", ident->port.config.mtu);
+	IONIC_PRINT(INFO, "state %d", ident->port.config.state);
+	IONIC_PRINT(INFO, "an_enable %d", ident->port.config.an_enable);
+	IONIC_PRINT(INFO, "fec_type %d", ident->port.config.fec_type);
+	IONIC_PRINT(INFO, "pause_type %d", ident->port.config.pause_type);
 	IONIC_PRINT(INFO, "loopback_mode %d",
 		ident->port.config.loopback_mode);
 
@@ -381,8 +386,7 @@ ionic_port_init(struct ionic_adapter *adapter)
 	idev->port_info_sz = RTE_ALIGN(sizeof(*idev->port_info), PAGE_SIZE);
 
 	snprintf(z_name, sizeof(z_name), "%s_port_%s_info",
-		IONIC_DRV_NAME,
-		adapter->pci_dev->device.name);
+		IONIC_DRV_NAME, adapter->name);
 
 	idev->port_info_z = ionic_memzone_reserve(z_name, idev->port_info_sz,
 		SOCKET_ID_ANY);
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index b953aff49..b689c8381 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -133,7 +133,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 {
 	struct ionic_qcq *txq;
 
-	IONIC_PRINT_CALL();
+	IONIC_PRINT(DEBUG, "Stopping TX queue %u", tx_queue_id);
 
 	txq = eth_dev->data->tx_queues[tx_queue_id];
 
@@ -156,7 +156,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 
 int __rte_cold
 ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
-		uint16_t nb_desc, uint32_t socket_id __rte_unused,
+		uint16_t nb_desc, uint32_t socket_id,
 		const struct rte_eth_txconf *tx_conf)
 {
 	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
@@ -164,11 +164,6 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	uint64_t offloads;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Configuring TX queue %u with %u buffers",
-		tx_queue_id, nb_desc);
-
 	if (tx_queue_id >= lif->ntxqcqs) {
 		IONIC_PRINT(DEBUG, "Queue index %u not available "
 			"(max %u queues)",
@@ -177,6 +172,9 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	}
 
 	offloads = tx_conf->offloads | eth_dev->data->dev_conf.txmode.offloads;
+	IONIC_PRINT(DEBUG,
+		"Configuring skt %u TX queue %u with %u buffers, offloads %jx",
+		socket_id, tx_queue_id, nb_desc, offloads);
 
 	/* Validate number of receive descriptors */
 	if (!rte_is_power_of_2(nb_desc) || nb_desc < IONIC_MIN_RING_DESC)
@@ -215,10 +213,11 @@ ionic_dev_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 	struct ionic_qcq *txq;
 	int err;
 
-	IONIC_PRINT_CALL();
-
 	txq = eth_dev->data->tx_queues[tx_queue_id];
 
+	IONIC_PRINT(DEBUG, "Starting TX queue %u, %u descs",
+		tx_queue_id, txq->q.num_descs);
+
 	err = ionic_lif_txq_init(txq);
 	if (err)
 		return err;
@@ -642,7 +641,7 @@ int __rte_cold
 ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 		uint16_t rx_queue_id,
 		uint16_t nb_desc,
-		uint32_t socket_id __rte_unused,
+		uint32_t socket_id,
 		const struct rte_eth_rxconf *rx_conf,
 		struct rte_mempool *mp)
 {
@@ -651,11 +650,6 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	uint64_t offloads;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Configuring RX queue %u with %u buffers",
-		rx_queue_id, nb_desc);
-
 	if (rx_queue_id >= lif->nrxqcqs) {
 		IONIC_PRINT(ERR,
 			"Queue index %u not available (max %u queues)",
@@ -664,13 +658,16 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	}
 
 	offloads = rx_conf->offloads | eth_dev->data->dev_conf.rxmode.offloads;
+	IONIC_PRINT(DEBUG,
+		"Configuring skt %u RX queue %u with %u buffers, offloads %jx",
+		socket_id, rx_queue_id, nb_desc, offloads);
 
 	/* Validate number of receive descriptors */
 	if (!rte_is_power_of_2(nb_desc) ||
 			nb_desc < IONIC_MIN_RING_DESC ||
 			nb_desc > IONIC_MAX_RING_DESC) {
 		IONIC_PRINT(ERR,
-			"Bad number of descriptors (%u) for queue %u (min: %u)",
+			"Bad descriptor count (%u) for queue %u (min: %u)",
 			nb_desc, rx_queue_id, IONIC_MIN_RING_DESC);
 		return -EINVAL; /* or use IONIC_DEFAULT_RING_DESC */
 	}
@@ -687,7 +684,7 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 
 	err = ionic_rx_qcq_alloc(lif, rx_queue_id, nb_desc, &rxq);
 	if (err) {
-		IONIC_PRINT(ERR, "Queue allocation failure");
+		IONIC_PRINT(ERR, "Queue %d allocation failure", rx_queue_id);
 		return -EINVAL;
 	}
 
@@ -959,13 +956,11 @@ ionic_dev_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)
 	struct ionic_qcq *rxq;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Allocating RX queue buffers (size: %u)",
-		frame_size);
-
 	rxq = eth_dev->data->rx_queues[rx_queue_id];
 
+	IONIC_PRINT(DEBUG, "Starting RX queue %u, %u descs (size: %u)",
+		rx_queue_id, rxq->q.num_descs, frame_size);
+
 	err = ionic_lif_rxq_init(rxq);
 	if (err)
 		return err;
@@ -1045,7 +1040,7 @@ ionic_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)
 {
 	struct ionic_qcq *rxq;
 
-	IONIC_PRINT_CALL();
+	IONIC_PRINT(DEBUG, "Stopping RX queue %u", rx_queue_id);
 
 	rxq = eth_dev->data->rx_queues[rx_queue_id];
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v3 0/9] net/ionic: minor updates and documentation
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
@ 2020-12-04 20:16   ` Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
                       ` (9 more replies)
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 1/9] net/ionic: connect ionic to the build system Andrew Boyer
                     ` (8 subsequent siblings)
  9 siblings, 10 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-04 20:16 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

These patches make some minor changes to the ionic PMD.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>

---
v3:
* Fixed up false-positives from codespell and gcc 8.3/9.3

v2:
* Address Ferruh's comments (thank you!)
* Switch to net/ionic: prefix
* Leave UNMAINTAINED flag for now
* Split patch 8 into patch 8 & 9; drop whitespace changes

Andrew Boyer (9):
  net/ionic: connect ionic to the build system
  net/ionic: update interface file to the latest version
  net/ionic: update documentation and MAINTAINERS
  net/ionic: check for cmd completion more frequently
  net/ionic: remove some unused fields
  net/ionic: convert 'deferred' boolean to a flag bit
  net/ionic: warn if loopback mode is requested
  net/ionic: minor refactorings and helper variables
  net/ionic: minor logging fixups

 MAINTAINERS                        |    3 +-
 doc/guides/nics/features/ionic.ini |    2 +
 doc/guides/nics/ionic.rst          |   13 +-
 drivers/net/ionic/ionic.h          |    2 +-
 drivers/net/ionic/ionic_dev.c      |   10 +-
 drivers/net/ionic/ionic_dev.h      |   13 +-
 drivers/net/ionic/ionic_ethdev.c   |   14 +-
 drivers/net/ionic/ionic_if.h       | 1343 +++++++++++++++++++---------
 drivers/net/ionic/ionic_lif.c      |  107 ++-
 drivers/net/ionic/ionic_lif.h      |    4 +-
 drivers/net/ionic/ionic_mac_api.c  |    4 +-
 drivers/net/ionic/ionic_main.c     |   86 +-
 drivers/net/ionic/ionic_osdep.h    |   10 -
 drivers/net/ionic/ionic_regs.h     |    9 -
 drivers/net/ionic/ionic_rxtx.c     |   51 +-
 drivers/net/meson.build            |    1 +
 16 files changed, 1085 insertions(+), 587 deletions(-)

-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v3 1/9] net/ionic: connect ionic to the build system
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
@ 2020-12-04 20:16   ` Andrew Boyer
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 2/9] net/ionic: update interface file to the latest version Andrew Boyer
                     ` (7 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-04 20:16 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

Otherwise the ionic PMD is never built.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/meson.build | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index 29f477750..6e4aa6bf3 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -26,6 +26,7 @@ drivers = ['af_packet',
 	'iavf',
 	'ice',
 	'igc',
+	'ionic',
 	'ipn3ke',
 	'ixgbe',
 	'kni',
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v3 2/9] net/ionic: update interface file to the latest version
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 1/9] net/ionic: connect ionic to the build system Andrew Boyer
@ 2020-12-04 20:16   ` Andrew Boyer
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
                     ` (6 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-04 20:16 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

The ionic_if.h file contains the firmware interface definitions.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_if.h   | 1343 ++++++++++++++++++++++----------
 drivers/net/ionic/ionic_regs.h |    3 -
 2 files changed, 930 insertions(+), 416 deletions(-)

diff --git a/drivers/net/ionic/ionic_if.h b/drivers/net/ionic/ionic_if.h
index f83c8711b..ba4cc4b72 100644
--- a/drivers/net/ionic/ionic_if.h
+++ b/drivers/net/ionic/ionic_if.h
@@ -1,17 +1,15 @@
 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB OR BSD-3-Clause */
-/* Copyright (c) 2017-2019 Pensando Systems, Inc.  All rights reserved. */
+/* Copyright (c) 2017-2020 Pensando Systems, Inc.  All rights reserved. */
 
 #ifndef _IONIC_IF_H_
 #define _IONIC_IF_H_
 
-#pragma pack(push, 1)
-
 #define IONIC_DEV_INFO_SIGNATURE		0x44455649      /* 'DEVI' */
 #define IONIC_DEV_INFO_VERSION			1
 #define IONIC_IFNAMSIZ				16
 
 /**
- * Commands
+ * enum ionic_cmd_opcode - Device commands
  */
 enum ionic_cmd_opcode {
 	IONIC_CMD_NOP				= 0,
@@ -42,6 +40,7 @@ enum ionic_cmd_opcode {
 	IONIC_CMD_RX_FILTER_DEL			= 32,
 
 	/* Queue commands */
+	IONIC_CMD_Q_IDENTIFY			= 39,
 	IONIC_CMD_Q_INIT			= 40,
 	IONIC_CMD_Q_CONTROL			= 41,
 
@@ -51,10 +50,17 @@ enum ionic_cmd_opcode {
 	IONIC_CMD_RDMA_CREATE_CQ		= 52,
 	IONIC_CMD_RDMA_CREATE_ADMINQ		= 53,
 
+	/* SR/IOV commands */
+	IONIC_CMD_VF_GETATTR			= 60,
+	IONIC_CMD_VF_SETATTR			= 61,
+
 	/* QoS commands */
 	IONIC_CMD_QOS_CLASS_IDENTIFY		= 240,
 	IONIC_CMD_QOS_CLASS_INIT		= 241,
 	IONIC_CMD_QOS_CLASS_RESET		= 242,
+	IONIC_CMD_QOS_CLASS_UPDATE		= 243,
+	IONIC_CMD_QOS_CLEAR_STATS		= 244,
+	IONIC_CMD_QOS_RESET			= 245,
 
 	/* Firmware commands */
 	IONIC_CMD_FW_DOWNLOAD			= 254,
@@ -62,7 +68,7 @@ enum ionic_cmd_opcode {
 };
 
 /**
- * Command Return codes
+ * enum ionic_status_code - Device command return codes
  */
 enum ionic_status_code {
 	IONIC_RC_SUCCESS	= 0,	/* Success */
@@ -86,8 +92,8 @@ enum ionic_status_code {
 	IONIC_RC_DEV_CMD	= 18,	/* Device cmd attempted on AdminQ */
 	IONIC_RC_ENOSUPP	= 19,	/* Operation not supported */
 	IONIC_RC_ERROR		= 29,	/* Generic error */
-
 	IONIC_RC_ERDMA		= 30,	/* Generic RDMA error */
+	IONIC_RC_EVFID		= 31,	/* VF ID does not exist */
 };
 
 enum ionic_notifyq_opcode {
@@ -95,10 +101,11 @@ enum ionic_notifyq_opcode {
 	IONIC_EVENT_RESET		= 2,
 	IONIC_EVENT_HEARTBEAT		= 3,
 	IONIC_EVENT_LOG			= 4,
+	IONIC_EVENT_XCVR		= 5,
 };
 
 /**
- * struct cmd - General admin command format
+ * struct ionic_admin_cmd - General admin command format
  * @opcode:     Opcode for the command
  * @lif_index:  LIF index
  * @cmd_data:   Opcode-specific command bytes
@@ -112,12 +119,11 @@ struct ionic_admin_cmd {
 
 /**
  * struct ionic_admin_comp - General admin command completion format
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
- * @cmd_data:   Command-specific bytes.
- * @color:      Color bit.  (Always 0 for commands issued to the
- *              Device Cmd Registers.)
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @cmd_data:   Command-specific bytes
+ * @color:      Color bit (Always 0 for commands issued to the
+ *              Device Cmd Registers)
  */
 struct ionic_admin_comp {
 	u8     status;
@@ -144,7 +150,7 @@ struct ionic_nop_cmd {
 
 /**
  * struct ionic_nop_comp - NOP command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_nop_comp {
 	u8 status;
@@ -154,7 +160,7 @@ struct ionic_nop_comp {
 /**
  * struct ionic_dev_init_cmd - Device init command
  * @opcode:    opcode
- * @type:      device type
+ * @type:      Device type
  */
 struct ionic_dev_init_cmd {
 	u8     opcode;
@@ -163,8 +169,8 @@ struct ionic_dev_init_cmd {
 };
 
 /**
- * struct init_comp - Device init command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_init_comp - Device init command completion
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_dev_init_comp {
 	u8 status;
@@ -181,8 +187,8 @@ struct ionic_dev_reset_cmd {
 };
 
 /**
- * struct reset_comp - Reset command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_reset_comp - Reset command completion
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_dev_reset_comp {
 	u8 status;
@@ -203,8 +209,8 @@ struct ionic_dev_identify_cmd {
 };
 
 /**
- * struct dev_identify_comp - Driver/device identify command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_identify_comp - Driver/device identify command completion
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_dev_identify_comp {
@@ -223,8 +229,8 @@ enum ionic_os_type {
 };
 
 /**
- * union drv_identity - driver identity information
- * @os_type:          OS type (see enum os_type)
+ * union ionic_drv_identity - driver identity information
+ * @os_type:          OS type (see enum ionic_os_type)
  * @os_dist:          OS distribution, numeric format
  * @os_dist_str:      OS distribution, string format
  * @kernel_ver:       Kernel version, numeric format
@@ -240,26 +246,26 @@ union ionic_drv_identity {
 		char   kernel_ver_str[32];
 		char   driver_ver_str[32];
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
- * union dev_identity - device identity information
+ * union ionic_dev_identity - device identity information
  * @version:          Version of device identify
  * @type:             Identify type (0 for now)
  * @nports:           Number of ports provisioned
  * @nlifs:            Number of LIFs provisioned
  * @nintrs:           Number of interrupts provisioned
  * @ndbpgs_per_lif:   Number of doorbell pages per LIF
- * @intr_coal_mult:   Interrupt coalescing multiplication factor.
+ * @intr_coal_mult:   Interrupt coalescing multiplication factor
  *                    Scale user-supplied interrupt coalescing
  *                    value in usecs to device units using:
  *                    device units = usecs * mult / div
- * @intr_coal_div:    Interrupt coalescing division factor.
+ * @intr_coal_div:    Interrupt coalescing division factor
  *                    Scale user-supplied interrupt coalescing
  *                    value in usecs to device units using:
  *                    device units = usecs * mult / div
- *
+ * @eq_count:         Number of shared event queues
  */
 union ionic_dev_identity {
 	struct {
@@ -273,8 +279,9 @@ union ionic_dev_identity {
 		__le32 ndbpgs_per_lif;
 		__le32 intr_coal_mult;
 		__le32 intr_coal_div;
+		__le32 eq_count;
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 enum ionic_lif_type {
@@ -284,10 +291,10 @@ enum ionic_lif_type {
 };
 
 /**
- * struct ionic_lif_identify_cmd - lif identify command
+ * struct ionic_lif_identify_cmd - LIF identify command
  * @opcode:  opcode
- * @type:    lif type (enum lif_type)
- * @ver:     version of identify returned by device
+ * @type:    LIF type (enum ionic_lif_type)
+ * @ver:     Version of identify returned by device
  */
 struct ionic_lif_identify_cmd {
 	u8 opcode;
@@ -297,9 +304,9 @@ struct ionic_lif_identify_cmd {
 };
 
 /**
- * struct ionic_lif_identify_comp - lif identify command completion
- * @status:  status of the command (enum status_code)
- * @ver:     version of identify returned by device
+ * struct ionic_lif_identify_comp - LIF identify command completion
+ * @status:  Status of the command (enum ionic_status_code)
+ * @ver:     Version of identify returned by device
  */
 struct ionic_lif_identify_comp {
 	u8 status;
@@ -307,13 +314,24 @@ struct ionic_lif_identify_comp {
 	u8 rsvd2[14];
 };
 
+/**
+ * enum ionic_lif_capability - LIF capabilities
+ * @IONIC_LIF_CAP_ETH:     LIF supports Ethernet
+ * @IONIC_LIF_CAP_RDMA:    LIF support RDMA
+ */
 enum ionic_lif_capability {
 	IONIC_LIF_CAP_ETH        = BIT(0),
 	IONIC_LIF_CAP_RDMA       = BIT(1),
 };
 
 /**
- * Logical Queue Types
+ * enum ionic_logical_qtype - Logical Queue Types
+ * @IONIC_QTYPE_ADMINQ:    Administrative Queue
+ * @IONIC_QTYPE_NOTIFYQ:   Notify Queue
+ * @IONIC_QTYPE_RXQ:       Receive Queue
+ * @IONIC_QTYPE_TXQ:       Transmit Queue
+ * @IONIC_QTYPE_EQ:        Event Queue
+ * @IONIC_QTYPE_MAX:       Max queue type supported
  */
 enum ionic_logical_qtype {
 	IONIC_QTYPE_ADMINQ  = 0,
@@ -325,11 +343,10 @@ enum ionic_logical_qtype {
 };
 
 /**
- * struct ionic_lif_logical_qtype - Descriptor of logical to hardware queue
- * type.
- * @qtype:          Hardware Queue Type.
- * @qid_count:      Number of Queue IDs of the logical type.
- * @qid_base:       Minimum Queue ID of the logical type.
+ * struct ionic_lif_logical_qtype - Descriptor of logical to HW queue type
+ * @qtype:          Hardware Queue Type
+ * @qid_count:      Number of Queue IDs of the logical type
+ * @qid_base:       Minimum Queue ID of the logical type
  */
 struct ionic_lif_logical_qtype {
 	u8     qtype;
@@ -338,20 +355,27 @@ struct ionic_lif_logical_qtype {
 	__le32 qid_base;
 };
 
+/**
+ * enum ionic_lif_state - LIF state
+ * @IONIC_LIF_DISABLE:     LIF disabled
+ * @IONIC_LIF_ENABLE:      LIF enabled
+ * @IONIC_LIF_QUIESCE:     LIF Quiesced
+ */
 enum ionic_lif_state {
-	IONIC_LIF_DISABLE	= 0,
+	IONIC_LIF_QUIESCE	= 0,
 	IONIC_LIF_ENABLE	= 1,
-	IONIC_LIF_HANG_RESET	= 2,
+	IONIC_LIF_DISABLE	= 2,
 };
 
 /**
- * LIF configuration
- * @state:          lif state (enum lif_state)
- * @name:           lif name
- * @mtu:            mtu
- * @mac:            station mac address
- * @features:       features (enum ionic_eth_hw_features)
- * @queue_count:    queue counts per queue-type
+ * union ionic_lif_config - LIF configuration
+ * @state:          LIF state (enum ionic_lif_state)
+ * @name:           LIF name
+ * @mtu:            MTU
+ * @mac:            Station MAC address
+ * @vlan:           Default Vlan ID
+ * @features:       Features (enum ionic_eth_hw_features)
+ * @queue_count:    Queue counts per queue-type
  */
 union ionic_lif_config {
 	struct {
@@ -360,45 +384,44 @@ union ionic_lif_config {
 		char   name[IONIC_IFNAMSIZ];
 		__le32 mtu;
 		u8     mac[6];
-		u8     rsvd2[2];
+		__le16 vlan;
 		__le64 features;
 		__le32 queue_count[IONIC_QTYPE_MAX];
-	};
+	} __rte_packed;
 	__le32 words[64];
 };
 
 /**
- * struct ionic_lif_identity - lif identity information (type-specific)
+ * struct ionic_lif_identity - LIF identity information (type-specific)
  *
- * @capabilities    LIF capabilities
+ * @capabilities:        LIF capabilities
  *
- * Ethernet:
- *     @version:          Ethernet identify structure version.
- *     @features:         Ethernet features supported on this lif type.
- *     @max_ucast_filters:  Number of perfect unicast addresses supported.
- *     @max_mcast_filters:  Number of perfect multicast addresses supported.
- *     @min_frame_size:   Minimum size of frames to be sent
- *     @max_frame_size:   Maximum size of frames to be sent
- *     @config:           LIF config struct with features, mtu, mac, q counts
+ * @eth:                    Ethernet identify structure
+ *     @version:            Ethernet identify structure version
+ *     @max_ucast_filters:  Number of perfect unicast addresses supported
+ *     @max_mcast_filters:  Number of perfect multicast addresses supported
+ *     @min_frame_size:     Minimum size of frames to be sent
+ *     @max_frame_size:     Maximum size of frames to be sent
+ *     @config:             LIF config struct with features, mtu, mac, q counts
  *
- * RDMA:
- *     @version:         RDMA version of opcodes and queue descriptors.
- *     @qp_opcodes:      Number of rdma queue pair opcodes supported.
- *     @admin_opcodes:   Number of rdma admin opcodes supported.
- *     @npts_per_lif:    Page table size per lif
- *     @nmrs_per_lif:    Number of memory regions per lif
- *     @nahs_per_lif:    Number of address handles per lif
- *     @max_stride:      Max work request stride.
- *     @cl_stride:       Cache line stride.
- *     @pte_stride:      Page table entry stride.
- *     @rrq_stride:      Remote RQ work request stride.
- *     @rsq_stride:      Remote SQ work request stride.
+ * @rdma:                RDMA identify structure
+ *     @version:         RDMA version of opcodes and queue descriptors
+ *     @qp_opcodes:      Number of RDMA queue pair opcodes supported
+ *     @admin_opcodes:   Number of RDMA admin opcodes supported
+ *     @npts_per_lif:    Page table size per LIF
+ *     @nmrs_per_lif:    Number of memory regions per LIF
+ *     @nahs_per_lif:    Number of address handles per LIF
+ *     @max_stride:      Max work request stride
+ *     @cl_stride:       Cache line stride
+ *     @pte_stride:      Page table entry stride
+ *     @rrq_stride:      Remote RQ work request stride
+ *     @rsq_stride:      Remote SQ work request stride
  *     @dcqcn_profiles:  Number of DCQCN profiles
- *     @aq_qtype:        RDMA Admin Qtype.
- *     @sq_qtype:        RDMA Send Qtype.
- *     @rq_qtype:        RDMA Receive Qtype.
- *     @cq_qtype:        RDMA Completion Qtype.
- *     @eq_qtype:        RDMA Event Qtype.
+ *     @aq_qtype:        RDMA Admin Qtype
+ *     @sq_qtype:        RDMA Send Qtype
+ *     @rq_qtype:        RDMA Receive Qtype
+ *     @cq_qtype:        RDMA Completion Qtype
+ *     @eq_qtype:        RDMA Event Qtype
  */
 union ionic_lif_identity {
 	struct {
@@ -414,7 +437,7 @@ union ionic_lif_identity {
 			__le32 max_frame_size;
 			u8 rsvd2[106];
 			union ionic_lif_config config;
-		} eth;
+		} __rte_packed eth;
 
 		struct {
 			u8 version;
@@ -436,17 +459,17 @@ union ionic_lif_identity {
 			struct ionic_lif_logical_qtype rq_qtype;
 			struct ionic_lif_logical_qtype cq_qtype;
 			struct ionic_lif_logical_qtype eq_qtype;
-		} rdma;
-	};
-	__le32 words[512];
+		} __rte_packed rdma;
+	} __rte_packed;
+	__le32 words[478];
 };
 
 /**
  * struct ionic_lif_init_cmd - LIF init command
- * @opcode:       opcode
- * @type:         LIF type (enum lif_type)
+ * @opcode:       Opcode
+ * @type:         LIF type (enum ionic_lif_type)
  * @index:        LIF index
- * @info_pa:      destination address for lif info (struct ionic_lif_info)
+ * @info_pa:      Destination address for LIF info (struct ionic_lif_info)
  */
 struct ionic_lif_init_cmd {
 	u8     opcode;
@@ -459,7 +482,8 @@ struct ionic_lif_init_cmd {
 
 /**
  * struct ionic_lif_init_comp - LIF init command completion
- * @status: The status of the command (enum status_code)
+ * @status:	Status of the command (enum ionic_status_code)
+ * @hw_index:	Hardware index of the initialized LIF
  */
 struct ionic_lif_init_comp {
 	u8 status;
@@ -468,14 +492,74 @@ struct ionic_lif_init_comp {
 	u8 rsvd2[12];
 };
 
+/**
+ * struct ionic_q_identify_cmd - queue identify command
+ * @opcode:     opcode
+ * @lif_type:   LIF type (enum ionic_lif_type)
+ * @type:       Logical queue type (enum ionic_logical_qtype)
+ * @ver:        Highest queue type version that the driver supports
+ */
+struct ionic_q_identify_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 lif_type;
+	u8     type;
+	u8     ver;
+	u8     rsvd2[58];
+};
+
+/**
+ * struct ionic_q_identify_comp - queue identify command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @ver:        Queue type version that can be used with FW
+ */
+struct ionic_q_identify_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	u8     ver;
+	u8     rsvd2[11];
+};
+
+/**
+ * union ionic_q_identity - queue identity information
+ *     @version:        Queue type version that can be used with FW
+ *     @supported:      Bitfield of queue versions, first bit = ver 0
+ *     @features:       Queue features
+ *     @desc_sz:        Descriptor size
+ *     @comp_sz:        Completion descriptor size
+ *     @sg_desc_sz:     Scatter/Gather descriptor size
+ *     @max_sg_elems:   Maximum number of Scatter/Gather elements
+ *     @sg_desc_stride: Number of Scatter/Gather elements per descriptor
+ */
+union ionic_q_identity {
+	struct {
+		u8      version;
+		u8      supported;
+		u8      rsvd[6];
+#define IONIC_QIDENT_F_CQ	0x01	/* queue has completion ring */
+#define IONIC_QIDENT_F_SG	0x02	/* queue has scatter/gather ring */
+#define IONIC_QIDENT_F_EQ	0x04	/* queue can use event queue */
+#define IONIC_QIDENT_F_CMB	0x08	/* queue is in cmb bar */
+		__le64  features;
+		__le16  desc_sz;
+		__le16  comp_sz;
+		__le16  sg_desc_sz;
+		__le16  max_sg_elems;
+		__le16  sg_desc_stride;
+	};
+	__le32 words[478];
+};
+
 /**
  * struct ionic_q_init_cmd - Queue init command
  * @opcode:       opcode
  * @type:         Logical queue type
- * @ver:          Queue version (defines opcode/descriptor scope)
+ * @ver:          Queue type version
  * @lif_index:    LIF index
- * @index:        (lif, qtype) relative admin queue index
- * @intr_index:   Interrupt control register index
+ * @index:        (LIF, qtype) relative admin queue index
+ * @intr_index:   Interrupt control register index, or Event queue index
  * @pid:          Process ID
  * @flags:
  *    IRQ:        Interrupt requested on completion
@@ -493,12 +577,11 @@ struct ionic_lif_init_comp {
  *                descriptors.  Values of ring_size <2 and >16 are
  *                reserved.
  *    EQ:         Enable the Event Queue
- * @cos:          Class of service for this queue.
+ * @cos:          Class of service for this queue
  * @ring_size:    Queue ring size, encoded as a log2(size)
  * @ring_base:    Queue ring base address
  * @cq_ring_base: Completion queue ring base address
  * @sg_ring_base: Scatter/Gather ring base address
- * @eq_index:	  Event queue index
  */
 struct ionic_q_init_cmd {
 	u8     opcode;
@@ -515,29 +598,27 @@ struct ionic_q_init_cmd {
 #define IONIC_QINIT_F_ENA	0x02	/* Enable the queue */
 #define IONIC_QINIT_F_SG	0x04	/* Enable scatter/gather on the queue */
 #define IONIC_QINIT_F_EQ	0x08	/* Enable event queue */
-#define IONIC_QINIT_F_DEBUG 0x80	/* Enable queue debugging */
+#define IONIC_QINIT_F_CMB	0x10	/* Enable cmb-based queue */
+#define IONIC_QINIT_F_DEBUG	0x80	/* Enable queue debugging */
 	u8     cos;
 	u8     ring_size;
 	__le64 ring_base;
 	__le64 cq_ring_base;
 	__le64 sg_ring_base;
-	__le32 eq_index;
-	u8     rsvd2[16];
-};
+	u8     rsvd2[20];
+} __rte_packed;
 
 /**
  * struct ionic_q_init_comp - Queue init command completion
- * @status:     The status of the command (enum status_code)
- * @ver:        Queue version (defines opcode/descriptor scope)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @hw_index:   Hardware Queue ID
  * @hw_type:    Hardware Queue type
  * @color:      Color
  */
 struct ionic_q_init_comp {
 	u8     status;
-	u8     ver;
+	u8     rsvd;
 	__le16 comp_index;
 	__le32 hw_index;
 	u8     hw_type;
@@ -558,10 +639,9 @@ enum ionic_txq_desc_opcode {
 
 /**
  * struct ionic_txq_desc - Ethernet Tx queue descriptor format
- * @opcode:       Tx operation, see TXQ_DESC_OPCODE_*:
+ * @cmd:          Tx operation, see IONIC_TXQ_DESC_OPCODE_*:
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_NONE:
- *
  *                      Non-offload send.  No segmentation,
  *                      fragmentation or checksum calc/insertion is
  *                      performed by device; packet is prepared
@@ -569,7 +649,6 @@ enum ionic_txq_desc_opcode {
  *                      no further manipulation from device.
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_PARTIAL:
- *
  *                      Offload 16-bit L4 checksum
  *                      calculation/insertion.  The device will
  *                      calculate the L4 checksum value and
@@ -578,14 +657,16 @@ enum ionic_txq_desc_opcode {
  *                      is calculated starting at @csum_start bytes
  *                      into the packet to the end of the packet.
  *                      The checksum insertion position is given
- *                      in @csum_offset.  This feature is only
- *                      applicable to protocols such as TCP, UDP
- *                      and ICMP where a standard (i.e. the
- *                      'IP-style' checksum) one's complement
- *                      16-bit checksum is used, using an IP
- *                      pseudo-header to seed the calculation.
- *                      Software will preload the L4 checksum
- *                      field with the IP pseudo-header checksum.
+ *                      in @csum_offset, which is the offset from
+ *                      @csum_start to the checksum field in the L4
+ *                      header.  This feature is only applicable to
+ *                      protocols such as TCP, UDP and ICMP where a
+ *                      standard (i.e. the 'IP-style' checksum)
+ *                      one's complement 16-bit checksum is used,
+ *                      using an IP pseudo-header to seed the
+ *                      calculation.  Software will preload the L4
+ *                      checksum field with the IP pseudo-header
+ *                      checksum.
  *
  *                      For tunnel encapsulation, @csum_start and
  *                      @csum_offset refer to the inner L4
@@ -597,11 +678,10 @@ enum ionic_txq_desc_opcode {
  *                      the @encap is set, the device will
  *                      offload the outer header checksums using
  *                      LCO (local checksum offload) (see
- *                      Documentation/networking/checksum-
- *                      offloads.txt for more info).
+ *                      Documentation/networking/checksum-offloads.rst
+ *                      for more info).
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_HW:
- *
  *                      Offload 16-bit checksum computation to hardware.
  *                      If @csum_l3 is set then the packet's L3 checksum is
  *                      updated. Similarly, if @csum_l4 is set the the L4
@@ -609,7 +689,6 @@ enum ionic_txq_desc_opcode {
  *                      checksums are also updated.
  *
  *                   IONIC_TXQ_DESC_OPCODE_TSO:
- *
  *                      Device performs TCP segmentation offload
  *                      (TSO).  @hdr_len is the number of bytes
  *                      to the end of TCP header (the offset to
@@ -636,40 +715,41 @@ enum ionic_txq_desc_opcode {
  *                      clear CWR in remaining segments.
  * @flags:
  *                vlan:
- *                    Insert an L2 VLAN header using @vlan_tci.
+ *                    Insert an L2 VLAN header using @vlan_tci
  *                encap:
- *                    Calculate encap header checksum.
+ *                    Calculate encap header checksum
  *                csum_l3:
- *                    Compute L3 header checksum.
+ *                    Compute L3 header checksum
  *                csum_l4:
- *                    Compute L4 header checksum.
+ *                    Compute L4 header checksum
  *                tso_sot:
  *                    TSO start
  *                tso_eot:
  *                    TSO end
  * @num_sg_elems: Number of scatter-gather elements in SG
  *                descriptor
- * @addr:         First data buffer's DMA address.
- *                (Subsequent data buffers are on txq_sg_desc).
+ * @addr:         First data buffer's DMA address
+ *                (Subsequent data buffers are on txq_sg_desc)
  * @len:          First data buffer's length, in bytes
  * @vlan_tci:     VLAN tag to insert in the packet (if requested
  *                by @V-bit).  Includes .1p and .1q tags
  * @hdr_len:      Length of packet headers, including
- *                encapsulating outer header, if applicable.
- *                Valid for opcodes TXQ_DESC_OPCODE_CALC_CSUM and
- *                TXQ_DESC_OPCODE_TSO.  Should be set to zero for
+ *                encapsulating outer header, if applicable
+ *                Valid for opcodes IONIC_TXQ_DESC_OPCODE_CALC_CSUM and
+ *                IONIC_TXQ_DESC_OPCODE_TSO.  Should be set to zero for
  *                all other modes.  For
- *                TXQ_DESC_OPCODE_CALC_CSUM, @hdr_len is length
+ *                IONIC_TXQ_DESC_OPCODE_CALC_CSUM, @hdr_len is length
  *                of headers up to inner-most L4 header.  For
- *                TXQ_DESC_OPCODE_TSO, @hdr_len is up to
+ *                IONIC_TXQ_DESC_OPCODE_TSO, @hdr_len is up to
  *                inner-most L4 payload, so inclusive of
  *                inner-most L4 header.
- * @mss:          Desired MSS value for TSO.  Only applicable for
- *                TXQ_DESC_OPCODE_TSO.
- * @csum_start:   Offset into inner-most L3 header of checksum
- * @csum_offset:  Offset into inner-most L4 header of checksum
+ * @mss:          Desired MSS value for TSO; only applicable for
+ *                IONIC_TXQ_DESC_OPCODE_TSO
+ * @csum_start:   Offset from packet to first byte checked in L4 checksum
+ * @csum_offset:  Offset from csum_start to L4 checksum field
  */
-
+struct ionic_txq_desc {
+	__le64  cmd;
 #define IONIC_TXQ_DESC_OPCODE_MASK		0xf
 #define IONIC_TXQ_DESC_OPCODE_SHIFT		4
 #define IONIC_TXQ_DESC_FLAGS_MASK		0xf
@@ -691,8 +771,6 @@ enum ionic_txq_desc_opcode {
 #define IONIC_TXQ_DESC_FLAG_TSO_SOT		0x4
 #define IONIC_TXQ_DESC_FLAG_TSO_EOT		0x8
 
-struct ionic_txq_desc {
-	__le64  cmd;
 	__le16  len;
 	union {
 		__le16  vlan_tci;
@@ -719,45 +797,60 @@ static inline u64 encode_txq_desc_cmd(u8 opcode, u8 flags,
 		IONIC_TXQ_DESC_OPCODE_SHIFT;
 	cmd |= (flags & IONIC_TXQ_DESC_FLAGS_MASK) <<
 		IONIC_TXQ_DESC_FLAGS_SHIFT;
-	cmd |= (nsge & IONIC_TXQ_DESC_NSGE_MASK) << IONIC_TXQ_DESC_NSGE_SHIFT;
-	cmd |= (addr & IONIC_TXQ_DESC_ADDR_MASK) << IONIC_TXQ_DESC_ADDR_SHIFT;
+	cmd |= (nsge & IONIC_TXQ_DESC_NSGE_MASK) <<
+		IONIC_TXQ_DESC_NSGE_SHIFT;
+	cmd |= (addr & IONIC_TXQ_DESC_ADDR_MASK) <<
+		IONIC_TXQ_DESC_ADDR_SHIFT;
 
 	return cmd;
 };
 
-static inline void decode_txq_desc_cmd(u64 cmd, u8 *opcode, u8 *flags,
+static inline void
+decode_txq_desc_cmd(u64 cmd, u8 *opcode, u8 *flags,
 				       u8 *nsge, u64 *addr)
 {
 	*opcode = (cmd >> IONIC_TXQ_DESC_OPCODE_SHIFT) &
 		IONIC_TXQ_DESC_OPCODE_MASK;
 	*flags = (cmd >> IONIC_TXQ_DESC_FLAGS_SHIFT) &
 		IONIC_TXQ_DESC_FLAGS_MASK;
-	*nsge = (cmd >> IONIC_TXQ_DESC_NSGE_SHIFT) & IONIC_TXQ_DESC_NSGE_MASK;
-	*addr = (cmd >> IONIC_TXQ_DESC_ADDR_SHIFT) & IONIC_TXQ_DESC_ADDR_MASK;
+	*nsge = (cmd >> IONIC_TXQ_DESC_NSGE_SHIFT) &
+		IONIC_TXQ_DESC_NSGE_MASK;
+	*addr = (cmd >> IONIC_TXQ_DESC_ADDR_SHIFT) &
+		IONIC_TXQ_DESC_ADDR_MASK;
 };
 
-#define IONIC_TX_MAX_SG_ELEMS	8
-#define IONIC_RX_MAX_SG_ELEMS	8
-
 /**
- * struct ionic_txq_sg_desc - Transmit scatter-gather (SG) list
+ * struct ionic_txq_sg_elem - Transmit scatter-gather (SG) descriptor element
  * @addr:      DMA address of SG element data buffer
  * @len:       Length of SG element data buffer, in bytes
  */
+struct ionic_txq_sg_elem {
+	__le64 addr;
+	__le16 len;
+	__le16 rsvd[3];
+};
+
+/**
+ * struct ionic_txq_sg_desc - Transmit scatter-gather (SG) list
+ * @elems:     Scatter-gather elements
+ */
 struct ionic_txq_sg_desc {
-	struct ionic_txq_sg_elem {
-		__le64 addr;
-		__le16 len;
-		__le16 rsvd[3];
-	} elems[IONIC_TX_MAX_SG_ELEMS];
+#define IONIC_TX_MAX_SG_ELEMS		8
+#define IONIC_TX_SG_DESC_STRIDE		8
+	struct ionic_txq_sg_elem elems[IONIC_TX_MAX_SG_ELEMS];
+};
+
+struct ionic_txq_sg_desc_v1 {
+#define IONIC_TX_MAX_SG_ELEMS_V1		15
+#define IONIC_TX_SG_DESC_STRIDE_V1		16
+	struct ionic_txq_sg_elem elems[IONIC_TX_SG_DESC_STRIDE_V1];
 };
 
 /**
  * struct ionic_txq_comp - Ethernet transmit queue completion descriptor
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *                 is the completion.
- * @color:      Color bit.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @color:      Color bit
  */
 struct ionic_txq_comp {
 	u8     status;
@@ -774,16 +867,15 @@ enum ionic_rxq_desc_opcode {
 
 /**
  * struct ionic_rxq_desc - Ethernet Rx queue descriptor format
- * @opcode:       Rx operation, see RXQ_DESC_OPCODE_*:
- *
- *                   RXQ_DESC_OPCODE_SIMPLE:
+ * @opcode:       Rx operation, see IONIC_RXQ_DESC_OPCODE_*:
  *
+ *                   IONIC_RXQ_DESC_OPCODE_SIMPLE:
  *                      Receive full packet into data buffer
  *                      starting at @addr.  Results of
  *                      receive, including actual bytes received,
  *                      are recorded in Rx completion descriptor.
  *
- * @len:          Data buffer's length, in bytes.
+ * @len:          Data buffer's length, in bytes
  * @addr:         Data buffer's DMA address
  */
 struct ionic_rxq_desc {
@@ -794,26 +886,33 @@ struct ionic_rxq_desc {
 };
 
 /**
- * struct ionic_rxq_sg_desc - Receive scatter-gather (SG) list
+ * struct ionic_rxq_sg_elem - Receive scatter-gather (SG) descriptor element
  * @addr:      DMA address of SG element data buffer
  * @len:       Length of SG element data buffer, in bytes
  */
+struct ionic_rxq_sg_elem {
+	__le64 addr;
+	__le16 len;
+	__le16 rsvd[3];
+};
+
+/**
+ * struct ionic_rxq_sg_desc - Receive scatter-gather (SG) list
+ * @elems:     Scatter-gather elements
+ */
 struct ionic_rxq_sg_desc {
-	struct ionic_rxq_sg_elem {
-		__le64 addr;
-		__le16 len;
-		__le16 rsvd[3];
-	} elems[IONIC_RX_MAX_SG_ELEMS];
+#define IONIC_RX_MAX_SG_ELEMS		8
+#define IONIC_RX_SG_DESC_STRIDE		8
+	struct ionic_rxq_sg_elem elems[IONIC_RX_SG_DESC_STRIDE];
 };
 
 /**
  * struct ionic_rxq_comp - Ethernet receive queue completion descriptor
- * @status:       The status of the command (enum status_code)
+ * @status:       Status of the command (enum ionic_status_code)
  * @num_sg_elems: Number of SG elements used by this descriptor
- * @comp_index:   The index in the descriptor ring for which this
- *                is the completion.
+ * @comp_index:   Index in the descriptor ring for which this is the completion
  * @rss_hash:     32-bit RSS hash
- * @csum:         16-bit sum of the packet's L2 payload.
+ * @csum:         16-bit sum of the packet's L2 payload
  *                If the packet's L2 payload is odd length, an extra
  *                zero-value byte is included in the @csum calculation but
  *                not included in @len.
@@ -821,33 +920,51 @@ struct ionic_rxq_sg_desc {
  *                set.  Includes .1p and .1q tags.
  * @len:          Received packet length, in bytes.  Excludes FCS.
  * @csum_calc     L2 payload checksum is computed or not
- * @csum_tcp_ok:  The TCP checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                TCP header
- * @csum_tcp_bad: The TCP checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                TCP header.
- * @csum_udp_ok:  The UDP checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                UDP header
- * @csum_udp_bad: The UDP checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                UDP header.
- * @csum_ip_ok:   The IPv4 checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                first IPv4 header.  If the receive packet
- *                contains both a tunnel IPv4 header and a
- *                transport IPv4 header, the device validates the
- *                checksum for the both IPv4 headers.
- * @csum_ip_bad:  The IPv4 checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                first IPv4 header. If the receive packet
- *                contains both a tunnel IPv4 header and a
- *                transport IPv4 header, the device validates the
- *                checksum for both IP headers.
- * @VLAN:         VLAN header was stripped and placed in @vlan_tci.
- * @pkt_type:     Packet type
- * @color:        Color bit.
+ * @csum_flags:   See IONIC_RXQ_COMP_CSUM_F_*:
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_TCP_OK:
+ *                    The TCP checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    TCP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_TCP_BAD:
+ *                    The TCP checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    TCP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_UDP_OK:
+ *                    The UDP checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    UDP header
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_UDP_BAD:
+ *                    The UDP checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    UDP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_IP_OK:
+ *                    The IPv4 checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    first IPv4 header.  If the receive packet
+ *                    contains both a tunnel IPv4 header and a
+ *                    transport IPv4 header, the device validates the
+ *                    checksum for the both IPv4 headers.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_IP_BAD:
+ *                    The IPv4 checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    first IPv4 header. If the receive packet
+ *                    contains both a tunnel IPv4 header and a
+ *                    transport IPv4 header, the device validates the
+ *                    checksum for both IP headers.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_VLAN:
+ *                    The VLAN header was stripped and placed in @vlan_tci.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_CALC:
+ *                    The checksum was calculated by the device.
+ *
+ * @pkt_type_color: Packet type and color bit; see IONIC_RXQ_COMP_PKT_TYPE_MASK
  */
 struct ionic_rxq_comp {
 	u8     status;
@@ -871,13 +988,21 @@ struct ionic_rxq_comp {
 };
 
 enum ionic_pkt_type {
-	IONIC_PKT_TYPE_NON_IP     = 0x000,
-	IONIC_PKT_TYPE_IPV4       = 0x001,
-	IONIC_PKT_TYPE_IPV4_TCP   = 0x003,
-	IONIC_PKT_TYPE_IPV4_UDP   = 0x005,
-	IONIC_PKT_TYPE_IPV6       = 0x008,
-	IONIC_PKT_TYPE_IPV6_TCP   = 0x018,
-	IONIC_PKT_TYPE_IPV6_UDP   = 0x028,
+	IONIC_PKT_TYPE_NON_IP		= 0x00,
+	IONIC_PKT_TYPE_IPV4		= 0x01,
+	IONIC_PKT_TYPE_IPV4_TCP		= 0x03,
+	IONIC_PKT_TYPE_IPV4_UDP		= 0x05,
+	IONIC_PKT_TYPE_IPV6		= 0x08,
+	IONIC_PKT_TYPE_IPV6_TCP		= 0x18,
+	IONIC_PKT_TYPE_IPV6_UDP		= 0x28,
+	/* below types are only used if encap offloads are enabled on lif */
+	IONIC_PKT_TYPE_ENCAP_NON_IP	= 0x40,
+	IONIC_PKT_TYPE_ENCAP_IPV4	= 0x41,
+	IONIC_PKT_TYPE_ENCAP_IPV4_TCP	= 0x43,
+	IONIC_PKT_TYPE_ENCAP_IPV4_UDP	= 0x45,
+	IONIC_PKT_TYPE_ENCAP_IPV6	= 0x48,
+	IONIC_PKT_TYPE_ENCAP_IPV6_TCP	= 0x58,
+	IONIC_PKT_TYPE_ENCAP_IPV6_UDP	= 0x68,
 };
 
 enum ionic_eth_hw_features {
@@ -894,10 +1019,13 @@ enum ionic_eth_hw_features {
 	IONIC_ETH_HW_TSO_ECN		= BIT(10),
 	IONIC_ETH_HW_TSO_GRE		= BIT(11),
 	IONIC_ETH_HW_TSO_GRE_CSUM	= BIT(12),
-	IONIC_ETH_HW_TSO_IPXIP4	= BIT(13),
-	IONIC_ETH_HW_TSO_IPXIP6	= BIT(14),
+	IONIC_ETH_HW_TSO_IPXIP4		= BIT(13),
+	IONIC_ETH_HW_TSO_IPXIP6		= BIT(14),
 	IONIC_ETH_HW_TSO_UDP		= BIT(15),
 	IONIC_ETH_HW_TSO_UDP_CSUM	= BIT(16),
+	IONIC_ETH_HW_RX_CSUM_GENEVE	= BIT(17),
+	IONIC_ETH_HW_TX_CSUM_GENEVE	= BIT(18),
+	IONIC_ETH_HW_TSO_GENEVE		= BIT(19)
 };
 
 /**
@@ -906,7 +1034,7 @@ enum ionic_eth_hw_features {
  * @type:       Queue type
  * @lif_index:  LIF index
  * @index:      Queue index
- * @oper:       Operation (enum q_control_oper)
+ * @oper:       Operation (enum ionic_q_control_oper)
  */
 struct ionic_q_control_cmd {
 	u8     opcode;
@@ -919,14 +1047,17 @@ struct ionic_q_control_cmd {
 
 typedef struct ionic_admin_comp ionic_q_control_comp;
 
-enum q_control_oper {
+enum ionic_q_control_oper {
 	IONIC_Q_DISABLE		= 0,
 	IONIC_Q_ENABLE		= 1,
 	IONIC_Q_HANG_RESET	= 2,
 };
 
 /**
- * Physical connection type
+ * enum ionic_phy_type - Physical connection type
+ * @IONIC_PHY_TYPE_NONE:    No PHY installed
+ * @IONIC_PHY_TYPE_COPPER:  Copper PHY
+ * @IONIC_PHY_TYPE_FIBER:   Fiber PHY
  */
 enum ionic_phy_type {
 	IONIC_PHY_TYPE_NONE	= 0,
@@ -935,18 +1066,23 @@ enum ionic_phy_type {
 };
 
 /**
- * Transceiver status
+ * enum ionic_xcvr_state - Transceiver status
+ * @IONIC_XCVR_STATE_REMOVED:        Transceiver removed
+ * @IONIC_XCVR_STATE_INSERTED:       Transceiver inserted
+ * @IONIC_XCVR_STATE_PENDING:        Transceiver pending
+ * @IONIC_XCVR_STATE_SPROM_READ:     Transceiver data read
+ * @IONIC_XCVR_STATE_SPROM_READ_ERR: Transceiver data read error
  */
 enum ionic_xcvr_state {
 	IONIC_XCVR_STATE_REMOVED	 = 0,
 	IONIC_XCVR_STATE_INSERTED	 = 1,
 	IONIC_XCVR_STATE_PENDING	 = 2,
 	IONIC_XCVR_STATE_SPROM_READ	 = 3,
-	IONIC_XCVR_STATE_SPROM_READ_ERR  = 4,
+	IONIC_XCVR_STATE_SPROM_READ_ERR	 = 4,
 };
 
 /**
- * Supported link modes
+ * enum ionic_xcvr_pid - Supported link modes
  */
 enum ionic_xcvr_pid {
 	IONIC_XCVR_PID_UNKNOWN           = 0,
@@ -980,67 +1116,74 @@ enum ionic_xcvr_pid {
 	IONIC_XCVR_PID_SFP_10GBASE_CU   = 68,
 	IONIC_XCVR_PID_QSFP_100G_CWDM4  = 69,
 	IONIC_XCVR_PID_QSFP_100G_PSM4   = 70,
+	IONIC_XCVR_PID_SFP_25GBASE_ACC  = 71,
 };
 
 /**
- * Port types
- */
-enum ionic_port_type {
-	IONIC_PORT_TYPE_NONE = 0,  /* port type not configured */
-	IONIC_PORT_TYPE_ETH  = 1,  /* port carries ethernet traffic (inband) */
-	IONIC_PORT_TYPE_MGMT = 2,  /* port carries mgmt traffic (out-of-band) */
-};
-
-/**
- * Port config state
+ * enum ionic_port_admin_state - Port config state
+ * @IONIC_PORT_ADMIN_STATE_NONE:    Port admin state not configured
+ * @IONIC_PORT_ADMIN_STATE_DOWN:    Port admin disabled
+ * @IONIC_PORT_ADMIN_STATE_UP:      Port admin enabled
  */
 enum ionic_port_admin_state {
-	IONIC_PORT_ADMIN_STATE_NONE = 0,   /* port admin state not configured */
-	IONIC_PORT_ADMIN_STATE_DOWN = 1,   /* port is admin disabled */
-	IONIC_PORT_ADMIN_STATE_UP   = 2,   /* port is admin enabled */
+	IONIC_PORT_ADMIN_STATE_NONE = 0,
+	IONIC_PORT_ADMIN_STATE_DOWN = 1,
+	IONIC_PORT_ADMIN_STATE_UP   = 2,
 };
 
 /**
- * Port operational status
+ * enum ionic_port_oper_status - Port operational status
+ * @IONIC_PORT_OPER_STATUS_NONE:    Port disabled
+ * @IONIC_PORT_OPER_STATUS_UP:      Port link status up
+ * @IONIC_PORT_OPER_STATUS_DOWN:    Port link status down
  */
 enum ionic_port_oper_status {
-	IONIC_PORT_OPER_STATUS_NONE  = 0,	/* port is disabled */
-	IONIC_PORT_OPER_STATUS_UP    = 1,	/* port is linked up */
-	IONIC_PORT_OPER_STATUS_DOWN  = 2,	/* port link status is down */
+	IONIC_PORT_OPER_STATUS_NONE  = 0,
+	IONIC_PORT_OPER_STATUS_UP    = 1,
+	IONIC_PORT_OPER_STATUS_DOWN  = 2,
 };
 
 /**
- * Ethernet Forward error correction (fec) modes
+ * enum ionic_port_fec_type - Ethernet Forward error correction (FEC) modes
+ * @IONIC_PORT_FEC_TYPE_NONE:       FEC Disabled
+ * @IONIC_PORT_FEC_TYPE_FC:         FireCode FEC
+ * @IONIC_PORT_FEC_TYPE_RS:         ReedSolomon FEC
  */
 enum ionic_port_fec_type {
-	IONIC_PORT_FEC_TYPE_NONE = 0,		/* Disabled */
-	IONIC_PORT_FEC_TYPE_FC   = 1,		/* FireCode */
-	IONIC_PORT_FEC_TYPE_RS   = 2,		/* ReedSolomon */
+	IONIC_PORT_FEC_TYPE_NONE = 0,
+	IONIC_PORT_FEC_TYPE_FC   = 1,
+	IONIC_PORT_FEC_TYPE_RS   = 2,
 };
 
 /**
- * Ethernet pause (flow control) modes
+ * enum ionic_port_pause_type - Ethernet pause (flow control) modes
+ * @IONIC_PORT_PAUSE_TYPE_NONE:     Disable Pause
+ * @IONIC_PORT_PAUSE_TYPE_LINK:     Link level pause
+ * @IONIC_PORT_PAUSE_TYPE_PFC:      Priority-Flow Control
  */
 enum ionic_port_pause_type {
-	IONIC_PORT_PAUSE_TYPE_NONE = 0,	/* Disable Pause */
-	IONIC_PORT_PAUSE_TYPE_LINK = 1,	/* Link level pause */
-	IONIC_PORT_PAUSE_TYPE_PFC  = 2,	/* Priority-Flow control */
+	IONIC_PORT_PAUSE_TYPE_NONE = 0,
+	IONIC_PORT_PAUSE_TYPE_LINK = 1,
+	IONIC_PORT_PAUSE_TYPE_PFC  = 2,
 };
 
 /**
- * Loopback modes
+ * enum ionic_port_loopback_mode - Loopback modes
+ * @IONIC_PORT_LOOPBACK_MODE_NONE:  Disable loopback
+ * @IONIC_PORT_LOOPBACK_MODE_MAC:   MAC loopback
+ * @IONIC_PORT_LOOPBACK_MODE_PHY:   PHY/SerDes loopback
  */
 enum ionic_port_loopback_mode {
-	IONIC_PORT_LOOPBACK_MODE_NONE = 0,	/* Disable loopback */
-	IONIC_PORT_LOOPBACK_MODE_MAC  = 1,	/* MAC loopback */
-	IONIC_PORT_LOOPBACK_MODE_PHY  = 2,	/* PHY/Serdes loopback */
+	IONIC_PORT_LOOPBACK_MODE_NONE = 0,
+	IONIC_PORT_LOOPBACK_MODE_MAC  = 1,
+	IONIC_PORT_LOOPBACK_MODE_PHY  = 2,
 };
 
 /**
- * Transceiver Status information
+ * struct ionic_xcvr_status - Transceiver Status information
  * @state:    Transceiver status (enum ionic_xcvr_state)
  * @phy:      Physical connection type (enum ionic_phy_type)
- * @pid:      Transceiver link mode (enum pid)
+ * @pid:      Transceiver link mode (enum ionic_xcvr_pid)
  * @sprom:    Transceiver sprom contents
  */
 struct ionic_xcvr_status {
@@ -1051,10 +1194,10 @@ struct ionic_xcvr_status {
 };
 
 /**
- * Port configuration
+ * union ionic_port_config - Port configuration
  * @speed:              port speed (in Mbps)
  * @mtu:                mtu
- * @state:              port admin state (enum port_admin_state)
+ * @state:              port admin state (enum ionic_port_admin_state)
  * @an_enable:          autoneg enable
  * @fec_type:           fec type (enum ionic_port_fec_type)
  * @pause_type:         pause type (enum ionic_port_pause_type)
@@ -1084,19 +1227,23 @@ union ionic_port_config {
 };
 
 /**
- * Port Status information
+ * struct ionic_port_status - Port Status information
  * @status:             link status (enum ionic_port_oper_status)
  * @id:                 port id
  * @speed:              link speed (in Mbps)
+ * @link_down_count:    number of times link went from up to down
+ * @fec_type:           fec type (enum ionic_port_fec_type)
  * @xcvr:               transceiver status
  */
 struct ionic_port_status {
 	__le32 id;
 	__le32 speed;
 	u8     status;
-	u8     rsvd[51];
+	__le16 link_down_count;
+	u8     fec_type;
+	u8     rsvd[48];
 	struct ionic_xcvr_status  xcvr;
-};
+} __rte_packed;
 
 /**
  * struct ionic_port_identify_cmd - Port identify command
@@ -1113,7 +1260,7 @@ struct ionic_port_identify_cmd {
 
 /**
  * struct ionic_port_identify_comp - Port identify command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_port_identify_comp {
@@ -1138,7 +1285,7 @@ struct ionic_port_init_cmd {
 
 /**
  * struct ionic_port_init_comp - Port initialization command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_port_init_comp {
 	u8 status;
@@ -1158,7 +1305,7 @@ struct ionic_port_reset_cmd {
 
 /**
  * struct ionic_port_reset_comp - Port reset command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_port_reset_comp {
 	u8 status;
@@ -1166,15 +1313,23 @@ struct ionic_port_reset_comp {
 };
 
 /**
- * enum stats_ctl_cmd - List of commands for stats control
+ * enum ionic_stats_ctl_cmd - List of commands for stats control
+ * @IONIC_STATS_CTL_RESET:      Reset statistics
  */
 enum ionic_stats_ctl_cmd {
 	IONIC_STATS_CTL_RESET		= 0,
 };
 
-
 /**
  * enum ionic_port_attr - List of device attributes
+ * @IONIC_PORT_ATTR_STATE:      Port state attribute
+ * @IONIC_PORT_ATTR_SPEED:      Port speed attribute
+ * @IONIC_PORT_ATTR_MTU:        Port MTU attribute
+ * @IONIC_PORT_ATTR_AUTONEG:    Port autonegotiation attribute
+ * @IONIC_PORT_ATTR_FEC:        Port FEC attribute
+ * @IONIC_PORT_ATTR_PAUSE:      Port pause attribute
+ * @IONIC_PORT_ATTR_LOOPBACK:   Port loopback attribute
+ * @IONIC_PORT_ATTR_STATS_CTRL: Port statistics control attribute
  */
 enum ionic_port_attr {
 	IONIC_PORT_ATTR_STATE		= 0,
@@ -1189,9 +1344,17 @@ enum ionic_port_attr {
 
 /**
  * struct ionic_port_setattr_cmd - Set port attributes on the NIC
- * @opcode:     Opcode
- * @index:      port index
- * @attr:       Attribute type (enum ionic_port_attr)
+ * @opcode:         Opcode
+ * @index:          Port index
+ * @attr:           Attribute type (enum ionic_port_attr)
+ * @state:          Port state
+ * @speed:          Port speed
+ * @mtu:            Port MTU
+ * @an_enable:      Port autonegotiation setting
+ * @fec_type:       Port FEC type setting
+ * @pause_type:     Port pause type setting
+ * @loopback_mode:  Port loopback mode
+ * @stats_ctl:      Port stats setting
  */
 struct ionic_port_setattr_cmd {
 	u8     opcode;
@@ -1206,14 +1369,14 @@ struct ionic_port_setattr_cmd {
 		u8      fec_type;
 		u8      pause_type;
 		u8      loopback_mode;
-		u8	stats_ctl;
+		u8      stats_ctl;
 		u8      rsvd2[60];
 	};
 };
 
 /**
  * struct ionic_port_setattr_comp - Port set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @color:      Color bit
  */
 struct ionic_port_setattr_comp {
@@ -1237,8 +1400,15 @@ struct ionic_port_getattr_cmd {
 
 /**
  * struct ionic_port_getattr_comp - Port get attr command completion
- * @status:     The status of the command (enum status_code)
- * @color:      Color bit
+ * @status:         Status of the command (enum ionic_status_code)
+ * @state:          Port state
+ * @speed:          Port speed
+ * @mtu:            Port MTU
+ * @an_enable:      Port autonegotiation setting
+ * @fec_type:       Port FEC type setting
+ * @pause_type:     Port pause type setting
+ * @loopback_mode:  Port loopback mode
+ * @color:          Color bit
  */
 struct ionic_port_getattr_comp {
 	u8     status;
@@ -1252,17 +1422,17 @@ struct ionic_port_getattr_comp {
 		u8      pause_type;
 		u8      loopback_mode;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
 /**
- * struct ionic_lif_status - Lif status register
+ * struct ionic_lif_status - LIF status register
  * @eid:             most recent NotifyQ event id
- * @port_num:        port the lif is connected to
+ * @port_num:        port the LIF is connected to
  * @link_status:     port status (enum ionic_port_oper_status)
  * @link_speed:      speed of link in Mbps
- * @link_down_count: number of times link status changes
+ * @link_down_count: number of times link went from up to down
  */
 struct ionic_lif_status {
 	__le64 eid;
@@ -1296,6 +1466,9 @@ enum ionic_dev_state {
 
 /**
  * enum ionic_dev_attr - List of device attributes
+ * @IONIC_DEV_ATTR_STATE:     Device state attribute
+ * @IONIC_DEV_ATTR_NAME:      Device name attribute
+ * @IONIC_DEV_ATTR_FEATURES:  Device feature attributes
  */
 enum ionic_dev_attr {
 	IONIC_DEV_ATTR_STATE    = 0,
@@ -1320,12 +1493,12 @@ struct ionic_dev_setattr_cmd {
 		char    name[IONIC_IFNAMSIZ];
 		__le64  features;
 		u8      rsvd2[60];
-	};
+	} __rte_packed;
 };
 
 /**
  * struct ionic_dev_setattr_comp - Device set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @features:   Device features
  * @color:      Color bit
  */
@@ -1335,7 +1508,7 @@ struct ionic_dev_setattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1352,7 +1525,7 @@ struct ionic_dev_getattr_cmd {
 
 /**
  * struct ionic_dev_setattr_comp - Device set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @features:   Device features
  * @color:      Color bit
  */
@@ -1362,7 +1535,7 @@ struct ionic_dev_getattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1382,6 +1555,13 @@ enum ionic_rss_hash_types {
 
 /**
  * enum ionic_lif_attr - List of LIF attributes
+ * @IONIC_LIF_ATTR_STATE:       LIF state attribute
+ * @IONIC_LIF_ATTR_NAME:        LIF name attribute
+ * @IONIC_LIF_ATTR_MTU:         LIF MTU attribute
+ * @IONIC_LIF_ATTR_MAC:         LIF MAC attribute
+ * @IONIC_LIF_ATTR_FEATURES:    LIF features attribute
+ * @IONIC_LIF_ATTR_RSS:         LIF RSS attribute
+ * @IONIC_LIF_ATTR_STATS_CTRL:  LIF statistics control attribute
  */
 enum ionic_lif_attr {
 	IONIC_LIF_ATTR_STATE        = 0,
@@ -1396,18 +1576,18 @@ enum ionic_lif_attr {
 /**
  * struct ionic_lif_setattr_cmd - Set LIF attributes on the NIC
  * @opcode:     Opcode
- * @type:       Attribute type (enum ionic_lif_attr)
+ * @attr:       Attribute type (enum ionic_lif_attr)
  * @index:      LIF index
- * @state:      lif state (enum lif_state)
+ * @state:      LIF state (enum ionic_lif_state)
  * @name:       The netdev name string, 0 terminated
  * @mtu:        Mtu
  * @mac:        Station mac
  * @features:   Features (enum ionic_eth_hw_features)
  * @rss:        RSS properties
- *              @types:     The hash types to enable (see rss_hash_types).
- *              @key:       The hash secret key.
- *              @addr:      Address for the indirection table shared memory.
- * @stats_ctl:  stats control commands (enum stats_ctl_cmd)
+ *              @types:     The hash types to enable (see rss_hash_types)
+ *              @key:       The hash secret key
+ *              @addr:      Address for the indirection table shared memory
+ * @stats_ctl:  stats control commands (enum ionic_stats_ctl_cmd)
  */
 struct ionic_lif_setattr_cmd {
 	u8     opcode;
@@ -1425,16 +1605,15 @@ struct ionic_lif_setattr_cmd {
 			u8     rsvd[6];
 			__le64 addr;
 		} rss;
-		u8	stats_ctl;
+		u8      stats_ctl;
 		u8      rsvd[60];
-	};
+	} __rte_packed;
 };
 
 /**
  * struct ionic_lif_setattr_comp - LIF set attr command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @features:   features (enum ionic_eth_hw_features)
  * @color:      Color bit
  */
@@ -1445,7 +1624,7 @@ struct ionic_lif_setattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1464,10 +1643,9 @@ struct ionic_lif_getattr_cmd {
 
 /**
  * struct ionic_lif_getattr_comp - LIF get attr command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
- * @state:      lif state (enum lif_state)
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @state:      LIF state (enum ionic_lif_state)
  * @name:       The netdev name string, 0 terminated
  * @mtu:        Mtu
  * @mac:        Station mac
@@ -1484,16 +1662,17 @@ struct ionic_lif_getattr_comp {
 		u8      mac[6];
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
 enum ionic_rx_mode {
-	IONIC_RX_MODE_F_UNICAST    = BIT(0),
-	IONIC_RX_MODE_F_MULTICAST  = BIT(1),
-	IONIC_RX_MODE_F_BROADCAST  = BIT(2),
-	IONIC_RX_MODE_F_PROMISC    = BIT(3),
-	IONIC_RX_MODE_F_ALLMULTI   = BIT(4),
+	IONIC_RX_MODE_F_UNICAST		= BIT(0),
+	IONIC_RX_MODE_F_MULTICAST	= BIT(1),
+	IONIC_RX_MODE_F_BROADCAST	= BIT(2),
+	IONIC_RX_MODE_F_PROMISC		= BIT(3),
+	IONIC_RX_MODE_F_ALLMULTI	= BIT(4),
+	IONIC_RX_MODE_F_RDMA_SNIFFER	= BIT(5),
 };
 
 /**
@@ -1501,11 +1680,12 @@ enum ionic_rx_mode {
  * @opcode:     opcode
  * @lif_index:  LIF index
  * @rx_mode:    Rx mode flags:
- *                  IONIC_RX_MODE_F_UNICAST: Accept known unicast packets.
- *                  IONIC_RX_MODE_F_MULTICAST: Accept known multicast packets.
- *                  IONIC_RX_MODE_F_BROADCAST: Accept broadcast packets.
- *                  IONIC_RX_MODE_F_PROMISC: Accept any packets.
- *                  IONIC_RX_MODE_F_ALLMULTI: Accept any multicast packets.
+ *                  IONIC_RX_MODE_F_UNICAST: Accept known unicast packets
+ *                  IONIC_RX_MODE_F_MULTICAST: Accept known multicast packets
+ *                  IONIC_RX_MODE_F_BROADCAST: Accept broadcast packets
+ *                  IONIC_RX_MODE_F_PROMISC: Accept any packets
+ *                  IONIC_RX_MODE_F_ALLMULTI: Accept any multicast packets
+ *                  IONIC_RX_MODE_F_RDMA_SNIFFER: Sniff RDMA packets
  */
 struct ionic_rx_mode_set_cmd {
 	u8     opcode;
@@ -1529,9 +1709,14 @@ enum ionic_rx_filter_match_type {
  * @qtype:      Queue type
  * @lif_index:  LIF index
  * @qid:        Queue ID
- * @match:      Rx filter match type.  (See IONIC_RX_FILTER_MATCH_xxx)
- * @vlan:       VLAN ID
- * @addr:       MAC address (network-byte order)
+ * @match:      Rx filter match type (see IONIC_RX_FILTER_MATCH_xxx)
+ * @vlan:       VLAN filter
+ *              @vlan:  VLAN ID
+ * @mac:        MAC filter
+ *              @addr:  MAC address (network-byte order)
+ * @mac_vlan:   MACVLAN filter
+ *              @vlan:  VLAN ID
+ *              @addr:  MAC address (network-byte order)
  */
 struct ionic_rx_filter_add_cmd {
 	u8     opcode;
@@ -1556,11 +1741,10 @@ struct ionic_rx_filter_add_cmd {
 
 /**
  * struct ionic_rx_filter_add_comp - Add LIF Rx filter command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @filter_id:  Filter ID
- * @color:      Color bit.
+ * @color:      Color bit
  */
 struct ionic_rx_filter_add_comp {
 	u8     status;
@@ -1587,9 +1771,99 @@ struct ionic_rx_filter_del_cmd {
 
 typedef struct ionic_admin_comp ionic_rx_filter_del_comp;
 
+enum ionic_vf_attr {
+	IONIC_VF_ATTR_SPOOFCHK	= 1,
+	IONIC_VF_ATTR_TRUST	= 2,
+	IONIC_VF_ATTR_MAC	= 3,
+	IONIC_VF_ATTR_LINKSTATE	= 4,
+	IONIC_VF_ATTR_VLAN	= 5,
+	IONIC_VF_ATTR_RATE	= 6,
+	IONIC_VF_ATTR_STATSADDR	= 7,
+};
+
+/**
+ * enum ionic_vf_link_status - Virtual Function link status
+ * @IONIC_VF_LINK_STATUS_AUTO:   Use link state of the uplink
+ * @IONIC_VF_LINK_STATUS_UP:     Link always up
+ * @IONIC_VF_LINK_STATUS_DOWN:   Link always down
+ */
+enum ionic_vf_link_status {
+	IONIC_VF_LINK_STATUS_AUTO = 0,
+	IONIC_VF_LINK_STATUS_UP   = 1,
+	IONIC_VF_LINK_STATUS_DOWN = 2,
+};
+
+/**
+ * struct ionic_vf_setattr_cmd - Set VF attributes on the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_vf_attr)
+ * @vf_index:   VF index
+ *	@macaddr:	mac address
+ *	@vlanid:	vlan ID
+ *	@maxrate:	max Tx rate in Mbps
+ *	@spoofchk:	enable address spoof checking
+ *	@trust:		enable VF trust
+ *	@linkstate:	set link up or down
+ *	@stats_pa:	set DMA address for VF stats
+ */
+struct ionic_vf_setattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 vf_index;
+	union {
+		u8     macaddr[6];
+		__le16 vlanid;
+		__le32 maxrate;
+		u8     spoofchk;
+		u8     trust;
+		u8     linkstate;
+		__le64 stats_pa;
+		u8     pad[60];
+	} __rte_packed;
+};
+
+struct ionic_vf_setattr_comp {
+	u8     status;
+	u8     attr;
+	__le16 vf_index;
+	__le16 comp_index;
+	u8     rsvd[9];
+	u8     color;
+};
+
+/**
+ * struct ionic_vf_getattr_cmd - Get VF attributes from the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_vf_attr)
+ * @vf_index:   VF index
+ */
+struct ionic_vf_getattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 vf_index;
+	u8     rsvd[60];
+};
+
+struct ionic_vf_getattr_comp {
+	u8     status;
+	u8     attr;
+	__le16 vf_index;
+	union {
+		u8     macaddr[6];
+		__le16 vlanid;
+		__le32 maxrate;
+		u8     spoofchk;
+		u8     trust;
+		u8     linkstate;
+		__le64 stats_pa;
+		u8     pad[11];
+	} __rte_packed;
+	u8     color;
+};
+
 /**
  * struct ionic_qos_identify_cmd - QoS identify command
- * @opcode:    opcode
+ * @opcode:  opcode
  * @ver:     Highest version of identify supported by driver
  *
  */
@@ -1601,7 +1875,7 @@ struct ionic_qos_identify_cmd {
 
 /**
  * struct ionic_qos_identify_comp - QoS identify command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_qos_identify_comp {
@@ -1610,9 +1884,15 @@ struct ionic_qos_identify_comp {
 	u8 rsvd[14];
 };
 
+#define IONIC_QOS_TC_MAX		8
+#define IONIC_QOS_ALL_TC		0xFF
+/* Capri max supported, should be renamed. */
 #define IONIC_QOS_CLASS_MAX		7
-#define IONIC_QOS_CLASS_NAME_SZ		32
-#define IONIC_QOS_DSCP_MAX_VALUES	64
+#define IONIC_QOS_PCP_MAX		8
+#define IONIC_QOS_CLASS_NAME_SZ	32
+#define IONIC_QOS_DSCP_MAX		64
+#define IONIC_QOS_ALL_PCP		0xFF
+#define IONIC_DSCP_BLOCK_SIZE		8
 
 /**
  * enum ionic_qos_class
@@ -1629,42 +1909,44 @@ enum ionic_qos_class {
 
 /**
  * enum ionic_qos_class_type - Traffic classification criteria
+ * @IONIC_QOS_CLASS_TYPE_NONE:    No QoS
+ * @IONIC_QOS_CLASS_TYPE_PCP:     Dot1Q PCP
+ * @IONIC_QOS_CLASS_TYPE_DSCP:    IP DSCP
  */
 enum ionic_qos_class_type {
 	IONIC_QOS_CLASS_TYPE_NONE	= 0,
-	IONIC_QOS_CLASS_TYPE_PCP	= 1,	/* Dot1Q pcp */
-	IONIC_QOS_CLASS_TYPE_DSCP	= 2,	/* IP dscp */
+	IONIC_QOS_CLASS_TYPE_PCP	= 1,
+	IONIC_QOS_CLASS_TYPE_DSCP	= 2,
 };
 
 /**
- * enum ionic_qos_sched_type - Qos class scheduling type
+ * enum ionic_qos_sched_type - QoS class scheduling type
+ * @IONIC_QOS_SCHED_TYPE_STRICT:  Strict priority
+ * @IONIC_QOS_SCHED_TYPE_DWRR:    Deficit weighted round-robin
  */
 enum ionic_qos_sched_type {
-	/* Strict priority */
 	IONIC_QOS_SCHED_TYPE_STRICT	= 0,
-	/* Deficit weighted round-robin */
 	IONIC_QOS_SCHED_TYPE_DWRR	= 1,
 };
 
 /**
- * union ionic_qos_config - Qos configuration structure
+ * union ionic_qos_config - QoS configuration structure
  * @flags:		Configuration flags
  *	IONIC_QOS_CONFIG_F_ENABLE		enable
- *	IONIC_QOS_CONFIG_F_DROP			drop/nodrop
+ *	IONIC_QOS_CONFIG_F_NO_DROP		drop/nodrop
  *	IONIC_QOS_CONFIG_F_RW_DOT1Q_PCP		enable dot1q pcp rewrite
  *	IONIC_QOS_CONFIG_F_RW_IP_DSCP		enable ip dscp rewrite
- * @sched_type:		Qos class scheduling type (enum ionic_qos_sched_type)
- * @class_type:		Qos class type (enum ionic_qos_class_type)
- * @pause_type:		Qos pause type (enum qos_pause_type)
- * @name:		Qos class name
+ *	IONIC_QOS_CONFIG_F_NON_DISRUPTIVE	Non-disruptive TC update
+ * @sched_type:		QoS class scheduling type (enum ionic_qos_sched_type)
+ * @class_type:		QoS class type (enum ionic_qos_class_type)
+ * @pause_type:		QoS pause type (enum ionic_qos_pause_type)
+ * @name:		QoS class name
  * @mtu:		MTU of the class
- * @pfc_dot1q_pcp:	Pcp value for pause frames (valid iff F_NODROP)
- * @dwrr_weight:	Qos class scheduling weight
+ * @pfc_cos:		Priority-Flow Control class of service
+ * @dwrr_weight:	QoS class scheduling weight
  * @strict_rlmt:	Rate limit for strict priority scheduling
- * @rw_dot1q_pcp:	Rewrite dot1q pcp to this value
- *			(valid iff F_RW_DOT1Q_PCP)
- * @rw_ip_dscp:		Rewrite ip dscp to this value
- *			(valid iff F_RW_IP_DSCP)
+ * @rw_dot1q_pcp:	Rewrite dot1q pcp to value (valid iff F_RW_DOT1Q_PCP)
+ * @rw_ip_dscp:		Rewrite ip dscp to value (valid iff F_RW_IP_DSCP)
  * @dot1q_pcp:		Dot1q pcp value
  * @ndscp:		Number of valid dscp values in the ip_dscp field
  * @ip_dscp:		IP dscp values
@@ -1672,9 +1954,12 @@ enum ionic_qos_sched_type {
 union ionic_qos_config {
 	struct {
 #define IONIC_QOS_CONFIG_F_ENABLE		BIT(0)
-#define IONIC_QOS_CONFIG_F_DROP			BIT(1)
+#define IONIC_QOS_CONFIG_F_NO_DROP		BIT(1)
+/* Used to rewrite PCP or DSCP value. */
 #define IONIC_QOS_CONFIG_F_RW_DOT1Q_PCP		BIT(2)
 #define IONIC_QOS_CONFIG_F_RW_IP_DSCP		BIT(3)
+/* Non-disruptive TC update */
+#define IONIC_QOS_CONFIG_F_NON_DISRUPTIVE	BIT(4)
 		u8      flags;
 		u8      sched_type;
 		u8      class_type;
@@ -1689,6 +1974,7 @@ union ionic_qos_config {
 			__le64  strict_rlmt;
 		};
 		/* marking */
+		/* Used to rewrite PCP or DSCP value. */
 		union {
 			u8      rw_dot1q_pcp;
 			u8      rw_ip_dscp;
@@ -1698,10 +1984,10 @@ union ionic_qos_config {
 			u8      dot1q_pcp;
 			struct {
 				u8      ndscp;
-				u8      ip_dscp[IONIC_QOS_DSCP_MAX_VALUES];
+				u8      ip_dscp[IONIC_QOS_DSCP_MAX];
 			};
 		};
-	};
+	} __rte_packed;
 	__le32  words[64];
 };
 
@@ -1717,15 +2003,15 @@ union ionic_qos_identity {
 		u8     version;
 		u8     type;
 		u8     rsvd[62];
-		union  ionic_qos_config config[IONIC_QOS_CLASS_MAX];
+		union ionic_qos_config config[IONIC_QOS_CLASS_MAX];
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
- * struct qos_init_cmd - QoS config init command
+ * struct ionic_qos_init_cmd - QoS config init command
  * @opcode:	Opcode
- * @group:	Qos class id
+ * @group:	QoS class id
  * @info_pa:	destination address for qos info
  */
 struct ionic_qos_init_cmd {
@@ -1739,8 +2025,9 @@ struct ionic_qos_init_cmd {
 typedef struct ionic_admin_comp ionic_qos_init_comp;
 
 /**
- * struct ionic_qos_reset_cmd - Qos config reset command
+ * struct ionic_qos_reset_cmd - QoS config reset command
  * @opcode:	Opcode
+ * @group:	QoS class id
  */
 struct ionic_qos_reset_cmd {
 	u8    opcode;
@@ -1748,6 +2035,16 @@ struct ionic_qos_reset_cmd {
 	u8    rsvd[62];
 };
 
+/**
+ * struct ionic_qos_clear_port_stats_cmd - Qos config reset command
+ * @opcode:	Opcode
+ */
+struct ionic_qos_clear_stats_cmd {
+	u8    opcode;
+	u8    group_bitmap;
+	u8    rsvd[62];
+};
+
 typedef struct ionic_admin_comp ionic_qos_reset_comp;
 
 /**
@@ -1767,10 +2064,16 @@ struct ionic_fw_download_cmd {
 
 typedef struct ionic_admin_comp ionic_fw_download_comp;
 
+/**
+ * enum ionic_fw_control_oper - FW control operations
+ * @IONIC_FW_RESET:     Reset firmware
+ * @IONIC_FW_INSTALL:   Install firmware
+ * @IONIC_FW_ACTIVATE:  Acticate firmware
+ */
 enum ionic_fw_control_oper {
-	IONIC_FW_RESET		= 0,	/* Reset firmware */
-	IONIC_FW_INSTALL	= 1,	/* Install firmware */
-	IONIC_FW_ACTIVATE	= 2,	/* Activate firmware */
+	IONIC_FW_RESET		= 0,
+	IONIC_FW_INSTALL	= 1,
+	IONIC_FW_ACTIVATE	= 2,
 };
 
 /**
@@ -1789,8 +2092,10 @@ struct ionic_fw_control_cmd {
 
 /**
  * struct ionic_fw_control_comp - Firmware control copletion
- * @opcode:    opcode
- * @slot:      slot where the firmware was installed
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @slot:       Slot where the firmware was installed
+ * @color:      Color bit
  */
 struct ionic_fw_control_comp {
 	u8     status;
@@ -1808,11 +2113,11 @@ struct ionic_fw_control_comp {
 /**
  * struct ionic_rdma_reset_cmd - Reset RDMA LIF cmd
  * @opcode:        opcode
- * @lif_index:     lif index
+ * @lif_index:     LIF index
  *
- * There is no rdma specific dev command completion struct.  Completion uses
+ * There is no RDMA specific dev command completion struct.  Completion uses
  * the common struct ionic_admin_comp.  Only the status is indicated.
- * Nonzero status means the LIF does not support rdma.
+ * Nonzero status means the LIF does not support RDMA.
  **/
 struct ionic_rdma_reset_cmd {
 	u8     opcode;
@@ -1824,30 +2129,29 @@ struct ionic_rdma_reset_cmd {
 /**
  * struct ionic_rdma_queue_cmd - Create RDMA Queue command
  * @opcode:        opcode, 52, 53
- * @lif_index      lif index
- * @qid_ver:       (qid | (rdma version << 24))
+ * @lif_index:     LIF index
+ * @qid_ver:       (qid | (RDMA version << 24))
  * @cid:           intr, eq_id, or cq_id
  * @dbid:          doorbell page id
  * @depth_log2:    log base two of queue depth
  * @stride_log2:   log base two of queue stride
  * @dma_addr:      address of the queue memory
- * @xxx_table_index: temporary, but should not need pgtbl for contig. queues.
  *
- * The same command struct is used to create an rdma event queue, completion
- * queue, or rdma admin queue.  The cid is an interrupt number for an event
+ * The same command struct is used to create an RDMA event queue, completion
+ * queue, or RDMA admin queue.  The cid is an interrupt number for an event
  * queue, an event queue id for a completion queue, or a completion queue id
- * for an rdma admin queue.
+ * for an RDMA admin queue.
  *
  * The queue created via a dev command must be contiguous in dma space.
  *
  * The dev commands are intended only to be used during driver initialization,
- * to create queues supporting the rdma admin queue.  Other queues, and other
- * types of rdma resources like memory regions, will be created and registered
- * via the rdma admin queue, and will support a more complete interface
+ * to create queues supporting the RDMA admin queue.  Other queues, and other
+ * types of RDMA resources like memory regions, will be created and registered
+ * via the RDMA admin queue, and will support a more complete interface
  * providing scatter gather lists for larger, scattered queue buffers and
  * memory registration.
  *
- * There is no rdma specific dev command completion struct.  Completion uses
+ * There is no RDMA specific dev command completion struct.  Completion uses
  * the common struct ionic_admin_comp.  Only the status is indicated.
  **/
 struct ionic_rdma_queue_cmd {
@@ -1860,8 +2164,7 @@ struct ionic_rdma_queue_cmd {
 	u8     depth_log2;
 	u8     stride_log2;
 	__le64 dma_addr;
-	u8     rsvd2[36];
-	__le32 xxx_table_index;
+	u8     rsvd2[40];
 };
 
 /******************************************************************
@@ -1869,7 +2172,7 @@ struct ionic_rdma_queue_cmd {
  ******************************************************************/
 
 /**
- * struct ionic_notifyq_event
+ * struct ionic_notifyq_event - Generic event reporting structure
  * @eid:   event number
  * @ecode: event code
  * @data:  unspecified data about the event
@@ -1884,10 +2187,10 @@ struct ionic_notifyq_event {
 };
 
 /**
- * struct ionic_link_change_event
+ * struct ionic_link_change_event - Link change event notification
  * @eid:		event number
- * @ecode:		event code = EVENT_OPCODE_LINK_CHANGE
- * @link_status:	link up or down, with error bits (enum port_status)
+ * @ecode:		event code = IONIC_EVENT_LINK_CHANGE
+ * @link_status:	link up/down, with error bits (enum ionic_port_status)
  * @link_speed:		speed of the network link
  *
  * Sent when the network link state changes between UP and DOWN
@@ -1901,9 +2204,9 @@ struct ionic_link_change_event {
 };
 
 /**
- * struct ionic_reset_event
+ * struct ionic_reset_event - Reset event notification
  * @eid:		event number
- * @ecode:		event code = EVENT_OPCODE_RESET
+ * @ecode:		event code = IONIC_EVENT_RESET
  * @reset_code:		reset type
  * @state:		0=pending, 1=complete, 2=error
  *
@@ -1919,11 +2222,9 @@ struct ionic_reset_event {
 };
 
 /**
- * struct ionic_heartbeat_event
+ * struct ionic_heartbeat_event - Sent periodically by NIC to indicate health
  * @eid:	event number
- * @ecode:	event code = EVENT_OPCODE_HEARTBEAT
- *
- * Sent periodically by the NIC to indicate continued health
+ * @ecode:	event code = IONIC_EVENT_HEARTBEAT
  */
 struct ionic_heartbeat_event {
 	__le64 eid;
@@ -1932,12 +2233,10 @@ struct ionic_heartbeat_event {
 };
 
 /**
- * struct ionic_log_event
+ * struct ionic_log_event - Sent to notify the driver of an internal error
  * @eid:	event number
- * @ecode:	event code = EVENT_OPCODE_LOG
+ * @ecode:	event code = IONIC_EVENT_LOG
  * @data:	log data
- *
- * Sent to notify the driver of an internal error.
  */
 struct ionic_log_event {
 	__le64 eid;
@@ -1946,7 +2245,18 @@ struct ionic_log_event {
 };
 
 /**
- * struct ionic_port_stats
+ * struct ionic_xcvr_event - Transceiver change event
+ * @eid:	event number
+ * @ecode:	event code = IONIC_EVENT_XCVR
+ */
+struct ionic_xcvr_event {
+	__le64 eid;
+	__le16 ecode;
+	u8     rsvd[54];
+};
+
+/**
+ * struct ionic_port_stats - Port statistics structure
  */
 struct ionic_port_stats {
 	__le64 frames_rx_ok;
@@ -2051,34 +2361,109 @@ struct ionic_mgmt_port_stats {
 	__le64 frames_rx_multicast;
 	__le64 frames_rx_broadcast;
 	__le64 frames_rx_pause;
-	__le64 frames_rx_bad_length0;
-	__le64 frames_rx_undersized1;
-	__le64 frames_rx_oversized2;
-	__le64 frames_rx_fragments3;
-	__le64 frames_rx_jabber4;
-	__le64 frames_rx_64b5;
-	__le64 frames_rx_65b_127b6;
-	__le64 frames_rx_128b_255b7;
-	__le64 frames_rx_256b_511b8;
-	__le64 frames_rx_512b_1023b9;
-	__le64 frames_rx_1024b_1518b0;
-	__le64 frames_rx_gt_1518b1;
-	__le64 frames_rx_fifo_full2;
-	__le64 frames_tx_ok3;
-	__le64 frames_tx_all4;
-	__le64 frames_tx_bad5;
-	__le64 octets_tx_ok6;
-	__le64 octets_tx_total7;
-	__le64 frames_tx_unicast8;
-	__le64 frames_tx_multicast9;
-	__le64 frames_tx_broadcast0;
-	__le64 frames_tx_pause1;
+	__le64 frames_rx_bad_length;
+	__le64 frames_rx_undersized;
+	__le64 frames_rx_oversized;
+	__le64 frames_rx_fragments;
+	__le64 frames_rx_jabber;
+	__le64 frames_rx_64b;
+	__le64 frames_rx_65b_127b;
+	__le64 frames_rx_128b_255b;
+	__le64 frames_rx_256b_511b;
+	__le64 frames_rx_512b_1023b;
+	__le64 frames_rx_1024b_1518b;
+	__le64 frames_rx_gt_1518b;
+	__le64 frames_rx_fifo_full;
+	__le64 frames_tx_ok;
+	__le64 frames_tx_all;
+	__le64 frames_tx_bad;
+	__le64 octets_tx_ok;
+	__le64 octets_tx_total;
+	__le64 frames_tx_unicast;
+	__le64 frames_tx_multicast;
+	__le64 frames_tx_broadcast;
+	__le64 frames_tx_pause;
+};
+
+enum ionic_pb_buffer_drop_stats {
+	IONIC_BUFFER_INTRINSIC_DROP = 0,
+	IONIC_BUFFER_DISCARDED,
+	IONIC_BUFFER_ADMITTED,
+	IONIC_BUFFER_OUT_OF_CELLS_DROP,
+	IONIC_BUFFER_OUT_OF_CELLS_DROP_2,
+	IONIC_BUFFER_OUT_OF_CREDIT_DROP,
+	IONIC_BUFFER_TRUNCATION_DROP,
+	IONIC_BUFFER_PORT_DISABLED_DROP,
+	IONIC_BUFFER_COPY_TO_CPU_TAIL_DROP,
+	IONIC_BUFFER_SPAN_TAIL_DROP,
+	IONIC_BUFFER_MIN_SIZE_VIOLATION_DROP,
+	IONIC_BUFFER_ENQUEUE_ERROR_DROP,
+	IONIC_BUFFER_INVALID_PORT_DROP,
+	IONIC_BUFFER_INVALID_OUTPUT_QUEUE_DROP,
+	IONIC_BUFFER_DROP_MAX,
+};
+
+enum ionic_oflow_drop_stats {
+	IONIC_OFLOW_OCCUPANCY_DROP,
+	IONIC_OFLOW_EMERGENCY_STOP_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_ACK_FILL_UP_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_ACK_FULL_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_FULL_DROP,
+	IONIC_OFLOW_CONTROL_FIFO_FULL_DROP,
+	IONIC_OFLOW_DROP_MAX,
+};
+
+/**
+ * struct port_pb_stats - packet buffers system stats
+ * uses ionic_pb_buffer_drop_stats for drop_counts[]
+ */
+struct ionic_port_pb_stats {
+	__le64 sop_count_in;
+	__le64 eop_count_in;
+	__le64 sop_count_out;
+	__le64 eop_count_out;
+	__le64 drop_counts[IONIC_BUFFER_DROP_MAX];
+	__le64 input_queue_buffer_occupancy[IONIC_QOS_TC_MAX];
+	__le64 input_queue_port_monitor[IONIC_QOS_TC_MAX];
+	__le64 output_queue_port_monitor[IONIC_QOS_TC_MAX];
+	__le64 oflow_drop_counts[IONIC_OFLOW_DROP_MAX];
+	__le64 input_queue_good_pkts_in[IONIC_QOS_TC_MAX];
+	__le64 input_queue_good_pkts_out[IONIC_QOS_TC_MAX];
+	__le64 input_queue_err_pkts_in[IONIC_QOS_TC_MAX];
+	__le64 input_queue_fifo_depth[IONIC_QOS_TC_MAX];
+	__le64 input_queue_max_fifo_depth[IONIC_QOS_TC_MAX];
+	__le64 input_queue_peak_occupancy[IONIC_QOS_TC_MAX];
+	__le64 output_queue_buffer_occupancy[IONIC_QOS_TC_MAX];
+};
+
+/**
+ * enum ionic_port_type - Port types
+ * @IONIC_ETH_UNKNOWN:             Port type not configured
+ * @IONIC_ETH_HOST:                Port carries ethernet traffic (inband)
+ * @IONIC_ETH_HOST_MGMT:           Port carries mgmt traffic (out-of-band)
+ * @IONIC_ETH_MNIC_OOB_MGMT:
+ * @IONIC_ETH_MNIC_INTERNAL_MGMT:
+ * @IONIC_ETH_MNIC_INBAND_MGMT:
+ * @IONIC_ETH_MNIC_CPU:
+ * @IONIC_ETH_MNIC_LEARN:
+ * @IONIC_ETH_MNIC_CONTROL:
+ */
+enum ionic_port_type {
+	IONIC_ETH_UNKNOWN,
+	IONIC_ETH_HOST,
+	IONIC_ETH_HOST_MGMT,
+	IONIC_ETH_MNIC_OOB_MGMT,
+	IONIC_ETH_MNIC_INTERNAL_MGMT,
+	IONIC_ETH_MNIC_INBAND_MGMT,
+	IONIC_ETH_MNIC_CPU,
+	IONIC_ETH_MNIC_LEARN,
+	IONIC_ETH_MNIC_CONTROL,
 };
 
 /**
  * struct ionic_port_identity - port identity structure
  * @version:        identity structure version
- * @type:           type of port (enum port_type)
+ * @type:           type of port (enum ionic_port_type)
  * @num_lanes:      number of lanes for the port
  * @autoneg:        autoneg supported
  * @min_frame_size: minimum frame size supported
@@ -2104,22 +2489,31 @@ union ionic_port_identity {
 		u8     rsvd2[44];
 		union ionic_port_config config;
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
  * struct ionic_port_info - port info structure
- * @port_status:     port status
- * @port_stats:      port stats
+ * @config:          Port configuration data
+ * @status:          Port status data
+ * @stats:           Port statistics data
+ * @mgmt_stats:      Port management statistics data
+ * @port_pb_drop_stats:   uplink pb drop stats
  */
 struct ionic_port_info {
 	union ionic_port_config config;
 	struct ionic_port_status status;
-	struct ionic_port_stats stats;
+	union {
+		struct ionic_port_stats      stats;
+		struct ionic_mgmt_port_stats mgmt_stats;
+	};
+	/* room for pb_stats to start at 2k offset */
+	u8                          rsvd[760];
+	struct ionic_port_pb_stats  pb_stats;
 };
 
 /**
- * struct ionic_lif_stats
+ * struct ionic_lif_stats - LIF statistics structure
  */
 struct ionic_lif_stats {
 	/* RX */
@@ -2172,7 +2566,7 @@ struct ionic_lif_stats {
 	__le64 tx_queue_error;
 	__le64 tx_desc_fetch_error;
 	__le64 tx_desc_data_error;
-	__le64 rsvd9;
+	__le64 tx_queue_empty;
 	__le64 rsvd10;
 	__le64 rsvd11;
 	__le64 rsvd12;
@@ -2273,7 +2667,10 @@ struct ionic_lif_stats {
 };
 
 /**
- * struct ionic_lif_info - lif info structure
+ * struct ionic_lif_info - LIF info structure
+ * @config:	LIF configuration structure
+ * @status:	LIF status structure
+ * @stats:	LIF statistics structure
  */
 struct ionic_lif_info {
 	union ionic_lif_config config;
@@ -2298,6 +2695,9 @@ union ionic_dev_cmd {
 	struct ionic_port_getattr_cmd port_getattr;
 	struct ionic_port_setattr_cmd port_setattr;
 
+	struct ionic_vf_setattr_cmd vf_setattr;
+	struct ionic_vf_getattr_cmd vf_getattr;
+
 	struct ionic_lif_identify_cmd lif_identify;
 	struct ionic_lif_init_cmd lif_init;
 	struct ionic_lif_reset_cmd lif_reset;
@@ -2305,8 +2705,11 @@ union ionic_dev_cmd {
 	struct ionic_qos_identify_cmd qos_identify;
 	struct ionic_qos_init_cmd qos_init;
 	struct ionic_qos_reset_cmd qos_reset;
+	struct ionic_qos_clear_stats_cmd qos_clear_stats;
 
+	struct ionic_q_identify_cmd q_identify;
 	struct ionic_q_init_cmd q_init;
+	struct ionic_q_control_cmd q_control;
 };
 
 union ionic_dev_cmd_comp {
@@ -2327,6 +2730,9 @@ union ionic_dev_cmd_comp {
 	struct ionic_port_getattr_comp port_getattr;
 	struct ionic_port_setattr_comp port_setattr;
 
+	struct ionic_vf_setattr_comp vf_setattr;
+	struct ionic_vf_getattr_comp vf_getattr;
+
 	struct ionic_lif_identify_comp lif_identify;
 	struct ionic_lif_init_comp lif_init;
 	ionic_lif_reset_comp lif_reset;
@@ -2335,19 +2741,20 @@ union ionic_dev_cmd_comp {
 	ionic_qos_init_comp qos_init;
 	ionic_qos_reset_comp qos_reset;
 
+	struct ionic_q_identify_comp q_identify;
 	struct ionic_q_init_comp q_init;
 };
 
 /**
- * union dev_info - Device info register format (read-only)
- * @signature:       Signature value of 0x44455649 ('DEVI').
- * @version:         Current version of info.
- * @asic_type:       Asic type.
- * @asic_rev:        Asic revision.
- * @fw_status:       Firmware status.
- * @fw_heartbeat:    Firmware heartbeat counter.
- * @serial_num:      Serial number.
- * @fw_version:      Firmware version.
+ * union ionic_dev_info_regs - Device info register format (read-only)
+ * @signature:       Signature value of 0x44455649 ('DEVI')
+ * @version:         Current version of info
+ * @asic_type:       Asic type
+ * @asic_rev:        Asic revision
+ * @fw_status:       Firmware status
+ * @fw_heartbeat:    Firmware heartbeat counter
+ * @serial_num:      Serial number
+ * @fw_version:      Firmware version
  */
 union ionic_dev_info_regs {
 #define IONIC_DEVINFO_FWVERS_BUFLEN 32
@@ -2357,6 +2764,7 @@ union ionic_dev_info_regs {
 		u8     version;
 		u8     asic_type;
 		u8     asic_rev;
+#define IONIC_FW_STS_F_RUNNING	0x1
 		u8     fw_status;
 		u32    fw_heartbeat;
 		char   fw_version[IONIC_DEVINFO_FWVERS_BUFLEN];
@@ -2367,10 +2775,10 @@ union ionic_dev_info_regs {
 
 /**
  * union ionic_dev_cmd_regs - Device command register format (read-write)
- * @doorbell:        Device Cmd Doorbell, write-only.
+ * @doorbell:        Device Cmd Doorbell, write-only
  *                   Write a 1 to signal device to process cmd,
  *                   poll done for completion.
- * @done:            Done indicator, bit 0 == 1 when command is complete.
+ * @done:            Done indicator, bit 0 == 1 when command is complete
  * @cmd:             Opcode-specific command bytes
  * @comp:            Opcode-specific response bytes
  * @data:            Opcode-specific side-data
@@ -2383,12 +2791,12 @@ union ionic_dev_cmd_regs {
 		union ionic_dev_cmd_comp    comp;
 		u8                    rsvd[48];
 		u32                   data[478];
-	};
+	} __rte_packed;
 	u32 words[512];
 };
 
 /**
- * union ionic_dev_regs - Device register format in for bar 0 page 0
+ * union ionic_dev_regs - Device register format for bar 0 page 0
  * @info:            Device info registers
  * @devcmd:          Device command registers
  */
@@ -2396,13 +2804,14 @@ union ionic_dev_regs {
 	struct {
 		union ionic_dev_info_regs info;
 		union ionic_dev_cmd_regs  devcmd;
-	};
+	} __rte_packed;
 	__le32 words[1024];
 };
 
 union ionic_adminq_cmd {
 	struct ionic_admin_cmd cmd;
 	struct ionic_nop_cmd nop;
+	struct ionic_q_identify_cmd q_identify;
 	struct ionic_q_init_cmd q_init;
 	struct ionic_q_control_cmd q_control;
 	struct ionic_lif_setattr_cmd lif_setattr;
@@ -2419,6 +2828,7 @@ union ionic_adminq_cmd {
 union ionic_adminq_comp {
 	struct ionic_admin_comp comp;
 	struct ionic_nop_comp nop;
+	struct ionic_q_identify_comp q_identify;
 	struct ionic_q_init_comp q_init;
 	struct ionic_lif_setattr_comp lif_setattr;
 	struct ionic_lif_getattr_comp lif_getattr;
@@ -2444,14 +2854,14 @@ union ionic_adminq_comp {
 /**
  * struct ionic_doorbell - Doorbell register layout
  * @p_index: Producer index
- * @ring:    Selects the specific ring of the queue to update.
+ * @ring:    Selects the specific ring of the queue to update
  *           Type-specific meaning:
- *              ring=0: Default producer/consumer queue.
+ *              ring=0: Default producer/consumer queue
  *              ring=1: (CQ, EQ) Re-Arm queue.  RDMA CQs
  *              send events to EQs when armed.  EQs send
  *              interrupts when armed.
- * @qid:     The queue id selects the queue destination for the
- *           producer index and flags.
+ * @qid_lo:  Queue destination for the producer index and flags (low bits)
+ * @qid_hi:  Queue destination for the producer index and flags (high bits)
  */
 struct ionic_doorbell {
 	__le16 p_index;
@@ -2461,6 +2871,92 @@ struct ionic_doorbell {
 	u16    rsvd2;
 };
 
+/**
+ * struct ionic_intr_ctrl - Interrupt control register
+ * @coalescing_init:  Coalescing timer initial value, in
+ *                    device units.  Use @identity->intr_coal_mult
+ *                    and @identity->intr_coal_div to convert from
+ *                    usecs to device units:
+ *
+ *                      coal_init = coal_usecs * coal_mutl / coal_div
+ *
+ *                    When an interrupt is sent the interrupt
+ *                    coalescing timer current value
+ *                    (@coalescing_curr) is initialized with this
+ *                    value and begins counting down.  No more
+ *                    interrupts are sent until the coalescing
+ *                    timer reaches 0.  When @coalescing_init=0
+ *                    interrupt coalescing is effectively disabled
+ *                    and every interrupt assert results in an
+ *                    interrupt.  Reset value: 0
+ * @mask:             Interrupt mask.  When @mask=1 the interrupt
+ *                    resource will not send an interrupt.  When
+ *                    @mask=0 the interrupt resource will send an
+ *                    interrupt if an interrupt event is pending
+ *                    or on the next interrupt assertion event.
+ *                    Reset value: 1
+ * @int_credits:      Interrupt credits.  This register indicates
+ *                    how many interrupt events the hardware has
+ *                    sent.  When written by software this
+ *                    register atomically decrements @int_credits
+ *                    by the value written.  When @int_credits
+ *                    becomes 0 then the "pending interrupt" bit
+ *                    in the Interrupt Status register is cleared
+ *                    by the hardware and any pending but unsent
+ *                    interrupts are cleared.
+ *                    !!!IMPORTANT!!! This is a signed register.
+ * @flags:            Interrupt control flags
+ *                       @unmask -- When this bit is written with a 1
+ *                       the interrupt resource will set mask=0.
+ *                       @coal_timer_reset -- When this
+ *                       bit is written with a 1 the
+ *                       @coalescing_curr will be reloaded with
+ *                       @coalescing_init to reset the coalescing
+ *                       timer.
+ * @mask_on_assert:   Automatically mask on assertion.  When
+ *                    @mask_on_assert=1 the interrupt resource
+ *                    will set @mask=1 whenever an interrupt is
+ *                    sent.  When using interrupts in Legacy
+ *                    Interrupt mode the driver must select
+ *                    @mask_on_assert=0 for proper interrupt
+ *                    operation.
+ * @coalescing_curr:  Coalescing timer current value, in
+ *                    microseconds.  When this value reaches 0
+ *                    the interrupt resource is again eligible to
+ *                    send an interrupt.  If an interrupt event
+ *                    is already pending when @coalescing_curr
+ *                    reaches 0 the pending interrupt will be
+ *                    sent, otherwise an interrupt will be sent
+ *                    on the next interrupt assertion event.
+ */
+struct ionic_intr_ctrl {
+	u8 coalescing_init;
+	u8 rsvd[3];
+	u8 mask;
+	u8 rsvd2[3];
+	u16 int_credits;
+	u16 flags;
+#define INTR_F_UNMASK		0x0001
+#define INTR_F_TIMER_RESET	0x0002
+	u8 mask_on_assert;
+	u8 rsvd3[3];
+	u8 coalescing_curr;
+	u8 rsvd4[3];
+	u32 rsvd6[3];
+};
+
+#define IONIC_INTR_CTRL_REGS_MAX	2048
+#define IONIC_INTR_CTRL_COAL_MAX	0x3F
+
+#define intr_to_coal(intr_ctrl)		\
+		((void __iomem *)&(intr_ctrl)->coalescing_init)
+#define intr_to_mask(intr_ctrl)		\
+		((void __iomem *)&(intr_ctrl)->mask)
+#define intr_to_credits(intr_ctrl)	\
+		((void __iomem *)&(intr_ctrl)->int_credits)
+#define intr_to_mask_on_assert(intr_ctrl)\
+		((void __iomem *)&(intr_ctrl)->mask_on_assert)
+
 struct ionic_intr_status {
 	u32 status[2];
 };
@@ -2477,6 +2973,28 @@ union ionic_notifyq_comp {
 	struct ionic_log_event log;
 };
 
+/**
+ * struct ionic_eq_comp - Event queue completion descriptor
+ *
+ * @code:	Event code, see enum ionic_eq_comp_code
+ * @lif_index:	To which LIF the event pertains
+ * @qid:	To which queue id the event pertains
+ * @gen_color:	Event queue wrap counter, init 1, incr each wrap
+ */
+struct ionic_eq_comp {
+	__le16 code;
+	__le16 lif_index;
+	__le32 qid;
+	u8 rsvd[7];
+	u8 gen_color;
+};
+
+enum ionic_eq_comp_code {
+	IONIC_EQ_COMP_CODE_NONE = 0,
+	IONIC_EQ_COMP_CODE_RX_COMP = 1,
+	IONIC_EQ_COMP_CODE_TX_COMP = 2,
+};
+
 /* Deprecate */
 struct ionic_identity {
 	union ionic_drv_identity drv;
@@ -2484,8 +3002,7 @@ struct ionic_identity {
 	union ionic_lif_identity lif;
 	union ionic_port_identity port;
 	union ionic_qos_identity qos;
+	union ionic_q_identity txq;
 };
 
-#pragma pack(pop)
-
 #endif /* _IONIC_IF_H_ */
diff --git a/drivers/net/ionic/ionic_regs.h b/drivers/net/ionic/ionic_regs.h
index 3adc2bc7c..6ebc48d04 100644
--- a/drivers/net/ionic/ionic_regs.h
+++ b/drivers/net/ionic/ionic_regs.h
@@ -21,9 +21,6 @@ struct ionic_intr {
 	uint32_t rsvd[3];
 };
 
-#define IONIC_INTR_CTRL_REGS_MAX	2048
-#define IONIC_INTR_CTRL_COAL_MAX	0x3F
-
 /** enum ionic_intr_mask_vals - valid values for mask and mask_assert.
  * @IONIC_INTR_MASK_CLEAR:	unmask interrupt.
  * @IONIC_INTR_MASK_SET:	mask interrupt.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v3 3/9] net/ionic: update documentation and MAINTAINERS
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
                     ` (2 preceding siblings ...)
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 2/9] net/ionic: update interface file to the latest version Andrew Boyer
@ 2020-12-04 20:16   ` Andrew Boyer
  2020-12-09 12:03     ` Ferruh Yigit
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 4/9] net/ionic: check for cmd completion more frequently Andrew Boyer
                     ` (5 subsequent siblings)
  9 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-12-04 20:16 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

The UNMAINTAINED flag will be removed in a future patch.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 MAINTAINERS                        |  3 ++-
 doc/guides/nics/features/ionic.ini |  2 ++
 doc/guides/nics/ionic.rst          | 13 +++++++------
 3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index eafe9f8c4..6534983c1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -841,7 +841,8 @@ F: drivers/net/pfe/
 F: doc/guides/nics/features/pfe.ini
 
 Pensando ionic - UNMAINTAINED
-M: Alfredo Cardigliano <cardigliano@ntop.org>
+M: Andrew Boyer <aboyer@pensando.io>
+M: Pensando Drivers <drivers@pensando.io>
 F: drivers/net/ionic/
 F: doc/guides/nics/ionic.rst
 F: doc/guides/nics/features/ionic.ini
diff --git a/doc/guides/nics/features/ionic.ini b/doc/guides/nics/features/ionic.ini
index 083c7bd99..dd29dbed6 100644
--- a/doc/guides/nics/features/ionic.ini
+++ b/doc/guides/nics/features/ionic.ini
@@ -8,6 +8,7 @@ Speed capabilities   = Y
 Link status          = Y
 Link status event    = Y
 Queue start/stop     = Y
+Lock-free Tx queue   = Y
 MTU update           = Y
 Jumbo frame          = Y
 Scattered Rx         = Y
@@ -19,6 +20,7 @@ Unicast MAC filter   = Y
 RSS hash             = Y
 RSS key update       = Y
 RSS reta update      = Y
+SR-IOV               = Y
 VLAN filter          = Y
 VLAN offload         = Y
 Flow control         = Y
diff --git a/doc/guides/nics/ionic.rst b/doc/guides/nics/ionic.rst
index fd32926bf..0b78cfbac 100644
--- a/doc/guides/nics/ionic.rst
+++ b/doc/guides/nics/ionic.rst
@@ -1,5 +1,5 @@
 ..  SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
-    Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
+    Copyright(c) 2018-2020 Pensando Systems, Inc. All rights reserved.
 
 IONIC Driver
 ============
@@ -7,15 +7,16 @@ IONIC Driver
 The ionic driver provides support for Pensando server adapters.
 It currently supports the below models:
 
-- `Naples DSC-25 <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>`_
-- `Naples DSC-100 <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>`_
+- DSC-25 dual-port 25G Distributed Services Card
+- DSC-100 dual-port 100G Distributed Services Card
 
-Please visit https://pensando.io for more information.
+Please visit the Pensando web site at https://pensando.io for more information.
+The `Documents <https://pensando.io/documents/>`_ page contains Product Briefs and other product information.
 
 Identifying the Adapter
 -----------------------
 
-To find if one or more Pensando PCI Ethernet devices are installed
+To determine if one or more Pensando DSC Ethernet devices are installed
 on the host, check for the PCI devices:
 
    .. code-block:: console
@@ -28,6 +29,6 @@ on the host, check for the PCI devices:
 Building DPDK
 -------------
 
-The ionic PMD driver supports UIO and VFIO, please refer to the
+The ionic PMD supports UIO and VFIO. Please refer to the
 :ref:`DPDK documentation that comes with the DPDK suite <linux_gsg>`
 for instructions on how to build DPDK.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v3 4/9] net/ionic: check for cmd completion more frequently
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
                     ` (3 preceding siblings ...)
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
@ 2020-12-04 20:16   ` Andrew Boyer
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 5/9] net/ionic: remove some unused fields Andrew Boyer
                     ` (4 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-04 20:16 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer, Neel Patel

This reduces the startup time a bit.

Signed-off-by: Neel Patel <neel@pensando.io>
Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_dev.h   |  4 +++-
 drivers/net/ionic/ionic_main.c  | 36 ++++++++++++++++-----------------
 drivers/net/ionic/ionic_osdep.h | 10 ---------
 3 files changed, 21 insertions(+), 29 deletions(-)

diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index 532255a60..dc64a6d28 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -20,7 +20,9 @@
 
 #define IONIC_LIFS_MAX			1024
 
-#define IONIC_DEVCMD_TIMEOUT	30 /* devcmd_timeout */
+#define IONIC_DEVCMD_TIMEOUT		5	/* devcmd_timeout */
+#define IONIC_DEVCMD_CHECK_PERIOD_US	10	/* devcmd status chk period */
+
 #define	IONIC_ALIGN             4096
 
 struct ionic_adapter;
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index 2ade213d2..f77bddaa4 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -144,12 +144,12 @@ static int
 ionic_wait_ctx_for_completion(struct ionic_lif *lif, struct ionic_qcq *qcq,
 		struct ionic_admin_ctx *ctx, unsigned long max_wait)
 {
-	unsigned long step_msec = 1;
-	unsigned int max_wait_msec = max_wait * 1000;
-	unsigned long elapsed_msec = 0;
+	unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US;
+	unsigned long max_wait_usec = max_wait * 1000000L;
+	unsigned long elapsed_usec = 0;
 	int budget = 8;
 
-	while (ctx->pending_work && elapsed_msec < max_wait_msec) {
+	while (ctx->pending_work && elapsed_usec < max_wait_usec) {
 		/*
 		 * Locking here as adminq is served inline (this could be called
 		 * from multiple places)
@@ -160,8 +160,8 @@ ionic_wait_ctx_for_completion(struct ionic_lif *lif, struct ionic_qcq *qcq,
 
 		rte_spinlock_unlock(&lif->adminq_service_lock);
 
-		msec_delay(step_msec);
-		elapsed_msec += step_msec;
+		rte_delay_us_block(step_usec);
+		elapsed_usec += step_usec;
 	}
 
 	return (!ctx->pending_work);
@@ -195,9 +195,9 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 static int
 ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait)
 {
-	unsigned long step_msec = 100;
-	unsigned int max_wait_msec = max_wait * 1000;
-	unsigned long elapsed_msec = 0;
+	unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US;
+	unsigned long max_wait_usec = max_wait * 1000000L;
+	unsigned long elapsed_usec = 0;
 	int done;
 
 	/* Wait for dev cmd to complete.. but no more than max_wait sec */
@@ -205,20 +205,20 @@ ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait)
 	do {
 		done = ionic_dev_cmd_done(idev);
 		if (done) {
-			IONIC_PRINT(DEBUG, "DEVCMD %d done took %ld msecs",
-				idev->dev_cmd->cmd.cmd.opcode,
-				elapsed_msec);
+			IONIC_PRINT(DEBUG, "DEVCMD %d done took %ld usecs",
+				ioread8(&idev->dev_cmd->cmd.cmd.opcode),
+				elapsed_usec);
 			return 0;
 		}
 
-		msec_delay(step_msec);
+		rte_delay_us_block(step_usec);
 
-		elapsed_msec += step_msec;
-	} while (elapsed_msec < max_wait_msec);
+		elapsed_usec += step_usec;
+	} while (elapsed_usec < max_wait_usec);
 
-	IONIC_PRINT(DEBUG, "DEVCMD %d timeout after %ld msecs",
-		idev->dev_cmd->cmd.cmd.opcode,
-		elapsed_msec);
+	IONIC_PRINT(ERR, "DEVCMD %d timeout after %ld usecs",
+		ioread8(&idev->dev_cmd->cmd.cmd.opcode),
+		elapsed_usec);
 
 	return -ETIMEDOUT;
 }
diff --git a/drivers/net/ionic/ionic_osdep.h b/drivers/net/ionic/ionic_osdep.h
index e04bb8f65..a55d59918 100644
--- a/drivers/net/ionic/ionic_osdep.h
+++ b/drivers/net/ionic/ionic_osdep.h
@@ -20,13 +20,8 @@
 
 #include "ionic_logs.h"
 
-#define DELAY(x) rte_delay_us(x)
-#define usec_delay(x) DELAY(x)
-#define msec_delay(x) DELAY(1000 * (x))
-
 #define BIT(nr)            (1UL << (nr))
 #define BIT_ULL(nr)        (1ULL << (nr))
-#define BITS_TO_LONGS(nr)  div_round_up(nr, 8 * sizeof(long))
 
 #ifndef PAGE_SHIFT
 #define PAGE_SHIFT      12
@@ -44,11 +39,6 @@ typedef uint16_t __le16;
 typedef uint32_t __le32;
 typedef uint64_t __le64;
 
-static inline uint32_t div_round_up(uint32_t n, uint32_t d)
-{
-	return (n + d - 1) / d;
-}
-
 #define ioread8(reg)		rte_read8(reg)
 #define ioread32(reg)		rte_read32(reg)
 #define iowrite8(value, reg)	rte_write8(value, reg)
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v3 5/9] net/ionic: remove some unused fields
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
                     ` (4 preceding siblings ...)
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 4/9] net/ionic: check for cmd completion more frequently Andrew Boyer
@ 2020-12-04 20:16   ` Andrew Boyer
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 6/9] net/ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
                     ` (3 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-04 20:16 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

This conserves resources.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic.h        |  1 -
 drivers/net/ionic/ionic_dev.c    |  5 +----
 drivers/net/ionic/ionic_dev.h    |  7 +------
 drivers/net/ionic/ionic_ethdev.c |  2 --
 drivers/net/ionic/ionic_lif.c    | 22 ++++++----------------
 drivers/net/ionic/ionic_lif.h    |  2 --
 drivers/net/ionic/ionic_regs.h   |  6 ------
 7 files changed, 8 insertions(+), 37 deletions(-)

diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h
index 1538df309..a93110326 100644
--- a/drivers/net/ionic/ionic.h
+++ b/drivers/net/ionic/ionic.h
@@ -59,7 +59,6 @@ struct ionic_adapter {
 	uint32_t link_speed;
 	uint32_t nintrs;
 	bool intrs[IONIC_INTR_CTRL_REGS_MAX];
-	bool is_mgmt_nic;
 	bool link_up;
 	char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN];
 	struct rte_pci_device *pci_dev;
diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c
index 5c2820b7a..fc68f5c74 100644
--- a/drivers/net/ionic/ionic_dev.c
+++ b/drivers/net/ionic/ionic_dev.c
@@ -65,7 +65,6 @@ ionic_dev_setup(struct ionic_adapter *adapter)
 	}
 
 	idev->db_pages = bar->vaddr;
-	idev->phy_db_pages = bar->bus_addr;
 
 	return 0;
 }
@@ -343,7 +342,6 @@ ionic_dev_cmd_adminq_init(struct ionic_dev *idev,
 		.q_init.type = q->type,
 		.q_init.index = q->index,
 		.q_init.flags = IONIC_QINIT_F_ENA,
-		.q_init.pid = q->pid,
 		.q_init.intr_index = intr_index,
 		.q_init.ring_size = rte_log2_u32(q->num_descs),
 		.q_init.ring_base = q->base_pa,
@@ -419,7 +417,7 @@ ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,
 int
 ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	     struct ionic_queue *q, uint32_t index, uint32_t num_descs,
-	     size_t desc_size, size_t sg_desc_size, uint32_t pid)
+	     size_t desc_size, size_t sg_desc_size)
 {
 	uint32_t ring_size;
 
@@ -439,7 +437,6 @@ ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	q->sg_desc_size = sg_desc_size;
 	q->head_idx = 0;
 	q->tail_idx = 0;
-	q->pid = pid;
 
 	return 0;
 }
diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index dc64a6d28..7150f7f2c 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -120,10 +120,7 @@ struct ionic_dev {
 	union ionic_dev_cmd_regs __iomem *dev_cmd;
 
 	struct ionic_doorbell __iomem *db_pages;
-	rte_iova_t phy_db_pages;
-
 	struct ionic_intr __iomem *intr_ctrl;
-
 	struct ionic_intr_status __iomem *intr_status;
 
 	struct ionic_port_info *port_info;
@@ -163,11 +160,9 @@ struct ionic_queue {
 	uint32_t num_descs;
 	uint32_t desc_size;
 	uint32_t sg_desc_size;
-	uint32_t pid;
 	uint32_t qid;
 	uint32_t qtype;
 	struct ionic_doorbell __iomem *db;
-	void *nop_desc;
 };
 
 #define IONIC_INTR_INDEX_NOT_ASSIGNED	(-1)
@@ -257,7 +252,7 @@ uint32_t ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,
 
 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	struct ionic_queue *q, uint32_t index, uint32_t num_descs,
-	size_t desc_size, size_t sg_desc_size, uint32_t pid);
+	size_t desc_size, size_t sg_desc_size);
 void ionic_q_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
 void ionic_q_sg_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
 void ionic_q_flush(struct ionic_queue *q);
diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index 600333e20..cd79f250e 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -1178,8 +1178,6 @@ eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 		goto err_free_adapter;
 	}
 
-	adapter->is_mgmt_nic = (pci_dev->id.device_id == IONIC_DEV_ID_ETH_MGMT);
-
 	adapter->num_bars = 0;
 	for (i = 0; i < PCI_MAX_RESOURCE && i < IONIC_BARS_MAX; i++) {
 		resource = &pci_dev->mem_resource[i];
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 60a5f3d53..bc15d75fd 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -536,8 +536,6 @@ ionic_lif_change_mtu(struct ionic_lif *lif, int new_mtu)
 	if (err)
 		return err;
 
-	lif->mtu = new_mtu;
-
 	return 0;
 }
 
@@ -583,7 +581,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 		uint32_t desc_size,
 		uint32_t cq_desc_size,
 		uint32_t sg_desc_size,
-		uint32_t pid, struct ionic_qcq **qcq)
+		struct ionic_qcq **qcq)
 {
 	struct ionic_dev *idev = &lif->adapter->idev;
 	struct ionic_qcq *new;
@@ -633,7 +631,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 	new->q.type = type;
 
 	err = ionic_q_init(lif, idev, &new->q, index, num_descs,
-		desc_size, sg_desc_size, pid);
+		desc_size, sg_desc_size);
 	if (err) {
 		IONIC_PRINT(ERR, "Queue initialization failed");
 		return err;
@@ -734,7 +732,7 @@ ionic_rx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t nrxq_descs,
 		sizeof(struct ionic_rxq_desc),
 		sizeof(struct ionic_rxq_comp),
 		sizeof(struct ionic_rxq_sg_desc),
-		lif->kern_pid, &lif->rxqcqs[index]);
+		&lif->rxqcqs[index]);
 	if (err)
 		return err;
 
@@ -756,7 +754,7 @@ ionic_tx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t ntxq_descs,
 		sizeof(struct ionic_txq_desc),
 		sizeof(struct ionic_txq_comp),
 		sizeof(struct ionic_txq_sg_desc),
-		lif->kern_pid, &lif->txqcqs[index]);
+		&lif->txqcqs[index]);
 	if (err)
 		return err;
 
@@ -777,7 +775,7 @@ ionic_admin_qcq_alloc(struct ionic_lif *lif)
 		sizeof(struct ionic_admin_cmd),
 		sizeof(struct ionic_admin_comp),
 		0,
-		lif->kern_pid, &lif->adminqcq);
+		&lif->adminqcq);
 	if (err)
 		return err;
 
@@ -798,7 +796,7 @@ ionic_notify_qcq_alloc(struct ionic_lif *lif)
 		sizeof(struct ionic_notifyq_cmd),
 		sizeof(union ionic_notifyq_comp),
 		0,
-		lif->kern_pid, &lif->notifyqcq);
+		&lif->notifyqcq);
 	if (err)
 		return err;
 
@@ -831,8 +829,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
 	rte_spinlock_init(&lif->adminq_lock);
 	rte_spinlock_init(&lif->adminq_service_lock);
 
-	lif->kern_pid = 0;
-
 	dbpage_num = ionic_db_page_num(lif, 0);
 
 	lif->kern_dbpage = ionic_bus_map_dbpage(adapter, dbpage_num);
@@ -1211,13 +1207,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
 			.index = q->index,
 			.flags = (IONIC_QINIT_F_IRQ | IONIC_QINIT_F_ENA),
 			.intr_index = qcq->intr.index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 		}
 	};
 
-	IONIC_PRINT(DEBUG, "notifyq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "notifyq_init.index %d",
 		ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
@@ -1320,7 +1314,6 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 			.index = q->index,
 			.flags = IONIC_QINIT_F_SG,
 			.intr_index = cq->bound_intr->index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 			.cq_ring_base = cq->base_pa,
@@ -1329,7 +1322,6 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "txq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "txq_init.index %d", ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "txq_init.ring_base 0x%" PRIx64 "",
 		ctx.cmd.q_init.ring_base);
@@ -1368,7 +1360,6 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 			.index = q->index,
 			.flags = IONIC_QINIT_F_SG,
 			.intr_index = cq->bound_intr->index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 			.cq_ring_base = cq->base_pa,
@@ -1377,7 +1368,6 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "rxq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "rxq_init.index %d", ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "rxq_init.ring_base 0x%" PRIx64 "",
 		ctx.cmd.q_init.ring_base);
diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 425762d65..4e091719f 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -84,13 +84,11 @@ struct ionic_lif {
 	struct ionic_adapter *adapter;
 	struct rte_eth_dev *eth_dev;
 	uint16_t port_id;  /**< Device port identifier */
-	uint16_t mtu;
 	uint32_t index;
 	uint32_t hw_index;
 	uint32_t state;
 	uint32_t ntxqcqs;
 	uint32_t nrxqcqs;
-	uint32_t kern_pid;
 	rte_spinlock_t adminq_lock;
 	rte_spinlock_t adminq_service_lock;
 	struct ionic_qcq *adminqcq;
diff --git a/drivers/net/ionic/ionic_regs.h b/drivers/net/ionic/ionic_regs.h
index 6ebc48d04..3bdec3424 100644
--- a/drivers/net/ionic/ionic_regs.h
+++ b/drivers/net/ionic/ionic_regs.h
@@ -130,10 +130,4 @@ enum ionic_dbell_bits {
 	IONIC_DBELL_INDEX_MASK		= 0xffff,
 };
 
-static inline void
-ionic_dbell_ring(u64 __iomem *db_page, int qtype, u64 val)
-{
-	writeq(val, &db_page[qtype]);
-}
-
 #endif /* _IONIC_REGS_H_ */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v3 6/9] net/ionic: convert 'deferred' boolean to a flag bit
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
                     ` (5 preceding siblings ...)
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 5/9] net/ionic: remove some unused fields Andrew Boyer
@ 2020-12-04 20:16   ` Andrew Boyer
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 7/9] net/ionic: warn if loopback mode is requested Andrew Boyer
                     ` (2 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-04 20:16 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

This conserves resources.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_lif.c  |  4 ++--
 drivers/net/ionic/ionic_lif.h  |  2 +-
 drivers/net/ionic/ionic_rxtx.c | 10 ++++++----
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index bc15d75fd..2e33fb8d9 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -1590,7 +1590,7 @@ ionic_lif_start(struct ionic_lif *lif)
 
 	for (i = 0; i < lif->nrxqcqs; i++) {
 		struct ionic_qcq *rxq = lif->rxqcqs[i];
-		if (!rxq->deferred_start) {
+		if (!(rxq->flags & IONIC_QCQ_F_DEFERRED)) {
 			err = ionic_dev_rx_queue_start(lif->eth_dev, i);
 
 			if (err)
@@ -1600,7 +1600,7 @@ ionic_lif_start(struct ionic_lif *lif)
 
 	for (i = 0; i < lif->ntxqcqs; i++) {
 		struct ionic_qcq *txq = lif->txqcqs[i];
-		if (!txq->deferred_start) {
+		if (!(txq->flags & IONIC_QCQ_F_DEFERRED)) {
 			err = ionic_dev_tx_queue_start(lif->eth_dev, i);
 
 			if (err)
diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 4e091719f..8e2b42443 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -50,6 +50,7 @@ struct ionic_rx_stats {
 #define IONIC_QCQ_F_SG		BIT(1)
 #define IONIC_QCQ_F_INTR	BIT(2)
 #define IONIC_QCQ_F_NOTIFYQ	BIT(3)
+#define IONIC_QCQ_F_DEFERRED	BIT(4)
 
 /* Queue / Completion Queue */
 struct ionic_qcq {
@@ -68,7 +69,6 @@ struct ionic_qcq {
 	uint32_t total_size;
 	uint32_t flags;
 	struct ionic_intr_info intr;
-	bool deferred_start;
 };
 
 #define IONIC_Q_TO_QCQ(q)	container_of(q, struct ionic_qcq, q)
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index 2592f5cab..b953aff49 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -64,7 +64,7 @@ ionic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
 
 	qinfo->nb_desc = q->num_descs;
 	qinfo->conf.offloads = txq->offloads;
-	qinfo->conf.tx_deferred_start = txq->deferred_start;
+	qinfo->conf.tx_deferred_start = txq->flags & IONIC_QCQ_F_DEFERRED;
 }
 
 static inline void __rte_cold
@@ -196,7 +196,8 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	}
 
 	/* Do not start queue with rte_eth_dev_start() */
-	txq->deferred_start = tx_conf->tx_deferred_start;
+	if (tx_conf->tx_deferred_start)
+		txq->flags |= IONIC_QCQ_F_DEFERRED;
 
 	txq->offloads = offloads;
 
@@ -605,7 +606,7 @@ ionic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
 	qinfo->mp = rxq->mb_pool;
 	qinfo->scattered_rx = dev->data->scattered_rx;
 	qinfo->nb_desc = q->num_descs;
-	qinfo->conf.rx_deferred_start = rxq->deferred_start;
+	qinfo->conf.rx_deferred_start = rxq->flags & IONIC_QCQ_F_DEFERRED;
 	qinfo->conf.offloads = rxq->offloads;
 }
 
@@ -703,7 +704,8 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	 */
 
 	/* Do not start queue with rte_eth_dev_start() */
-	rxq->deferred_start = rx_conf->rx_deferred_start;
+	if (rx_conf->rx_deferred_start)
+		rxq->flags |= IONIC_QCQ_F_DEFERRED;
 
 	rxq->offloads = offloads;
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v3 7/9] net/ionic: warn if loopback mode is requested
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
                     ` (6 preceding siblings ...)
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 6/9] net/ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
@ 2020-12-04 20:16   ` Andrew Boyer
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 9/9] net/ionic: minor logging fixups Andrew Boyer
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-04 20:16 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

The ionic FW does not support loopback mode at this time.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_ethdev.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index cd79f250e..ce6ca9671 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -919,6 +919,9 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
 		return -EINVAL;
 	}
 
+	if (dev_conf->lpbk_mode)
+		IONIC_PRINT(WARNING, "Loopback mode not supported");
+
 	err = ionic_lif_start(lif);
 	if (err) {
 		IONIC_PRINT(ERR, "Cannot start LIF: %d", err);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v3 8/9] net/ionic: minor refactorings and helper variables
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
                     ` (7 preceding siblings ...)
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 7/9] net/ionic: warn if loopback mode is requested Andrew Boyer
@ 2020-12-04 20:16   ` Andrew Boyer
  2020-12-09 13:04     ` Ferruh Yigit
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 9/9] net/ionic: minor logging fixups Andrew Boyer
  9 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-12-04 20:16 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

This makes the code clearer and conserves resources.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_ethdev.c |  5 ++---
 drivers/net/ionic/ionic_lif.c    | 15 ++++++++++-----
 drivers/net/ionic/ionic_main.c   | 18 +++++++-----------
 3 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index ce6ca9671..a1c35ace3 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -901,7 +901,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
 	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 	struct ionic_adapter *adapter = lif->adapter;
 	struct ionic_dev *idev = &adapter->idev;
-	uint32_t allowed_speeds;
+	uint32_t speed, allowed_speeds;
 	int err;
 
 	IONIC_PRINT_CALL();
@@ -929,8 +929,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
 	}
 
 	if (eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED) {
-		uint32_t speed = ionic_parse_link_speeds(dev_conf->link_speeds);
-
+		speed = ionic_parse_link_speeds(dev_conf->link_speeds);
 		if (speed)
 			ionic_dev_cmd_port_speed(idev, speed);
 	}
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 2e33fb8d9..722a89565 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -77,11 +77,14 @@ void
 ionic_lif_reset(struct ionic_lif *lif)
 {
 	struct ionic_dev *idev = &lif->adapter->idev;
+	int err;
 
 	IONIC_PRINT_CALL();
 
 	ionic_dev_cmd_lif_reset(idev, lif->index);
-	ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
+	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
+	if (err)
+		IONIC_PRINT(WARNING, "Failed to reset lif");
 }
 
 static void
@@ -305,10 +308,11 @@ ionic_dev_add_mac(struct rte_eth_dev *eth_dev,
 }
 
 void
-ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused)
+ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index)
 {
 	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 	struct ionic_adapter *adapter = lif->adapter;
+	struct rte_ether_addr *mac_addr;
 
 	IONIC_PRINT_CALL();
 
@@ -319,11 +323,12 @@ ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused)
 		return;
 	}
 
-	if (!rte_is_valid_assigned_ether_addr(&eth_dev->data->mac_addrs[index]))
+	mac_addr = &eth_dev->data->mac_addrs[index];
+
+	if (!rte_is_valid_assigned_ether_addr(mac_addr))
 		return;
 
-	ionic_lif_addr_del(lif, (const uint8_t *)
-		&eth_dev->data->mac_addrs[index]);
+	ionic_lif_addr_del(lif, (const uint8_t *)mac_addr);
 }
 
 int
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index f77bddaa4..92cf0f398 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -188,8 +188,7 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 	done = ionic_wait_ctx_for_completion(lif, qcq, ctx,
 		IONIC_DEVCMD_TIMEOUT);
 
-	err = ionic_adminq_check_err(ctx, !done /* timed out */);
-	return err;
+	return ionic_adminq_check_err(ctx, !done /* timed out */);
 }
 
 static int
@@ -241,10 +240,11 @@ ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait)
 	int err;
 
 	err = ionic_dev_cmd_wait(idev, max_wait);
-	if (err)
-		return err;
 
-	return ionic_dev_cmd_check_error(idev);
+	if (!err)
+		err = ionic_dev_cmd_check_error(idev);
+
+	return err;
 }
 
 int
@@ -299,22 +299,18 @@ int
 ionic_init(struct ionic_adapter *adapter)
 {
 	struct ionic_dev *idev = &adapter->idev;
-	int err;
 
 	ionic_dev_cmd_init(idev);
-	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
-	return err;
+	return ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 }
 
 int
 ionic_reset(struct ionic_adapter *adapter)
 {
 	struct ionic_dev *idev = &adapter->idev;
-	int err;
 
 	ionic_dev_cmd_reset(idev);
-	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
-	return err;
+	return ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 }
 
 int
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v3 9/9] net/ionic: minor logging fixups
  2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
                     ` (8 preceding siblings ...)
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
@ 2020-12-04 20:16   ` Andrew Boyer
  2020-12-09 13:47     ` Ferruh Yigit
  9 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-12-04 20:16 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

Expose ionic_opcode_to_str() so it can be used for dev cmds, too.
Store the device name in struct adapter.

Switch to memcpy() to work around gcc false positives.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic.h         |  1 +
 drivers/net/ionic/ionic_dev.c     |  5 +++
 drivers/net/ionic/ionic_dev.h     |  2 +
 drivers/net/ionic/ionic_ethdev.c  |  4 +-
 drivers/net/ionic/ionic_lif.c     | 68 ++++++++++++++++---------------
 drivers/net/ionic/ionic_mac_api.c |  4 +-
 drivers/net/ionic/ionic_main.c    | 32 ++++++++-------
 drivers/net/ionic/ionic_rxtx.c    | 41 ++++++++-----------
 8 files changed, 84 insertions(+), 73 deletions(-)

diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h
index a93110326..7ad0ab69e 100644
--- a/drivers/net/ionic/ionic.h
+++ b/drivers/net/ionic/ionic.h
@@ -48,6 +48,7 @@ struct ionic_hw {
 struct ionic_adapter {
 	struct ionic_hw hw;
 	struct ionic_dev idev;
+	const char *name;
 	struct ionic_dev_bar bars[IONIC_BARS_MAX];
 	struct ionic_identity	ident;
 	struct ionic_lif *lifs[IONIC_LIFS_MAX];
diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c
index fc68f5c74..f32966521 100644
--- a/drivers/net/ionic/ionic_dev.c
+++ b/drivers/net/ionic/ionic_dev.c
@@ -102,6 +102,9 @@ ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd)
 	uint32_t cmd_size = sizeof(cmd->words) /
 		sizeof(cmd->words[0]);
 
+	IONIC_PRINT(DEBUG, "Sending %s (%d) via dev_cmd",
+		    ionic_opcode_to_str(cmd->cmd.opcode), cmd->cmd.opcode);
+
 	for (i = 0; i < cmd_size; i++)
 		iowrite32(cmd->words[i], &idev->dev_cmd->cmd.words[i]);
 
@@ -348,6 +351,8 @@ ionic_dev_cmd_adminq_init(struct ionic_dev *idev,
 		.q_init.cq_ring_base = cq->base_pa,
 	};
 
+	IONIC_PRINT(DEBUG, "adminq.q_init.ver %u", cmd.q_init.ver);
+
 	ionic_dev_cmd_go(idev, &cmd);
 }
 
diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index 7150f7f2c..026c4a9f3 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -205,6 +205,8 @@ struct ionic_qcq;
 void ionic_intr_init(struct ionic_dev *idev, struct ionic_intr_info *intr,
 	unsigned long index);
 
+const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode);
+
 int ionic_dev_setup(struct ionic_adapter *adapter);
 
 void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);
diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index a1c35ace3..d700aa745 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -571,7 +571,7 @@ ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,
 
 	if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
 		IONIC_PRINT(ERR, "The size of hash lookup table configured "
-			"(%d) doesn't match the number hardware can supported "
+			"(%d) does not match the number hardware can support "
 			"(%d)",
 			reta_size, ident->lif.eth.rss_ind_tbl_sz);
 		return -EINVAL;
@@ -605,7 +605,7 @@ ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,
 
 	if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
 		IONIC_PRINT(ERR, "The size of hash lookup table configured "
-			"(%d) doesn't match the number hardware can supported "
+			"(%d) does not match the number hardware can support "
 			"(%d)",
 			reta_size, ident->lif.eth.rss_ind_tbl_sz);
 		return -EINVAL;
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 722a89565..112bd54fa 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -84,7 +84,7 @@ ionic_lif_reset(struct ionic_lif *lif)
 	ionic_dev_cmd_lif_reset(idev, lif->index);
 	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 	if (err)
-		IONIC_PRINT(WARNING, "Failed to reset lif");
+		IONIC_PRINT(WARNING, "Failed to reset %s", lif->name);
 }
 
 static void
@@ -554,7 +554,7 @@ ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr)
 	/*
 	 * Note: interrupt handler is called for index = 0 only
 	 * (we use interrupts for the notifyq only anyway,
-	 * which hash index = 0)
+	 * which has index = 0)
 	 */
 
 	for (index = 0; index < adapter->nintrs; index++)
@@ -687,8 +687,8 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 		ionic_q_sg_map(&new->q, sg_base, sg_base_pa);
 	}
 
-	IONIC_PRINT(DEBUG, "Q-Base-PA = %ju CQ-Base-PA = %ju "
-		"SG-base-PA = %ju",
+	IONIC_PRINT(DEBUG, "Q-Base-PA = %#jx CQ-Base-PA = %#jx "
+		"SG-base-PA = %#jx",
 		q_base_pa, cq_base_pa, sg_base_pa);
 
 	ionic_q_map(&new->q, q_base, q_base_pa);
@@ -827,7 +827,13 @@ ionic_lif_alloc(struct ionic_lif *lif)
 	int dbpage_num;
 	int err;
 
-	snprintf(lif->name, sizeof(lif->name), "lif%u", lif->index);
+	/*
+	 * lif->name was zeroed on allocation.
+	 * Copy (sizeof() - 1) bytes to ensure that it is NULL terminated.
+	 */
+	memcpy(lif->name, lif->eth_dev->data->name, sizeof(lif->name) - 1);
+
+	IONIC_PRINT(DEBUG, "LIF: %s", lif->name);
 
 	IONIC_PRINT(DEBUG, "Allocating Lif Info");
 
@@ -868,8 +874,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
 
 	IONIC_PRINT(DEBUG, "Allocating Admin Queue");
 
-	IONIC_PRINT(DEBUG, "Allocating Admin Queue");
-
 	err = ionic_admin_qcq_alloc(lif);
 	if (err) {
 		IONIC_PRINT(ERR, "Cannot allocate admin queue");
@@ -1217,12 +1221,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
 		}
 	};
 
-	IONIC_PRINT(DEBUG, "notifyq_init.index %d",
-		ctx.cmd.q_init.index);
-	IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
-		ctx.cmd.q_init.ring_base);
+	IONIC_PRINT(DEBUG, "notifyq_init.index %d", q->index);
+	IONIC_PRINT(DEBUG, "notifyq_init.ring_base %#jx", q->base_pa);
 	IONIC_PRINT(DEBUG, "notifyq_init.ring_size %d",
 		ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "notifyq_init.ver %u", ctx.cmd.q_init.ver);
 
 	err = ionic_adminq_post_wait(lif, &ctx);
 	if (err)
@@ -1327,11 +1330,11 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "txq_init.index %d", ctx.cmd.q_init.index);
-	IONIC_PRINT(DEBUG, "txq_init.ring_base 0x%" PRIx64 "",
-		ctx.cmd.q_init.ring_base);
-	IONIC_PRINT(DEBUG, "txq_init.ring_size %d",
-		ctx.cmd.q_init.ring_size);
+
+	IONIC_PRINT(DEBUG, "txq_init.index %d", q->index);
+	IONIC_PRINT(DEBUG, "txq_init.ring_base %#jx", q->base_pa);
+	IONIC_PRINT(DEBUG, "txq_init.ring_size %d", ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "txq_init.ver %u", ctx.cmd.q_init.ver);
 
 	err = ionic_adminq_post_wait(qcq->lif, &ctx);
 	if (err)
@@ -1373,11 +1376,10 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "rxq_init.index %d", ctx.cmd.q_init.index);
-	IONIC_PRINT(DEBUG, "rxq_init.ring_base 0x%" PRIx64 "",
-		ctx.cmd.q_init.ring_base);
-	IONIC_PRINT(DEBUG, "rxq_init.ring_size %d",
-		ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "rxq_init.index %d", q->index);
+	IONIC_PRINT(DEBUG, "rxq_init.ring_base %#jx", q->base_pa);
+	IONIC_PRINT(DEBUG, "rxq_init.ring_size %d", ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "rxq_init.ver %u", ctx.cmd.q_init.ver);
 
 	err = ionic_adminq_post_wait(qcq->lif, &ctx);
 	if (err)
@@ -1448,8 +1450,9 @@ ionic_lif_set_name(struct ionic_lif *lif)
 		},
 	};
 
-	snprintf(ctx.cmd.lif_setattr.name, sizeof(ctx.cmd.lif_setattr.name),
-		"%d", lif->port_id);
+	/* FW is responsible for NULL terminating this field */
+	memcpy(ctx.cmd.lif_setattr.name, lif->name,
+		sizeof(ctx.cmd.lif_setattr.name));
 
 	ionic_adminq_post_wait(lif, &ctx);
 }
@@ -1643,23 +1646,23 @@ ionic_lif_identify(struct ionic_adapter *adapter)
 	for (i = 0; i < nwords; i++)
 		ident->lif.words[i] = ioread32(&idev->dev_cmd->data[i]);
 
-	IONIC_PRINT(INFO, "capabilities 0x%" PRIx64 " ",
+	IONIC_PRINT(INFO, "capabilities %#jx",
 		ident->lif.capabilities);
 
-	IONIC_PRINT(INFO, "eth.max_ucast_filters 0x%" PRIx32 " ",
+	IONIC_PRINT(INFO, "eth.max_ucast_filters %#x",
 		ident->lif.eth.max_ucast_filters);
-	IONIC_PRINT(INFO, "eth.max_mcast_filters 0x%" PRIx32 " ",
+	IONIC_PRINT(INFO, "eth.max_mcast_filters %#x",
 		ident->lif.eth.max_mcast_filters);
 
-	IONIC_PRINT(INFO, "eth.features 0x%" PRIx64 " ",
+	IONIC_PRINT(INFO, "eth.features %#jx",
 		ident->lif.eth.config.features);
-	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_ADMINQ] 0x%" PRIx32 " ",
+	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_ADMINQ] %#x",
 		ident->lif.eth.config.queue_count[IONIC_QTYPE_ADMINQ]);
-	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_NOTIFYQ] 0x%" PRIx32 " ",
+	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_NOTIFYQ] %#x",
 		ident->lif.eth.config.queue_count[IONIC_QTYPE_NOTIFYQ]);
-	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_RXQ] 0x%" PRIx32 " ",
+	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_RXQ] %#x",
 		ident->lif.eth.config.queue_count[IONIC_QTYPE_RXQ]);
-	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_TXQ] 0x%" PRIx32 " ",
+	IONIC_PRINT(INFO, "eth.queue_count[IONIC_QTYPE_TXQ] %#x",
 		ident->lif.eth.config.queue_count[IONIC_QTYPE_TXQ]);
 
 	return 0;
@@ -1680,7 +1683,8 @@ ionic_lifs_size(struct ionic_adapter *adapter)
 	nintrs = nlifs * 1 /* notifyq */;
 
 	if (nintrs > dev_nintrs) {
-		IONIC_PRINT(ERR, "At most %d intr queues supported, minimum required is %u",
+		IONIC_PRINT(ERR,
+			"At most %d intr supported, minimum req'd is %u",
 			dev_nintrs, nintrs);
 		return -ENOSPC;
 	}
diff --git a/drivers/net/ionic/ionic_mac_api.c b/drivers/net/ionic/ionic_mac_api.c
index c0ea042bc..7817b33e4 100644
--- a/drivers/net/ionic/ionic_mac_api.c
+++ b/drivers/net/ionic/ionic_mac_api.c
@@ -37,7 +37,7 @@ ionic_set_mac_type(struct ionic_hw *hw)
 	IONIC_PRINT_CALL();
 
 	if (hw->vendor_id != IONIC_PENSANDO_VENDOR_ID) {
-		IONIC_PRINT(ERR, "Unsupported vendor id: %" PRIx32 "",
+		IONIC_PRINT(ERR, "Unsupported vendor id: %#x",
 			hw->vendor_id);
 		return -EINVAL;
 	}
@@ -50,7 +50,7 @@ ionic_set_mac_type(struct ionic_hw *hw)
 		break;
 	default:
 		err = -EINVAL;
-		IONIC_PRINT(ERR, "Unsupported device id: %" PRIx32 "",
+		IONIC_PRINT(ERR, "Unsupported device id: %#x",
 			hw->device_id);
 		break;
 	}
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index 92cf0f398..ce5d11311 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -61,7 +61,7 @@ ionic_error_to_str(enum ionic_status_code code)
 	}
 }
 
-static const char *
+const char *
 ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
 {
 	switch (opcode) {
@@ -107,6 +107,8 @@ ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
 		return "IONIC_CMD_Q_INIT";
 	case IONIC_CMD_Q_CONTROL:
 		return "IONIC_CMD_Q_CONTROL";
+	case IONIC_CMD_Q_IDENTIFY:
+		return "IONIC_CMD_Q_IDENTIFY";
 	case IONIC_CMD_RDMA_RESET_LIF:
 		return "IONIC_CMD_RDMA_RESET_LIF";
 	case IONIC_CMD_RDMA_CREATE_EQ:
@@ -126,8 +128,9 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout)
 	const char *name;
 	const char *status;
 
+	name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
+
 	if (ctx->comp.comp.status || timeout) {
-		name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
 		status = ionic_error_to_str(ctx->comp.comp.status);
 		IONIC_PRINT(ERR, "%s (%d) failed: %s (%d)",
 			name,
@@ -137,6 +140,8 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout)
 		return -EIO;
 	}
 
+	IONIC_PRINT(DEBUG, "%s (%d) succeeded", name, ctx->cmd.cmd.opcode);
+
 	return 0;
 }
 
@@ -174,14 +179,13 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 	bool done;
 	int err;
 
-	IONIC_PRINT(DEBUG, "Sending %s to the admin queue",
-		ionic_opcode_to_str(ctx->cmd.cmd.opcode));
+	IONIC_PRINT(DEBUG, "Sending %s (%d) via the admin queue",
+		ionic_opcode_to_str(ctx->cmd.cmd.opcode), ctx->cmd.cmd.opcode);
 
 	err = ionic_adminq_post(lif, ctx);
 	if (err) {
-		IONIC_PRINT(ERR, "Failure posting to the admin queue %d (%d)",
+		IONIC_PRINT(ERR, "Failure posting %d to the admin queue (%d)",
 			ctx->cmd.cmd.opcode, err);
-
 		return err;
 	}
 
@@ -244,6 +248,7 @@ ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait)
 	if (!err)
 		err = ionic_dev_cmd_check_error(idev);
 
+	IONIC_PRINT(DEBUG, "dev_cmd returned %d", err);
 	return err;
 }
 
@@ -335,12 +340,12 @@ ionic_port_identify(struct ionic_adapter *adapter)
 				ioread32(&idev->dev_cmd->data[i]);
 	}
 
-	IONIC_PRINT(INFO, "speed %d ", ident->port.config.speed);
-	IONIC_PRINT(INFO, "mtu %d ", ident->port.config.mtu);
-	IONIC_PRINT(INFO, "state %d ", ident->port.config.state);
-	IONIC_PRINT(INFO, "an_enable %d ", ident->port.config.an_enable);
-	IONIC_PRINT(INFO, "fec_type %d ", ident->port.config.fec_type);
-	IONIC_PRINT(INFO, "pause_type %d ", ident->port.config.pause_type);
+	IONIC_PRINT(INFO, "speed %d", ident->port.config.speed);
+	IONIC_PRINT(INFO, "mtu %d", ident->port.config.mtu);
+	IONIC_PRINT(INFO, "state %d", ident->port.config.state);
+	IONIC_PRINT(INFO, "an_enable %d", ident->port.config.an_enable);
+	IONIC_PRINT(INFO, "fec_type %d", ident->port.config.fec_type);
+	IONIC_PRINT(INFO, "pause_type %d", ident->port.config.pause_type);
 	IONIC_PRINT(INFO, "loopback_mode %d",
 		ident->port.config.loopback_mode);
 
@@ -381,8 +386,7 @@ ionic_port_init(struct ionic_adapter *adapter)
 	idev->port_info_sz = RTE_ALIGN(sizeof(*idev->port_info), PAGE_SIZE);
 
 	snprintf(z_name, sizeof(z_name), "%s_port_%s_info",
-		IONIC_DRV_NAME,
-		adapter->pci_dev->device.name);
+		IONIC_DRV_NAME, adapter->name);
 
 	idev->port_info_z = ionic_memzone_reserve(z_name, idev->port_info_sz,
 		SOCKET_ID_ANY);
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index b953aff49..b689c8381 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -133,7 +133,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 {
 	struct ionic_qcq *txq;
 
-	IONIC_PRINT_CALL();
+	IONIC_PRINT(DEBUG, "Stopping TX queue %u", tx_queue_id);
 
 	txq = eth_dev->data->tx_queues[tx_queue_id];
 
@@ -156,7 +156,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 
 int __rte_cold
 ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
-		uint16_t nb_desc, uint32_t socket_id __rte_unused,
+		uint16_t nb_desc, uint32_t socket_id,
 		const struct rte_eth_txconf *tx_conf)
 {
 	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
@@ -164,11 +164,6 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	uint64_t offloads;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Configuring TX queue %u with %u buffers",
-		tx_queue_id, nb_desc);
-
 	if (tx_queue_id >= lif->ntxqcqs) {
 		IONIC_PRINT(DEBUG, "Queue index %u not available "
 			"(max %u queues)",
@@ -177,6 +172,9 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	}
 
 	offloads = tx_conf->offloads | eth_dev->data->dev_conf.txmode.offloads;
+	IONIC_PRINT(DEBUG,
+		"Configuring skt %u TX queue %u with %u buffers, offloads %jx",
+		socket_id, tx_queue_id, nb_desc, offloads);
 
 	/* Validate number of receive descriptors */
 	if (!rte_is_power_of_2(nb_desc) || nb_desc < IONIC_MIN_RING_DESC)
@@ -215,10 +213,11 @@ ionic_dev_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 	struct ionic_qcq *txq;
 	int err;
 
-	IONIC_PRINT_CALL();
-
 	txq = eth_dev->data->tx_queues[tx_queue_id];
 
+	IONIC_PRINT(DEBUG, "Starting TX queue %u, %u descs",
+		tx_queue_id, txq->q.num_descs);
+
 	err = ionic_lif_txq_init(txq);
 	if (err)
 		return err;
@@ -642,7 +641,7 @@ int __rte_cold
 ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 		uint16_t rx_queue_id,
 		uint16_t nb_desc,
-		uint32_t socket_id __rte_unused,
+		uint32_t socket_id,
 		const struct rte_eth_rxconf *rx_conf,
 		struct rte_mempool *mp)
 {
@@ -651,11 +650,6 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	uint64_t offloads;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Configuring RX queue %u with %u buffers",
-		rx_queue_id, nb_desc);
-
 	if (rx_queue_id >= lif->nrxqcqs) {
 		IONIC_PRINT(ERR,
 			"Queue index %u not available (max %u queues)",
@@ -664,13 +658,16 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	}
 
 	offloads = rx_conf->offloads | eth_dev->data->dev_conf.rxmode.offloads;
+	IONIC_PRINT(DEBUG,
+		"Configuring skt %u RX queue %u with %u buffers, offloads %jx",
+		socket_id, rx_queue_id, nb_desc, offloads);
 
 	/* Validate number of receive descriptors */
 	if (!rte_is_power_of_2(nb_desc) ||
 			nb_desc < IONIC_MIN_RING_DESC ||
 			nb_desc > IONIC_MAX_RING_DESC) {
 		IONIC_PRINT(ERR,
-			"Bad number of descriptors (%u) for queue %u (min: %u)",
+			"Bad descriptor count (%u) for queue %u (min: %u)",
 			nb_desc, rx_queue_id, IONIC_MIN_RING_DESC);
 		return -EINVAL; /* or use IONIC_DEFAULT_RING_DESC */
 	}
@@ -687,7 +684,7 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 
 	err = ionic_rx_qcq_alloc(lif, rx_queue_id, nb_desc, &rxq);
 	if (err) {
-		IONIC_PRINT(ERR, "Queue allocation failure");
+		IONIC_PRINT(ERR, "Queue %d allocation failure", rx_queue_id);
 		return -EINVAL;
 	}
 
@@ -959,13 +956,11 @@ ionic_dev_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)
 	struct ionic_qcq *rxq;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Allocating RX queue buffers (size: %u)",
-		frame_size);
-
 	rxq = eth_dev->data->rx_queues[rx_queue_id];
 
+	IONIC_PRINT(DEBUG, "Starting RX queue %u, %u descs (size: %u)",
+		rx_queue_id, rxq->q.num_descs, frame_size);
+
 	err = ionic_lif_rxq_init(rxq);
 	if (err)
 		return err;
@@ -1045,7 +1040,7 @@ ionic_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)
 {
 	struct ionic_qcq *rxq;
 
-	IONIC_PRINT_CALL();
+	IONIC_PRINT(DEBUG, "Stopping RX queue %u", rx_queue_id);
 
 	rxq = eth_dev->data->rx_queues[rx_queue_id];
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 3/9] net/ionic: update documentation and MAINTAINERS
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
@ 2020-12-09 12:03     ` Ferruh Yigit
  2020-12-09 14:36       ` Andrew Boyer
  0 siblings, 1 reply; 79+ messages in thread
From: Ferruh Yigit @ 2020-12-09 12:03 UTC (permalink / raw)
  To: Andrew Boyer, dev; +Cc: Alfredo Cardigliano

On 12/4/2020 8:16 PM, Andrew Boyer wrote:
> The UNMAINTAINED flag will be removed in a future patch.
> 
> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
> ---
>   MAINTAINERS                        |  3 ++-
>   doc/guides/nics/features/ionic.ini |  2 ++
>   doc/guides/nics/ionic.rst          | 13 +++++++------
>   3 files changed, 11 insertions(+), 7 deletions(-)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index eafe9f8c4..6534983c1 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -841,7 +841,8 @@ F: drivers/net/pfe/
>   F: doc/guides/nics/features/pfe.ini
>   
>   Pensando ionic - UNMAINTAINED
> -M: Alfredo Cardigliano <cardigliano@ntop.org>
> +M: Andrew Boyer <aboyer@pensando.io>
> +M: Pensando Drivers <drivers@pensando.io>

Same comment from previous version, please don't add group as maintainer, only 
actual people.

>   F: drivers/net/ionic/
>   F: doc/guides/nics/ionic.rst
>   F: doc/guides/nics/features/ionic.ini
> diff --git a/doc/guides/nics/features/ionic.ini b/doc/guides/nics/features/ionic.ini
> index 083c7bd99..dd29dbed6 100644
> --- a/doc/guides/nics/features/ionic.ini
> +++ b/doc/guides/nics/features/ionic.ini
> @@ -8,6 +8,7 @@ Speed capabilities   = Y
>   Link status          = Y
>   Link status event    = Y
>   Queue start/stop     = Y
> +Lock-free Tx queue   = Y

Are you sure this is supported?
Since it is not advertised as capability, I think this can't be claimed as 
supported, but still even after this is added as capability, can you please 
confirm your device supports multiple core enqueue to same queue without locks?

>   MTU update           = Y
>   Jumbo frame          = Y
>   Scattered Rx         = Y
> @@ -19,6 +20,7 @@ Unicast MAC filter   = Y
>   RSS hash             = Y
>   RSS key update       = Y
>   RSS reta update      = Y
> +SR-IOV               = Y

Can you please explain what is exactly supported? Like can DPDK drive both PF & VF?

<...>

> @@ -7,15 +7,16 @@ IONIC Driver
>   The ionic driver provides support for Pensando server adapters.
>   It currently supports the below models:
>   
> -- `Naples DSC-25 <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>`_
> -- `Naples DSC-100 <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>`_
> +- DSC-25 dual-port 25G Distributed Services Card
> +- DSC-100 dual-port 100G Distributed Services Card
>   

Same comment from previous version, can you provide link for these devices, it 
is hard to find the devices from the main site.



^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 8/9] net/ionic: minor refactorings and helper variables
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
@ 2020-12-09 13:04     ` Ferruh Yigit
  2020-12-09 14:39       ` Andrew Boyer
  0 siblings, 1 reply; 79+ messages in thread
From: Ferruh Yigit @ 2020-12-09 13:04 UTC (permalink / raw)
  To: Andrew Boyer, dev; +Cc: Alfredo Cardigliano

On 12/4/2020 8:16 PM, Andrew Boyer wrote:
> This makes the code clearer and conserves resources.
> 
> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
> ---
>   drivers/net/ionic/ionic_ethdev.c |  5 ++---
>   drivers/net/ionic/ionic_lif.c    | 15 ++++++++++-----
>   drivers/net/ionic/ionic_main.c   | 18 +++++++-----------
>   3 files changed, 19 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
> index ce6ca9671..a1c35ace3 100644
> --- a/drivers/net/ionic/ionic_ethdev.c
> +++ b/drivers/net/ionic/ionic_ethdev.c
> @@ -901,7 +901,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
>   	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
>   	struct ionic_adapter *adapter = lif->adapter;
>   	struct ionic_dev *idev = &adapter->idev;
> -	uint32_t allowed_speeds;
> +	uint32_t speed, allowed_speeds;
>   	int err;
>   
>   	IONIC_PRINT_CALL();
> @@ -929,8 +929,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
>   	}
>   
>   	if (eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED) {
> -		uint32_t speed = ionic_parse_link_speeds(dev_conf->link_speeds);
> -
> +		speed = ionic_parse_link_speeds(dev_conf->link_speeds);
>   		if (speed)
>   			ionic_dev_cmd_port_speed(idev, speed);
>   	}

Same comment from previous version, what is the reason to increase the scope of 
the 'speed' variable?
Functionality is same and isn't it better to have reduced scope?

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 9/9] net/ionic: minor logging fixups
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 9/9] net/ionic: minor logging fixups Andrew Boyer
@ 2020-12-09 13:47     ` Ferruh Yigit
  2020-12-09 14:45       ` Andrew Boyer
  0 siblings, 1 reply; 79+ messages in thread
From: Ferruh Yigit @ 2020-12-09 13:47 UTC (permalink / raw)
  To: Andrew Boyer, dev; +Cc: Alfredo Cardigliano

On 12/4/2020 8:16 PM, Andrew Boyer wrote:
> Expose ionic_opcode_to_str() so it can be used for dev cmds, too.
> Store the device name in struct adapter.
> 
> Switch to memcpy() to work around gcc false positives.
> 
> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
> ---
>   drivers/net/ionic/ionic.h         |  1 +
>   drivers/net/ionic/ionic_dev.c     |  5 +++
>   drivers/net/ionic/ionic_dev.h     |  2 +
>   drivers/net/ionic/ionic_ethdev.c  |  4 +-
>   drivers/net/ionic/ionic_lif.c     | 68 ++++++++++++++++---------------
>   drivers/net/ionic/ionic_mac_api.c |  4 +-
>   drivers/net/ionic/ionic_main.c    | 32 ++++++++-------
>   drivers/net/ionic/ionic_rxtx.c    | 41 ++++++++-----------
>   8 files changed, 84 insertions(+), 73 deletions(-)
> 

<...>

> @@ -1217,12 +1221,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
>   		}
>   	};
>   
> -	IONIC_PRINT(DEBUG, "notifyq_init.index %d",
> -		ctx.cmd.q_init.index);
> -	IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
> -		ctx.cmd.q_init.ring_base);
> +	IONIC_PRINT(DEBUG, "notifyq_init.index %d", q->index);
> +	IONIC_PRINT(DEBUG, "notifyq_init.ring_base %#jx", q->base_pa);

There are lots of similar PRIx64 -> %j change in this patch,
'%j' specifier is for 'intmax_t' and which seems 64bit storage, so this should 
work with 64 bit variable 'q->base_pa',
but the variable is explicitly uint64_t why replacing 'PRIx64' usage which is 
correct and more common usage in the DPDK? Why ionic is want to do this in its 
own way, I am not clear of the motivation of these changes really, can you 
please clarify?

<...>

> @@ -1448,8 +1450,9 @@ ionic_lif_set_name(struct ionic_lif *lif)
>   		},
>   	};
>   
> -	snprintf(ctx.cmd.lif_setattr.name, sizeof(ctx.cmd.lif_setattr.name),
> -		"%d", lif->port_id);
> +	/* FW is responsible for NULL terminating this field */
> +	memcpy(ctx.cmd.lif_setattr.name, lif->name,
> +		sizeof(ctx.cmd.lif_setattr.name));

Even though FW may be guaranting the string will be null terminated, won't it be 
nice to provide input as null terminated if this is the expectation?

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 3/9] net/ionic: update documentation and MAINTAINERS
  2020-12-09 12:03     ` Ferruh Yigit
@ 2020-12-09 14:36       ` Andrew Boyer
  2020-12-09 15:24         ` Ferruh Yigit
  0 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-12-09 14:36 UTC (permalink / raw)
  To: Ferruh Yigit; +Cc: dev, Alfredo Cardigliano

Please respond to my questions this time. I have ~70 more patches to post by December 20.

> On Dec 9, 2020, at 7:03 AM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
> 
> On 12/4/2020 8:16 PM, Andrew Boyer wrote:
>> The UNMAINTAINED flag will be removed in a future patch.
>> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
>> ---
>>  MAINTAINERS                        |  3 ++-
>>  doc/guides/nics/features/ionic.ini |  2 ++
>>  doc/guides/nics/ionic.rst          | 13 +++++++------
>>  3 files changed, 11 insertions(+), 7 deletions(-)
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index eafe9f8c4..6534983c1 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -841,7 +841,8 @@ F: drivers/net/pfe/
>>  F: doc/guides/nics/features/pfe.ini
>>    Pensando ionic - UNMAINTAINED
>> -M: Alfredo Cardigliano <cardigliano@ntop.org>
>> +M: Andrew Boyer <aboyer@pensando.io>
>> +M: Pensando Drivers <drivers@pensando.io>
> 
> Same comment from previous version, please don't add group as maintainer, only actual people.

I responded to your original comment about this back in November. Is there an official DPDK policy against doing this? Is it your preference? We would very much prefer to have this in the file as a fallback. As long as there is still at least one person listed, what is the harm?

>>  F: drivers/net/ionic/
>>  F: doc/guides/nics/ionic.rst
>>  F: doc/guides/nics/features/ionic.ini
>> diff --git a/doc/guides/nics/features/ionic.ini b/doc/guides/nics/features/ionic.ini
>> index 083c7bd99..dd29dbed6 100644
>> --- a/doc/guides/nics/features/ionic.ini
>> +++ b/doc/guides/nics/features/ionic.ini
>> @@ -8,6 +8,7 @@ Speed capabilities   = Y
>>  Link status          = Y
>>  Link status event    = Y
>>  Queue start/stop     = Y
>> +Lock-free Tx queue   = Y
> 
> Are you sure this is supported?
> Since it is not advertised as capability, I think this can't be claimed as supported, but still even after this is added as capability, can you please confirm your device supports multiple core enqueue to same queue without locks?

I misunderstood the meaning of this flag, will remove.

>>  MTU update           = Y
>>  Jumbo frame          = Y
>>  Scattered Rx         = Y
>> @@ -19,6 +20,7 @@ Unicast MAC filter   = Y
>>  RSS hash             = Y
>>  RSS key update       = Y
>>  RSS reta update      = Y
>> +SR-IOV               = Y
> 
> Can you please explain what is exactly supported? Like can DPDK drive both PF & VF?

Yes. The PMD does not distinguish between PFs and VFs.

> 
> <...>
> 
>> @@ -7,15 +7,16 @@ IONIC Driver
>>  The ionic driver provides support for Pensando server adapters.
>>  It currently supports the below models:
>>  -- `Naples DSC-25 <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>>`_
>> -- `Naples DSC-100 <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>>`_
>> +- DSC-25 dual-port 25G Distributed Services Card
>> +- DSC-100 dual-port 100G Distributed Services Card
>>  
> 
> Same comment from previous version, can you provide link for these devices, it is hard to find the devices from the main site.

And my same response from your previous comment. I do not control the website and do not wish to put stale PDF links in this document, which will live forever. The text includes the URL of the page containing links to the PDFs. Why is this not acceptable?

-Andrew


^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 8/9] net/ionic: minor refactorings and helper variables
  2020-12-09 13:04     ` Ferruh Yigit
@ 2020-12-09 14:39       ` Andrew Boyer
  2020-12-09 15:25         ` Ferruh Yigit
  0 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-12-09 14:39 UTC (permalink / raw)
  To: Ferruh Yigit; +Cc: dev, Alfredo Cardigliano



> On Dec 9, 2020, at 8:04 AM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
> 
> On 12/4/2020 8:16 PM, Andrew Boyer wrote:
>> This makes the code clearer and conserves resources.
>> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
>> ---
>>  drivers/net/ionic/ionic_ethdev.c |  5 ++---
>>  drivers/net/ionic/ionic_lif.c    | 15 ++++++++++-----
>>  drivers/net/ionic/ionic_main.c   | 18 +++++++-----------
>>  3 files changed, 19 insertions(+), 19 deletions(-)
>> diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
>> index ce6ca9671..a1c35ace3 100644
>> --- a/drivers/net/ionic/ionic_ethdev.c
>> +++ b/drivers/net/ionic/ionic_ethdev.c
>> @@ -901,7 +901,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
>>  	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
>>  	struct ionic_adapter *adapter = lif->adapter;
>>  	struct ionic_dev *idev = &adapter->idev;
>> -	uint32_t allowed_speeds;
>> +	uint32_t speed, allowed_speeds;
>>  	int err;
>>    	IONIC_PRINT_CALL();
>> @@ -929,8 +929,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
>>  	}
>>    	if (eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED) {
>> -		uint32_t speed = ionic_parse_link_speeds(dev_conf->link_speeds);
>> -
>> +		speed = ionic_parse_link_speeds(dev_conf->link_speeds);
>>  		if (speed)
>>  			ionic_dev_cmd_port_speed(idev, speed);
>>  	}
> 
> Same comment from previous version, what is the reason to increase the scope of the 'speed' variable?
> Functionality is same and isn't it better to have reduced scope?

In a future patch I will be redesigning this code block and speed will have function scope.

I have tried to break things up into digestible bits. Is this not acceptable?

-Andrew

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 9/9] net/ionic: minor logging fixups
  2020-12-09 13:47     ` Ferruh Yigit
@ 2020-12-09 14:45       ` Andrew Boyer
  2020-12-09 15:42         ` Ferruh Yigit
  0 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-12-09 14:45 UTC (permalink / raw)
  To: Ferruh Yigit; +Cc: dev, Alfredo Cardigliano



> On Dec 9, 2020, at 8:47 AM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
> 
> On 12/4/2020 8:16 PM, Andrew Boyer wrote:
>> Expose ionic_opcode_to_str() so it can be used for dev cmds, too.
>> Store the device name in struct adapter.
>> Switch to memcpy() to work around gcc false positives.
>> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
>> ---
>>  drivers/net/ionic/ionic.h         |  1 +
>>  drivers/net/ionic/ionic_dev.c     |  5 +++
>>  drivers/net/ionic/ionic_dev.h     |  2 +
>>  drivers/net/ionic/ionic_ethdev.c  |  4 +-
>>  drivers/net/ionic/ionic_lif.c     | 68 ++++++++++++++++---------------
>>  drivers/net/ionic/ionic_mac_api.c |  4 +-
>>  drivers/net/ionic/ionic_main.c    | 32 ++++++++-------
>>  drivers/net/ionic/ionic_rxtx.c    | 41 ++++++++-----------
>>  8 files changed, 84 insertions(+), 73 deletions(-)
> 
> <...>
> 
>> @@ -1217,12 +1221,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
>>  		}
>>  	};
>>  -	IONIC_PRINT(DEBUG, "notifyq_init.index %d",
>> -		ctx.cmd.q_init.index);
>> -	IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
>> -		ctx.cmd.q_init.ring_base);
>> +	IONIC_PRINT(DEBUG, "notifyq_init.index %d", q->index);
>> +	IONIC_PRINT(DEBUG, "notifyq_init.ring_base %#jx", q->base_pa);
> 
> There are lots of similar PRIx64 -> %j change in this patch,
> '%j' specifier is for 'intmax_t' and which seems 64bit storage, so this should work with 64 bit variable 'q->base_pa',
> but the variable is explicitly uint64_t why replacing 'PRIx64' usage which is correct and more common usage in the DPDK? Why ionic is want to do this in its own way, I am not clear of the motivation of these changes really, can you please clarify?

As best I know, I am following the (two different) contribute guidelines pages, both of which direct submitters to run checkpatch. One of things checkpatch flags is lines over 80 columns. Many of these lines were over 80 columns or oddly broken to meet the 80 column limit.

%j is used in many other places in this PMD - as originally written by Alfredo, one of your core contributors. If we are allowed to use %j, I want to, since I much prefer it to the hideous PRIx64.

> <...>
> 
>> @@ -1448,8 +1450,9 @@ ionic_lif_set_name(struct ionic_lif *lif)
>>  		},
>>  	};
>>  -	snprintf(ctx.cmd.lif_setattr.name, sizeof(ctx.cmd.lif_setattr.name),
>> -		"%d", lif->port_id);
>> +	/* FW is responsible for NULL terminating this field */
>> +	memcpy(ctx.cmd.lif_setattr.name, lif->name,
>> +		sizeof(ctx.cmd.lif_setattr.name));
> 
> Even though FW may be guaranting the string will be null terminated, won't it be nice to provide input as null terminated if this is the expectation?

No, that is not the expectation. We prefer it to be this way.

-Andrew


^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 3/9] net/ionic: update documentation and MAINTAINERS
  2020-12-09 14:36       ` Andrew Boyer
@ 2020-12-09 15:24         ` Ferruh Yigit
  2020-12-09 16:24           ` Andrew Boyer
  0 siblings, 1 reply; 79+ messages in thread
From: Ferruh Yigit @ 2020-12-09 15:24 UTC (permalink / raw)
  To: Andrew Boyer; +Cc: dev, Alfredo Cardigliano, Thomas Monjalon, David Marchand

On 12/9/2020 2:36 PM, Andrew Boyer wrote:
> Please respond to my questions this time. I have ~70 more patches to post by 
> December 20.
> 
>> On Dec 9, 2020, at 7:03 AM, Ferruh Yigit <ferruh.yigit@intel.com 
>> <mailto:ferruh.yigit@intel.com>> wrote:
>>
>> On 12/4/2020 8:16 PM, Andrew Boyer wrote:
>>> The UNMAINTAINED flag will be removed in a future patch.
>>> Signed-off-by: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io>>
>>> ---
>>>  MAINTAINERS                        |  3 ++-
>>>  doc/guides/nics/features/ionic.ini |  2 ++
>>>  doc/guides/nics/ionic.rst          | 13 +++++++------
>>>  3 files changed, 11 insertions(+), 7 deletions(-)
>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> index eafe9f8c4..6534983c1 100644
>>> --- a/MAINTAINERS
>>> +++ b/MAINTAINERS
>>> @@ -841,7 +841,8 @@ F: drivers/net/pfe/
>>>  F: doc/guides/nics/features/pfe.ini
>>>    Pensando ionic - UNMAINTAINED
>>> -M: Alfredo Cardigliano <cardigliano@ntop.org <mailto:cardigliano@ntop.org>>
>>> +M: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io>>
>>> +M: Pensando Drivers <drivers@pensando.io <mailto:drivers@pensando.io>>
>>
>> Same comment from previous version, please don't add group as maintainer, only 
>> actual people.
> 
> I responded to your original comment about this back in November. Is there an 
> official DPDK policy against doing this? Is it your preference? We would very 
> much prefer to have this in the file as a fallback. As long as there is still at 
> least one person listed, what is the harm?
> 

There is no official policy against it as far as I know.

The problem with the groups is we don't know who is behind it, it blurs who is 
the owner/responsible of the component. Actual people makes it clear that who is 
responsible.

Why do you prefer to add a group as maintainer?

>>>  F: drivers/net/ionic/
>>>  F: doc/guides/nics/ionic.rst
>>>  F: doc/guides/nics/features/ionic.ini
>>> diff --git a/doc/guides/nics/features/ionic.ini 
>>> b/doc/guides/nics/features/ionic.ini
>>> index 083c7bd99..dd29dbed6 100644
>>> --- a/doc/guides/nics/features/ionic.ini
>>> +++ b/doc/guides/nics/features/ionic.ini
>>> @@ -8,6 +8,7 @@ Speed capabilities   = Y
>>>  Link status          = Y
>>>  Link status event    = Y
>>>  Queue start/stop     = Y
>>> +Lock-free Tx queue   = Y
>>
>> Are you sure this is supported?
>> Since it is not advertised as capability, I think this can't be claimed as 
>> supported, but still even after this is added as capability, can you please 
>> confirm your device supports multiple core enqueue to same queue without locks?
> 
> I misunderstood the meaning of this flag, will remove.
> 
>>>  MTU update           = Y
>>>  Jumbo frame          = Y
>>>  Scattered Rx         = Y
>>> @@ -19,6 +20,7 @@ Unicast MAC filter   = Y
>>>  RSS hash             = Y
>>>  RSS key update       = Y
>>>  RSS reta update      = Y
>>> +SR-IOV               = Y
>>
>> Can you please explain what is exactly supported? Like can DPDK drive both PF 
>> & VF?
> 
> Yes. The PMD does not distinguish between PFs and VFs.
> 
>>
>> <...>
>>
>>> @@ -7,15 +7,16 @@ IONIC Driver
>>>  The ionic driver provides support for Pensando server adapters.
>>>  It currently supports the below models:
>>>  -- `Naples DSC-25 
>>> <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf 
>>> <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>>`_
>>> -- `Naples DSC-100 
>>> <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf 
>>> <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>>`_
>>> +- DSC-25 dual-port 25G Distributed Services Card
>>> +- DSC-100 dual-port 100G Distributed Services Card
>>>
>>
>> Same comment from previous version, can you provide link for these devices, it 
>> is hard to find the devices from the main site.
> 
> And my same response from your previous comment. I do not control the website 
> and do not wish to put stale PDF links in this document, which will live 
> forever. The text includes the URL of the page containing links to the PDFs. Why 
> is this not acceptable?
> 

The request is to put links to the products that you are providing the driver 
for. This is to help people that are already interested your driver and reading 
your driver document, to reach to the product information easily.

The request is NOT to provide pdf etc, just a reference to the product. Don't 
you advertise your product in your official web site? If your product 
information is not visible/hidden, why you are providing the open source drivers 
for it?

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 8/9] net/ionic: minor refactorings and helper variables
  2020-12-09 14:39       ` Andrew Boyer
@ 2020-12-09 15:25         ` Ferruh Yigit
  0 siblings, 0 replies; 79+ messages in thread
From: Ferruh Yigit @ 2020-12-09 15:25 UTC (permalink / raw)
  To: Andrew Boyer; +Cc: dev, Alfredo Cardigliano

On 12/9/2020 2:39 PM, Andrew Boyer wrote:
> 
> 
>> On Dec 9, 2020, at 8:04 AM, Ferruh Yigit <ferruh.yigit@intel.com 
>> <mailto:ferruh.yigit@intel.com>> wrote:
>>
>> On 12/4/2020 8:16 PM, Andrew Boyer wrote:
>>> This makes the code clearer and conserves resources.
>>> Signed-off-by: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io>>
>>> ---
>>>  drivers/net/ionic/ionic_ethdev.c |  5 ++---
>>>  drivers/net/ionic/ionic_lif.c    | 15 ++++++++++-----
>>>  drivers/net/ionic/ionic_main.c   | 18 +++++++-----------
>>>  3 files changed, 19 insertions(+), 19 deletions(-)
>>> diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
>>> index ce6ca9671..a1c35ace3 100644
>>> --- a/drivers/net/ionic/ionic_ethdev.c
>>> +++ b/drivers/net/ionic/ionic_ethdev.c
>>> @@ -901,7 +901,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
>>> struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
>>> struct ionic_adapter *adapter = lif->adapter;
>>> struct ionic_dev *idev = &adapter->idev;
>>> -uint32_t allowed_speeds;
>>> +uint32_t speed, allowed_speeds;
>>> int err;
>>> IONIC_PRINT_CALL();
>>> @@ -929,8 +929,7 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
>>> }
>>> if (eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED) {
>>> -uint32_t speed = ionic_parse_link_speeds(dev_conf->link_speeds);
>>> -
>>> +speed = ionic_parse_link_speeds(dev_conf->link_speeds);
>>> if (speed)
>>> ionic_dev_cmd_port_speed(idev, speed);
>>> }
>>
>> Same comment from previous version, what is the reason to increase the scope 
>> of the 'speed' variable?
>> Functionality is same and isn't it better to have reduced scope?
> 
> In a future patch I will be redesigning this code block and speed will have 
> function scope.
> 
> I have tried to break things up into digestible bits. Is this not acceptable?
> 

On its own this is not a good change, please do the update in the future patch.

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 9/9] net/ionic: minor logging fixups
  2020-12-09 14:45       ` Andrew Boyer
@ 2020-12-09 15:42         ` Ferruh Yigit
  2020-12-09 19:26           ` Andrew Boyer
  0 siblings, 1 reply; 79+ messages in thread
From: Ferruh Yigit @ 2020-12-09 15:42 UTC (permalink / raw)
  To: Andrew Boyer; +Cc: dev, Alfredo Cardigliano

On 12/9/2020 2:45 PM, Andrew Boyer wrote:
> 
> 
>> On Dec 9, 2020, at 8:47 AM, Ferruh Yigit <ferruh.yigit@intel.com 
>> <mailto:ferruh.yigit@intel.com>> wrote:
>>
>> On 12/4/2020 8:16 PM, Andrew Boyer wrote:
>>> Expose ionic_opcode_to_str() so it can be used for dev cmds, too.
>>> Store the device name in struct adapter.
>>> Switch to memcpy() to work around gcc false positives.
>>> Signed-off-by: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io>>
>>> ---
>>>  drivers/net/ionic/ionic.h         |  1 +
>>>  drivers/net/ionic/ionic_dev.c     |  5 +++
>>>  drivers/net/ionic/ionic_dev.h     |  2 +
>>>  drivers/net/ionic/ionic_ethdev.c  |  4 +-
>>>  drivers/net/ionic/ionic_lif.c     | 68 ++++++++++++++++---------------
>>>  drivers/net/ionic/ionic_mac_api.c |  4 +-
>>>  drivers/net/ionic/ionic_main.c    | 32 ++++++++-------
>>>  drivers/net/ionic/ionic_rxtx.c    | 41 ++++++++-----------
>>>  8 files changed, 84 insertions(+), 73 deletions(-)
>>
>> <...>
>>
>>> @@ -1217,12 +1221,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
>>> }
>>> };
>>>  -IONIC_PRINT(DEBUG, "notifyq_init.index %d",
>>> -ctx.cmd.q_init.index);
>>> -IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
>>> -ctx.cmd.q_init.ring_base);
>>> +IONIC_PRINT(DEBUG, "notifyq_init.index %d", q->index);
>>> +IONIC_PRINT(DEBUG, "notifyq_init.ring_base %#jx", q->base_pa);
>>
>> There are lots of similar PRIx64 -> %j change in this patch,
>> '%j' specifier is for 'intmax_t' and which seems 64bit storage, so this should 
>> work with 64 bit variable 'q->base_pa',
>> but the variable is explicitly uint64_t why replacing 'PRIx64' usage which is 
>> correct and more common usage in the DPDK? Why ionic is want to do this in its 
>> own way, I am not clear of the motivation of these changes really, can you 
>> please clarify?
> 
> As best I know, I am following the (two different) contribute guidelines pages, 
> both of which direct submitters to run checkpatch. One of things checkpatch 
> flags is lines over 80 columns. Many of these lines were over 80 columns or 
> oddly broken to meet the 80 column limit.
> 
> %j is used in many other places in this PMD - as originally written by Alfredo, 
> one of your core contributors. If we are allowed to use %j, I want to, since I 
> much prefer it to the hideous PRIx64.
> 

%j is accepted, that is not an issue. But you are making an active effort to 
convert PRIx64 -> %j, which is very unnecessary in my opinion.

80 column limit is not for log strings, but even if you are fixing them that is 
different thing from the PRIx64 -> %j conversion, you can keep PRIx64 and stay 
in 80 columns, and indeed lots of the cases the column limit seems not an issue 
at all.

Andrew, this is a driver currently marked as 'UNMAINTAINED', I kindly suggest 
focusing your 70+ functional changes instead of this PRIx64 -> %j syntax 
changes, but it is all up to you of course.

>> <...>
>>
>>> @@ -1448,8 +1450,9 @@ ionic_lif_set_name(struct ionic_lif *lif)
>>> },
>>> };
>>>  -snprintf(ctx.cmd.lif_setattr.name, sizeof(ctx.cmd.lif_setattr.name),
>>> -"%d", lif->port_id);
>>> +/* FW is responsible for NULL terminating this field */
>>> +memcpy(ctx.cmd.lif_setattr.name, lif->name,
>>> +sizeof(ctx.cmd.lif_setattr.name));
>>
>> Even though FW may be guaranting the string will be null terminated, won't it 
>> be nice to provide input as null terminated if this is the expectation?
> 
> No, that is not the expectation. We prefer it to be this way.
> 

It is know that FW will add NULL terminate the string but you "prefer" to 
provide 'name' without NULL termination. Why?
"we prefer it to be this way" is not a good justification, please either change 
or explain in a logical way.

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 3/9] net/ionic: update documentation and MAINTAINERS
  2020-12-09 15:24         ` Ferruh Yigit
@ 2020-12-09 16:24           ` Andrew Boyer
  2020-12-09 17:15             ` Ferruh Yigit
  0 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-12-09 16:24 UTC (permalink / raw)
  To: Ferruh Yigit; +Cc: dev, Alfredo Cardigliano, Thomas Monjalon, David Marchand


> On Dec 9, 2020, at 10:24 AM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
> 
> On 12/9/2020 2:36 PM, Andrew Boyer wrote:
>> Please respond to my questions this time. I have ~70 more patches to post by December 20.
>>> On Dec 9, 2020, at 7:03 AM, Ferruh Yigit <ferruh.yigit@intel.com <mailto:ferruh.yigit@intel.com>> wrote:
>>> 
>>> On 12/4/2020 8:16 PM, Andrew Boyer wrote:
>>>> The UNMAINTAINED flag will be removed in a future patch.
>>>> Signed-off-by: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io>>
>>>> ---
>>>>  MAINTAINERS                        |  3 ++-
>>>>  doc/guides/nics/features/ionic.ini |  2 ++
>>>>  doc/guides/nics/ionic.rst          | 13 +++++++------
>>>>  3 files changed, 11 insertions(+), 7 deletions(-)
>>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>>> index eafe9f8c4..6534983c1 100644
>>>> --- a/MAINTAINERS
>>>> +++ b/MAINTAINERS
>>>> @@ -841,7 +841,8 @@ F: drivers/net/pfe/
>>>>  F: doc/guides/nics/features/pfe.ini
>>>>    Pensando ionic - UNMAINTAINED
>>>> -M: Alfredo Cardigliano <cardigliano@ntop.org <mailto:cardigliano@ntop.org>>
>>>> +M: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io>>
>>>> +M: Pensando Drivers <drivers@pensando.io <mailto:drivers@pensando.io>>
>>> 
>>> Same comment from previous version, please don't add group as maintainer, only actual people.
>> I responded to your original comment about this back in November. Is there an official DPDK policy against doing this? Is it your preference? We would very much prefer to have this in the file as a fallback. As long as there is still at least one person listed, what is the harm?
> 
> There is no official policy against it as far as I know.
> 
> The problem with the groups is we don't know who is behind it, it blurs who is the owner/responsible of the component. Actual people makes it clear that who is responsible.
> 
> Why do you prefer to add a group as maintainer?

Because if I am on leave for some reason, one of the other handful of maintainers might be able to help someone with a problem or a question.

If I am listed specifically, doesn’t that make clear “who is the owner/responsible” for ionic PMD? What harm does having drivers@ listed do?

>>>>  F: drivers/net/ionic/
>>>>  F: doc/guides/nics/ionic.rst
>>>>  F: doc/guides/nics/features/ionic.ini
>>>> diff --git a/doc/guides/nics/features/ionic.ini b/doc/guides/nics/features/ionic.ini
>>>> index 083c7bd99..dd29dbed6 100644
>>>> --- a/doc/guides/nics/features/ionic.ini
>>>> +++ b/doc/guides/nics/features/ionic.ini
>>>> @@ -8,6 +8,7 @@ Speed capabilities   = Y
>>>>  Link status          = Y
>>>>  Link status event    = Y
>>>>  Queue start/stop     = Y
>>>> +Lock-free Tx queue   = Y
>>> 
>>> Are you sure this is supported?
>>> Since it is not advertised as capability, I think this can't be claimed as supported, but still even after this is added as capability, can you please confirm your device supports multiple core enqueue to same queue without locks?
>> I misunderstood the meaning of this flag, will remove.
>>>>  MTU update           = Y
>>>>  Jumbo frame          = Y
>>>>  Scattered Rx         = Y
>>>> @@ -19,6 +20,7 @@ Unicast MAC filter   = Y
>>>>  RSS hash             = Y
>>>>  RSS key update       = Y
>>>>  RSS reta update      = Y
>>>> +SR-IOV               = Y
>>> 
>>> Can you please explain what is exactly supported? Like can DPDK drive both PF & VF?
>> Yes. The PMD does not distinguish between PFs and VFs.
>>> 
>>> <...>
>>> 
>>>> @@ -7,15 +7,16 @@ IONIC Driver
>>>>  The ionic driver provides support for Pensando server adapters.
>>>>  It currently supports the below models:
>>>>  -- `Naples DSC-25 <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>>`_
>>>> -- `Naples DSC-100 <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>>`_
>>>> +- DSC-25 dual-port 25G Distributed Services Card
>>>> +- DSC-100 dual-port 100G Distributed Services Card
>>>> 
>>> 
>>> Same comment from previous version, can you provide link for these devices, it is hard to find the devices from the main site.
>> And my same response from your previous comment. I do not control the website and do not wish to put stale PDF links in this document, which will live forever. The text includes the URL of the page containing links to the PDFs. Why is this not acceptable?
> 
> The request is to put links to the products that you are providing the driver for. This is to help people that are already interested your driver and reading your driver document, to reach to the product information easily.
> 
> The request is NOT to provide pdf etc, just a reference to the product. Don't you advertise your product in your official web site? If your product information is not visible/hidden, why you are providing the open source drivers for it?

Does this line in the doc not satisfy your request?

+The `Documents <https://pensando.io/documents/ <https://pensando.io/documents/>>`_ page contains Product Briefs and other product information.

-Andrew




^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 3/9] net/ionic: update documentation and MAINTAINERS
  2020-12-09 16:24           ` Andrew Boyer
@ 2020-12-09 17:15             ` Ferruh Yigit
  2020-12-09 19:05               ` Andrew Boyer
  0 siblings, 1 reply; 79+ messages in thread
From: Ferruh Yigit @ 2020-12-09 17:15 UTC (permalink / raw)
  To: Andrew Boyer; +Cc: dev, Alfredo Cardigliano, Thomas Monjalon, David Marchand

On 12/9/2020 4:24 PM, Andrew Boyer wrote:
> 
>> On Dec 9, 2020, at 10:24 AM, Ferruh Yigit <ferruh.yigit@intel.com 
>> <mailto:ferruh.yigit@intel.com>> wrote:
>>
>> On 12/9/2020 2:36 PM, Andrew Boyer wrote:
>>> Please respond to my questions this time. I have ~70 more patches to post by 
>>> December 20.
>>>> On Dec 9, 2020, at 7:03 AM, Ferruh Yigit <ferruh.yigit@intel.com 
>>>> <mailto:ferruh.yigit@intel.com> <mailto:ferruh.yigit@intel.com 
>>>> <mailto:ferruh.yigit@intel.com>>> wrote:
>>>>
>>>> On 12/4/2020 8:16 PM, Andrew Boyer wrote:
>>>>> The UNMAINTAINED flag will be removed in a future patch.
>>>>> Signed-off-by: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io> 
>>>>> <mailto:aboyer@pensando.io <mailto:aboyer@pensando.io>>>
>>>>> ---
>>>>>  MAINTAINERS                        |  3 ++-
>>>>>  doc/guides/nics/features/ionic.ini |  2 ++
>>>>>  doc/guides/nics/ionic.rst          | 13 +++++++------
>>>>>  3 files changed, 11 insertions(+), 7 deletions(-)
>>>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>>>> index eafe9f8c4..6534983c1 100644
>>>>> --- a/MAINTAINERS
>>>>> +++ b/MAINTAINERS
>>>>> @@ -841,7 +841,8 @@ F: drivers/net/pfe/
>>>>>  F: doc/guides/nics/features/pfe.ini
>>>>>    Pensando ionic - UNMAINTAINED
>>>>> -M: Alfredo Cardigliano <cardigliano@ntop.org <mailto:cardigliano@ntop.org> 
>>>>> <mailto:cardigliano@ntop.org <mailto:cardigliano@ntop.org>>>
>>>>> +M: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io> 
>>>>> <mailto:aboyer@pensando.io <mailto:aboyer@pensando.io>>>
>>>>> +M: Pensando Drivers <drivers@pensando.io <mailto:drivers@pensando.io> 
>>>>> <mailto:drivers@pensando.io <mailto:drivers@pensando.io>>>
>>>>
>>>> Same comment from previous version, please don't add group as maintainer, 
>>>> only actual people.
>>> I responded to your original comment about this back in November. Is there an 
>>> official DPDK policy against doing this? Is it your preference? We would very 
>>> much prefer to have this in the file as a fallback. As long as there is still 
>>> at least one person listed, what is the harm?
>>
>> There is no official policy against it as far as I know.
>>
>> The problem with the groups is we don't know who is behind it, it blurs who is 
>> the owner/responsible of the component. Actual people makes it clear that who 
>> is responsible.
>>
>> Why do you prefer to add a group as maintainer?
> 
> Because if I am on leave for some reason, one of the other handful of 
> maintainers might be able to help someone with a problem or a question.
> 
> If I am listed specifically, doesn’t that make clear “who is the 
> owner/responsible” for ionic PMD? What harm does having drivers@ listed do?
> 

If you want backups, pick and list a few of those handful maintainers and add to 
the list, so we can know who they are.

As already said problem is we don't know who is behind a group, if they are 
reliable or not, or is there really someone or not, what happens if group become 
silent?
You can cc that group in your patches, that is commonly done, so they can be 
part of the development process, but the maintainers file is to define 
responsible people, adding a group is hiding actual responsible people.

>>>>>  F: drivers/net/ionic/
>>>>>  F: doc/guides/nics/ionic.rst
>>>>>  F: doc/guides/nics/features/ionic.ini
>>>>> diff --git a/doc/guides/nics/features/ionic.ini 
>>>>> b/doc/guides/nics/features/ionic.ini
>>>>> index 083c7bd99..dd29dbed6 100644
>>>>> --- a/doc/guides/nics/features/ionic.ini
>>>>> +++ b/doc/guides/nics/features/ionic.ini
>>>>> @@ -8,6 +8,7 @@ Speed capabilities   = Y
>>>>>  Link status          = Y
>>>>>  Link status event    = Y
>>>>>  Queue start/stop     = Y
>>>>> +Lock-free Tx queue   = Y
>>>>
>>>> Are you sure this is supported?
>>>> Since it is not advertised as capability, I think this can't be claimed as 
>>>> supported, but still even after this is added as capability, can you please 
>>>> confirm your device supports multiple core enqueue to same queue without locks?
>>> I misunderstood the meaning of this flag, will remove.
>>>>>  MTU update           = Y
>>>>>  Jumbo frame          = Y
>>>>>  Scattered Rx         = Y
>>>>> @@ -19,6 +20,7 @@ Unicast MAC filter   = Y
>>>>>  RSS hash             = Y
>>>>>  RSS key update       = Y
>>>>>  RSS reta update      = Y
>>>>> +SR-IOV               = Y
>>>>
>>>> Can you please explain what is exactly supported? Like can DPDK drive both 
>>>> PF & VF?
>>> Yes. The PMD does not distinguish between PFs and VFs.
>>>>
>>>> <...>
>>>>
>>>>> @@ -7,15 +7,16 @@ IONIC Driver
>>>>>  The ionic driver provides support for Pensando server adapters.
>>>>>  It currently supports the below models:
>>>>>  -- `Naples DSC-25 
>>>>> <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf 
>>>>> <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf> 
>>>>> <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf 
>>>>> <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>>>`_
>>>>> -- `Naples DSC-100 
>>>>> <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf 
>>>>> <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf> 
>>>>> <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf 
>>>>> <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>>>`_
>>>>> +- DSC-25 dual-port 25G Distributed Services Card
>>>>> +- DSC-100 dual-port 100G Distributed Services Card
>>>>>
>>>>
>>>> Same comment from previous version, can you provide link for these devices, 
>>>> it is hard to find the devices from the main site.
>>> And my same response from your previous comment. I do not control the website 
>>> and do not wish to put stale PDF links in this document, which will live 
>>> forever. The text includes the URL of the page containing links to the PDFs. 
>>> Why is this not acceptable?
>>
>> The request is to put links to the products that you are providing the driver 
>> for. This is to help people that are already interested your driver and 
>> reading your driver document, to reach to the product information easily.
>>
>> The request is NOT to provide pdf etc, just a reference to the product. Don't 
>> you advertise your product in your official web site? If your product 
>> information is not visible/hidden, why you are providing the open source 
>> drivers for it?
> 
> Does this line in the doc not satisfy your request?
> 
> +The `Documents <https://pensando.io/documents/ 
> <https://pensando.io/documents/>>`_ page contains Product Briefs and other 
> product information.
> 

No it doesn't, it is not clear which document/product you are referring to.
Why it is hard to provide the link of products that your driver is for?


^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 3/9] net/ionic: update documentation and MAINTAINERS
  2020-12-09 17:15             ` Ferruh Yigit
@ 2020-12-09 19:05               ` Andrew Boyer
  2020-12-10  9:23                 ` Ferruh Yigit
  0 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-12-09 19:05 UTC (permalink / raw)
  To: Ferruh Yigit; +Cc: dev, Alfredo Cardigliano, Thomas Monjalon, David Marchand



> On Dec 9, 2020, at 12:15 PM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
> 
> On 12/9/2020 4:24 PM, Andrew Boyer wrote:
>>> On Dec 9, 2020, at 10:24 AM, Ferruh Yigit <ferruh.yigit@intel.com <mailto:ferruh.yigit@intel.com>> wrote:
>>> 
>>> On 12/9/2020 2:36 PM, Andrew Boyer wrote:
>>>> Please respond to my questions this time. I have ~70 more patches to post by December 20.
>>>>> On Dec 9, 2020, at 7:03 AM, Ferruh Yigit <ferruh.yigit@intel.com <mailto:ferruh.yigit@intel.com> <mailto:ferruh.yigit@intel.com <mailto:ferruh.yigit@intel.com>>> wrote:
>>>>> 
>>>>> On 12/4/2020 8:16 PM, Andrew Boyer wrote:
>>>>>> The UNMAINTAINED flag will be removed in a future patch.
>>>>>> Signed-off-by: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io> <mailto:aboyer@pensando.io <mailto:aboyer@pensando.io>>>
>>>>>> ---
>>>>>>  MAINTAINERS                        |  3 ++-
>>>>>>  doc/guides/nics/features/ionic.ini |  2 ++
>>>>>>  doc/guides/nics/ionic.rst          | 13 +++++++------
>>>>>>  3 files changed, 11 insertions(+), 7 deletions(-)
>>>>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>>>>> index eafe9f8c4..6534983c1 100644
>>>>>> --- a/MAINTAINERS
>>>>>> +++ b/MAINTAINERS
>>>>>> @@ -841,7 +841,8 @@ F: drivers/net/pfe/
>>>>>>  F: doc/guides/nics/features/pfe.ini
>>>>>>    Pensando ionic - UNMAINTAINED
>>>>>> -M: Alfredo Cardigliano <cardigliano@ntop.org <mailto:cardigliano@ntop.org> <mailto:cardigliano@ntop.org <mailto:cardigliano@ntop.org>>>
>>>>>> +M: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io> <mailto:aboyer@pensando.io <mailto:aboyer@pensando.io>>>
>>>>>> +M: Pensando Drivers <drivers@pensando.io <mailto:drivers@pensando.io> <mailto:drivers@pensando.io <mailto:drivers@pensando.io>>>
>>>>> 
>>>>> Same comment from previous version, please don't add group as maintainer, only actual people.
>>>> I responded to your original comment about this back in November. Is there an official DPDK policy against doing this? Is it your preference? We would very much prefer to have this in the file as a fallback. As long as there is still at least one person listed, what is the harm?
>>> 
>>> There is no official policy against it as far as I know.
>>> 
>>> The problem with the groups is we don't know who is behind it, it blurs who is the owner/responsible of the component. Actual people makes it clear that who is responsible.
>>> 
>>> Why do you prefer to add a group as maintainer?
>> Because if I am on leave for some reason, one of the other handful of maintainers might be able to help someone with a problem or a question.
>> If I am listed specifically, doesn’t that make clear “who is the owner/responsible” for ionic PMD? What harm does having drivers@ listed do?
> 
> If you want backups, pick and list a few of those handful maintainers and add to the list, so we can know who they are.
> 
> As already said problem is we don't know who is behind a group, if they are reliable or not, or is there really someone or not, what happens if group become silent?
> You can cc that group in your patches, that is commonly done, so they can be part of the development process, but the maintainers file is to define responsible people, adding a group is hiding actual responsible people.

Fine. Perhaps you could document somewhere that this requirement exists to save future people the trouble.


>>>>>>  F: drivers/net/ionic/
>>>>>>  F: doc/guides/nics/ionic.rst
>>>>>>  F: doc/guides/nics/features/ionic.ini
>>>>>> diff --git a/doc/guides/nics/features/ionic.ini b/doc/guides/nics/features/ionic.ini
>>>>>> index 083c7bd99..dd29dbed6 100644
>>>>>> --- a/doc/guides/nics/features/ionic.ini
>>>>>> +++ b/doc/guides/nics/features/ionic.ini
>>>>>> @@ -8,6 +8,7 @@ Speed capabilities   = Y
>>>>>>  Link status          = Y
>>>>>>  Link status event    = Y
>>>>>>  Queue start/stop     = Y
>>>>>> +Lock-free Tx queue   = Y
>>>>> 
>>>>> Are you sure this is supported?
>>>>> Since it is not advertised as capability, I think this can't be claimed as supported, but still even after this is added as capability, can you please confirm your device supports multiple core enqueue to same queue without locks?
>>>> I misunderstood the meaning of this flag, will remove.
>>>>>>  MTU update           = Y
>>>>>>  Jumbo frame          = Y
>>>>>>  Scattered Rx         = Y
>>>>>> @@ -19,6 +20,7 @@ Unicast MAC filter   = Y
>>>>>>  RSS hash             = Y
>>>>>>  RSS key update       = Y
>>>>>>  RSS reta update      = Y
>>>>>> +SR-IOV               = Y
>>>>> 
>>>>> Can you please explain what is exactly supported? Like can DPDK drive both PF & VF?
>>>> Yes. The PMD does not distinguish between PFs and VFs.
>>>>> 
>>>>> <...>
>>>>> 
>>>>>> @@ -7,15 +7,16 @@ IONIC Driver
>>>>>>  The ionic driver provides support for Pensando server adapters.
>>>>>>  It currently supports the below models:
>>>>>>  -- `Naples DSC-25 <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf> <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>>>`_
>>>>>> -- `Naples DSC-100 <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf> <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>>>`_
>>>>>> +- DSC-25 dual-port 25G Distributed Services Card
>>>>>> +- DSC-100 dual-port 100G Distributed Services Card
>>>>>> 
>>>>> 
>>>>> Same comment from previous version, can you provide link for these devices, it is hard to find the devices from the main site.
>>>> And my same response from your previous comment. I do not control the website and do not wish to put stale PDF links in this document, which will live forever. The text includes the URL of the page containing links to the PDFs. Why is this not acceptable?
>>> 
>>> The request is to put links to the products that you are providing the driver for. This is to help people that are already interested your driver and reading your driver document, to reach to the product information easily.
>>> 
>>> The request is NOT to provide pdf etc, just a reference to the product. Don't you advertise your product in your official web site? If your product information is not visible/hidden, why you are providing the open source drivers for it?
>> Does this line in the doc not satisfy your request?
>> +The `Documents <https://pensando.io/documents/ <https://pensando.io/documents/>>`_ page contains Product Briefs and other product information.
> 
> No it doesn't, it is not clear which document/product you are referring to.
> Why it is hard to provide the link of products that your driver is for?
> 

Fine. These links will become stale next time the files are updated, just like the links in the 20.02-20.11 releases are stale.

https://pensando.io/wp-content/uploads/2020/03/Pensando-DSC-25-Product-Brief.pdf
https://pensando.io/wp-content/uploads/2020/03/Pensando-DSC-100-Product-Brief.pdf

-Andrew


^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 9/9] net/ionic: minor logging fixups
  2020-12-09 15:42         ` Ferruh Yigit
@ 2020-12-09 19:26           ` Andrew Boyer
  2020-12-10  9:58             ` Ferruh Yigit
  0 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-12-09 19:26 UTC (permalink / raw)
  To: Ferruh Yigit; +Cc: dev, Alfredo Cardigliano



> On Dec 9, 2020, at 10:42 AM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
> 
> On 12/9/2020 2:45 PM, Andrew Boyer wrote:
>>> On Dec 9, 2020, at 8:47 AM, Ferruh Yigit <ferruh.yigit@intel.com <mailto:ferruh.yigit@intel.com>> wrote:
>>> 
>>> On 12/4/2020 8:16 PM, Andrew Boyer wrote:
>>>> Expose ionic_opcode_to_str() so it can be used for dev cmds, too.
>>>> Store the device name in struct adapter.
>>>> Switch to memcpy() to work around gcc false positives.
>>>> Signed-off-by: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io>>
>>>> ---
>>>>  drivers/net/ionic/ionic.h         |  1 +
>>>>  drivers/net/ionic/ionic_dev.c     |  5 +++
>>>>  drivers/net/ionic/ionic_dev.h     |  2 +
>>>>  drivers/net/ionic/ionic_ethdev.c  |  4 +-
>>>>  drivers/net/ionic/ionic_lif.c     | 68 ++++++++++++++++---------------
>>>>  drivers/net/ionic/ionic_mac_api.c |  4 +-
>>>>  drivers/net/ionic/ionic_main.c    | 32 ++++++++-------
>>>>  drivers/net/ionic/ionic_rxtx.c    | 41 ++++++++-----------
>>>>  8 files changed, 84 insertions(+), 73 deletions(-)
>>> 
>>> <...>
>>> 
>>>> @@ -1217,12 +1221,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
>>>> }
>>>> };
>>>>  -IONIC_PRINT(DEBUG, "notifyq_init.index %d",
>>>> -ctx.cmd.q_init.index);
>>>> -IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
>>>> -ctx.cmd.q_init.ring_base);
>>>> +IONIC_PRINT(DEBUG, "notifyq_init.index %d", q->index);
>>>> +IONIC_PRINT(DEBUG, "notifyq_init.ring_base %#jx", q->base_pa);
>>> 
>>> There are lots of similar PRIx64 -> %j change in this patch,
>>> '%j' specifier is for 'intmax_t' and which seems 64bit storage, so this should work with 64 bit variable 'q->base_pa',
>>> but the variable is explicitly uint64_t why replacing 'PRIx64' usage which is correct and more common usage in the DPDK? Why ionic is want to do this in its own way, I am not clear of the motivation of these changes really, can you please clarify?
>> As best I know, I am following the (two different) contribute guidelines pages, both of which direct submitters to run checkpatch. One of things checkpatch flags is lines over 80 columns. Many of these lines were over 80 columns or oddly broken to meet the 80 column limit.
>> %j is used in many other places in this PMD - as originally written by Alfredo, one of your core contributors. If we are allowed to use %j, I want to, since I much prefer it to the hideous PRIx64.
> 
> %j is accepted, that is not an issue. But you are making an active effort to convert PRIx64 -> %j, which is very unnecessary in my opinion.

Ferruh, I made these changes months ago. Changing them back now is going to take at least a few hours - many other changes are layered on top.

> 80 column limit is not for log strings, but even if you are fixing them that is different thing from the PRIx64 -> %j conversion, you can keep PRIx64 and stay in 80 columns, and indeed lots of the cases the column limit seems not an issue at all.
> 
> Andrew, this is a driver currently marked as 'UNMAINTAINED', I kindly suggest focusing your 70+ functional changes instead of this PRIx64 -> %j syntax changes, but it is all up to you of course.

Apparently it is not up to me, though, is it? I would very much appreciate if you would respond to my request for a meeting, at any time you find convenient.

When I add new log messages in the future (including adding to these lists of FW values and response codes), should I use PRIx64 or %jx?
Should I expect your objection to a mix of PRIx64 and %jx in the same paragraph?
Am I allowed to change from PRIx64 to %jx if I am also modifying the text or the value logged?

This is going to involve respinning all of those functional patches, and since I am not a mind-reader it seems likely that this is going to take years.

>>> <...>
>>> 
>>>> @@ -1448,8 +1450,9 @@ ionic_lif_set_name(struct ionic_lif *lif)
>>>> },
>>>> };
>>>>  -snprintf(ctx.cmd.lif_setattr.name, sizeof(ctx.cmd.lif_setattr.name),
>>>> -"%d", lif->port_id);
>>>> +/* FW is responsible for NULL terminating this field */
>>>> +memcpy(ctx.cmd.lif_setattr.name, lif->name,
>>>> +sizeof(ctx.cmd.lif_setattr.name));
>>> 
>>> Even though FW may be guaranting the string will be null terminated, won't it be nice to provide input as null terminated if this is the expectation?
>> No, that is not the expectation. We prefer it to be this way.
> 
> It is know that FW will add NULL terminate the string but you "prefer" to provide 'name' without NULL termination. Why?
> "we prefer it to be this way" is not a good justification, please either change or explain in a logical way.

I will set the last character to NULL if that is what you want. I do not see how it serves any purpose.

-Andrew

^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v4 0/9] net/ionic: minor updates and documentation
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
@ 2020-12-10  2:07     ` Andrew Boyer
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 " Andrew Boyer
                         ` (9 more replies)
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 1/9] net/ionic: connect ionic to the build system Andrew Boyer
                       ` (8 subsequent siblings)
  9 siblings, 10 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:07 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

These patches make some minor changes to the ionic PMD.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>

---
v4:
* Address additional reviewer comments

v3:
* Fixed up false-positives from codespell and gcc 8.3/9.3

v2:
* Address Ferruh's comments (thank you!)
* Switch to net/ionic: prefix
* Leave UNMAINTAINED flag for now
* Split patch 8 into patch 8 & 9; drop whitespace changes

Andrew Boyer (9):
  net/ionic: connect ionic to the build system
  net/ionic: update interface file to the latest version
  net/ionic: update documentation and MAINTAINERS
  net/ionic: check for cmd completion more frequently
  net/ionic: remove some unused fields
  net/ionic: convert 'deferred' boolean to a flag bit
  net/ionic: warn if loopback mode is requested
  net/ionic: minor refactorings and helper variables
  net/ionic: minor logging fixups

 MAINTAINERS                        |    2 +-
 doc/guides/nics/features/ionic.ini |    1 +
 doc/guides/nics/ionic.rst          |   13 +-
 drivers/net/ionic/ionic.h          |    2 +-
 drivers/net/ionic/ionic_dev.c      |   10 +-
 drivers/net/ionic/ionic_dev.h      |   13 +-
 drivers/net/ionic/ionic_ethdev.c   |    9 +-
 drivers/net/ionic/ionic_if.h       | 1343 +++++++++++++++++++---------
 drivers/net/ionic/ionic_lif.c      |   67 +-
 drivers/net/ionic/ionic_lif.h      |    4 +-
 drivers/net/ionic/ionic_main.c     |   86 +-
 drivers/net/ionic/ionic_osdep.h    |   10 -
 drivers/net/ionic/ionic_regs.h     |    9 -
 drivers/net/ionic/ionic_rxtx.c     |   51 +-
 drivers/net/meson.build            |    1 +
 15 files changed, 1061 insertions(+), 560 deletions(-)

-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v4 1/9] net/ionic: connect ionic to the build system
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
@ 2020-12-10  2:07     ` Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 2/9] net/ionic: update interface file to the latest version Andrew Boyer
                       ` (7 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:07 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

Otherwise the ionic PMD is never built.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/meson.build | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index 29f477750..6e4aa6bf3 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -26,6 +26,7 @@ drivers = ['af_packet',
 	'iavf',
 	'ice',
 	'igc',
+	'ionic',
 	'ipn3ke',
 	'ixgbe',
 	'kni',
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v4 2/9] net/ionic: update interface file to the latest version
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 1/9] net/ionic: connect ionic to the build system Andrew Boyer
@ 2020-12-10  2:07     ` Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
                       ` (6 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:07 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

The ionic_if.h file contains the firmware interface definitions.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_if.h   | 1343 ++++++++++++++++++++++----------
 drivers/net/ionic/ionic_regs.h |    3 -
 2 files changed, 930 insertions(+), 416 deletions(-)

diff --git a/drivers/net/ionic/ionic_if.h b/drivers/net/ionic/ionic_if.h
index f83c8711b..ba4cc4b72 100644
--- a/drivers/net/ionic/ionic_if.h
+++ b/drivers/net/ionic/ionic_if.h
@@ -1,17 +1,15 @@
 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB OR BSD-3-Clause */
-/* Copyright (c) 2017-2019 Pensando Systems, Inc.  All rights reserved. */
+/* Copyright (c) 2017-2020 Pensando Systems, Inc.  All rights reserved. */
 
 #ifndef _IONIC_IF_H_
 #define _IONIC_IF_H_
 
-#pragma pack(push, 1)
-
 #define IONIC_DEV_INFO_SIGNATURE		0x44455649      /* 'DEVI' */
 #define IONIC_DEV_INFO_VERSION			1
 #define IONIC_IFNAMSIZ				16
 
 /**
- * Commands
+ * enum ionic_cmd_opcode - Device commands
  */
 enum ionic_cmd_opcode {
 	IONIC_CMD_NOP				= 0,
@@ -42,6 +40,7 @@ enum ionic_cmd_opcode {
 	IONIC_CMD_RX_FILTER_DEL			= 32,
 
 	/* Queue commands */
+	IONIC_CMD_Q_IDENTIFY			= 39,
 	IONIC_CMD_Q_INIT			= 40,
 	IONIC_CMD_Q_CONTROL			= 41,
 
@@ -51,10 +50,17 @@ enum ionic_cmd_opcode {
 	IONIC_CMD_RDMA_CREATE_CQ		= 52,
 	IONIC_CMD_RDMA_CREATE_ADMINQ		= 53,
 
+	/* SR/IOV commands */
+	IONIC_CMD_VF_GETATTR			= 60,
+	IONIC_CMD_VF_SETATTR			= 61,
+
 	/* QoS commands */
 	IONIC_CMD_QOS_CLASS_IDENTIFY		= 240,
 	IONIC_CMD_QOS_CLASS_INIT		= 241,
 	IONIC_CMD_QOS_CLASS_RESET		= 242,
+	IONIC_CMD_QOS_CLASS_UPDATE		= 243,
+	IONIC_CMD_QOS_CLEAR_STATS		= 244,
+	IONIC_CMD_QOS_RESET			= 245,
 
 	/* Firmware commands */
 	IONIC_CMD_FW_DOWNLOAD			= 254,
@@ -62,7 +68,7 @@ enum ionic_cmd_opcode {
 };
 
 /**
- * Command Return codes
+ * enum ionic_status_code - Device command return codes
  */
 enum ionic_status_code {
 	IONIC_RC_SUCCESS	= 0,	/* Success */
@@ -86,8 +92,8 @@ enum ionic_status_code {
 	IONIC_RC_DEV_CMD	= 18,	/* Device cmd attempted on AdminQ */
 	IONIC_RC_ENOSUPP	= 19,	/* Operation not supported */
 	IONIC_RC_ERROR		= 29,	/* Generic error */
-
 	IONIC_RC_ERDMA		= 30,	/* Generic RDMA error */
+	IONIC_RC_EVFID		= 31,	/* VF ID does not exist */
 };
 
 enum ionic_notifyq_opcode {
@@ -95,10 +101,11 @@ enum ionic_notifyq_opcode {
 	IONIC_EVENT_RESET		= 2,
 	IONIC_EVENT_HEARTBEAT		= 3,
 	IONIC_EVENT_LOG			= 4,
+	IONIC_EVENT_XCVR		= 5,
 };
 
 /**
- * struct cmd - General admin command format
+ * struct ionic_admin_cmd - General admin command format
  * @opcode:     Opcode for the command
  * @lif_index:  LIF index
  * @cmd_data:   Opcode-specific command bytes
@@ -112,12 +119,11 @@ struct ionic_admin_cmd {
 
 /**
  * struct ionic_admin_comp - General admin command completion format
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
- * @cmd_data:   Command-specific bytes.
- * @color:      Color bit.  (Always 0 for commands issued to the
- *              Device Cmd Registers.)
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @cmd_data:   Command-specific bytes
+ * @color:      Color bit (Always 0 for commands issued to the
+ *              Device Cmd Registers)
  */
 struct ionic_admin_comp {
 	u8     status;
@@ -144,7 +150,7 @@ struct ionic_nop_cmd {
 
 /**
  * struct ionic_nop_comp - NOP command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_nop_comp {
 	u8 status;
@@ -154,7 +160,7 @@ struct ionic_nop_comp {
 /**
  * struct ionic_dev_init_cmd - Device init command
  * @opcode:    opcode
- * @type:      device type
+ * @type:      Device type
  */
 struct ionic_dev_init_cmd {
 	u8     opcode;
@@ -163,8 +169,8 @@ struct ionic_dev_init_cmd {
 };
 
 /**
- * struct init_comp - Device init command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_init_comp - Device init command completion
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_dev_init_comp {
 	u8 status;
@@ -181,8 +187,8 @@ struct ionic_dev_reset_cmd {
 };
 
 /**
- * struct reset_comp - Reset command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_reset_comp - Reset command completion
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_dev_reset_comp {
 	u8 status;
@@ -203,8 +209,8 @@ struct ionic_dev_identify_cmd {
 };
 
 /**
- * struct dev_identify_comp - Driver/device identify command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_identify_comp - Driver/device identify command completion
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_dev_identify_comp {
@@ -223,8 +229,8 @@ enum ionic_os_type {
 };
 
 /**
- * union drv_identity - driver identity information
- * @os_type:          OS type (see enum os_type)
+ * union ionic_drv_identity - driver identity information
+ * @os_type:          OS type (see enum ionic_os_type)
  * @os_dist:          OS distribution, numeric format
  * @os_dist_str:      OS distribution, string format
  * @kernel_ver:       Kernel version, numeric format
@@ -240,26 +246,26 @@ union ionic_drv_identity {
 		char   kernel_ver_str[32];
 		char   driver_ver_str[32];
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
- * union dev_identity - device identity information
+ * union ionic_dev_identity - device identity information
  * @version:          Version of device identify
  * @type:             Identify type (0 for now)
  * @nports:           Number of ports provisioned
  * @nlifs:            Number of LIFs provisioned
  * @nintrs:           Number of interrupts provisioned
  * @ndbpgs_per_lif:   Number of doorbell pages per LIF
- * @intr_coal_mult:   Interrupt coalescing multiplication factor.
+ * @intr_coal_mult:   Interrupt coalescing multiplication factor
  *                    Scale user-supplied interrupt coalescing
  *                    value in usecs to device units using:
  *                    device units = usecs * mult / div
- * @intr_coal_div:    Interrupt coalescing division factor.
+ * @intr_coal_div:    Interrupt coalescing division factor
  *                    Scale user-supplied interrupt coalescing
  *                    value in usecs to device units using:
  *                    device units = usecs * mult / div
- *
+ * @eq_count:         Number of shared event queues
  */
 union ionic_dev_identity {
 	struct {
@@ -273,8 +279,9 @@ union ionic_dev_identity {
 		__le32 ndbpgs_per_lif;
 		__le32 intr_coal_mult;
 		__le32 intr_coal_div;
+		__le32 eq_count;
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 enum ionic_lif_type {
@@ -284,10 +291,10 @@ enum ionic_lif_type {
 };
 
 /**
- * struct ionic_lif_identify_cmd - lif identify command
+ * struct ionic_lif_identify_cmd - LIF identify command
  * @opcode:  opcode
- * @type:    lif type (enum lif_type)
- * @ver:     version of identify returned by device
+ * @type:    LIF type (enum ionic_lif_type)
+ * @ver:     Version of identify returned by device
  */
 struct ionic_lif_identify_cmd {
 	u8 opcode;
@@ -297,9 +304,9 @@ struct ionic_lif_identify_cmd {
 };
 
 /**
- * struct ionic_lif_identify_comp - lif identify command completion
- * @status:  status of the command (enum status_code)
- * @ver:     version of identify returned by device
+ * struct ionic_lif_identify_comp - LIF identify command completion
+ * @status:  Status of the command (enum ionic_status_code)
+ * @ver:     Version of identify returned by device
  */
 struct ionic_lif_identify_comp {
 	u8 status;
@@ -307,13 +314,24 @@ struct ionic_lif_identify_comp {
 	u8 rsvd2[14];
 };
 
+/**
+ * enum ionic_lif_capability - LIF capabilities
+ * @IONIC_LIF_CAP_ETH:     LIF supports Ethernet
+ * @IONIC_LIF_CAP_RDMA:    LIF support RDMA
+ */
 enum ionic_lif_capability {
 	IONIC_LIF_CAP_ETH        = BIT(0),
 	IONIC_LIF_CAP_RDMA       = BIT(1),
 };
 
 /**
- * Logical Queue Types
+ * enum ionic_logical_qtype - Logical Queue Types
+ * @IONIC_QTYPE_ADMINQ:    Administrative Queue
+ * @IONIC_QTYPE_NOTIFYQ:   Notify Queue
+ * @IONIC_QTYPE_RXQ:       Receive Queue
+ * @IONIC_QTYPE_TXQ:       Transmit Queue
+ * @IONIC_QTYPE_EQ:        Event Queue
+ * @IONIC_QTYPE_MAX:       Max queue type supported
  */
 enum ionic_logical_qtype {
 	IONIC_QTYPE_ADMINQ  = 0,
@@ -325,11 +343,10 @@ enum ionic_logical_qtype {
 };
 
 /**
- * struct ionic_lif_logical_qtype - Descriptor of logical to hardware queue
- * type.
- * @qtype:          Hardware Queue Type.
- * @qid_count:      Number of Queue IDs of the logical type.
- * @qid_base:       Minimum Queue ID of the logical type.
+ * struct ionic_lif_logical_qtype - Descriptor of logical to HW queue type
+ * @qtype:          Hardware Queue Type
+ * @qid_count:      Number of Queue IDs of the logical type
+ * @qid_base:       Minimum Queue ID of the logical type
  */
 struct ionic_lif_logical_qtype {
 	u8     qtype;
@@ -338,20 +355,27 @@ struct ionic_lif_logical_qtype {
 	__le32 qid_base;
 };
 
+/**
+ * enum ionic_lif_state - LIF state
+ * @IONIC_LIF_DISABLE:     LIF disabled
+ * @IONIC_LIF_ENABLE:      LIF enabled
+ * @IONIC_LIF_QUIESCE:     LIF Quiesced
+ */
 enum ionic_lif_state {
-	IONIC_LIF_DISABLE	= 0,
+	IONIC_LIF_QUIESCE	= 0,
 	IONIC_LIF_ENABLE	= 1,
-	IONIC_LIF_HANG_RESET	= 2,
+	IONIC_LIF_DISABLE	= 2,
 };
 
 /**
- * LIF configuration
- * @state:          lif state (enum lif_state)
- * @name:           lif name
- * @mtu:            mtu
- * @mac:            station mac address
- * @features:       features (enum ionic_eth_hw_features)
- * @queue_count:    queue counts per queue-type
+ * union ionic_lif_config - LIF configuration
+ * @state:          LIF state (enum ionic_lif_state)
+ * @name:           LIF name
+ * @mtu:            MTU
+ * @mac:            Station MAC address
+ * @vlan:           Default Vlan ID
+ * @features:       Features (enum ionic_eth_hw_features)
+ * @queue_count:    Queue counts per queue-type
  */
 union ionic_lif_config {
 	struct {
@@ -360,45 +384,44 @@ union ionic_lif_config {
 		char   name[IONIC_IFNAMSIZ];
 		__le32 mtu;
 		u8     mac[6];
-		u8     rsvd2[2];
+		__le16 vlan;
 		__le64 features;
 		__le32 queue_count[IONIC_QTYPE_MAX];
-	};
+	} __rte_packed;
 	__le32 words[64];
 };
 
 /**
- * struct ionic_lif_identity - lif identity information (type-specific)
+ * struct ionic_lif_identity - LIF identity information (type-specific)
  *
- * @capabilities    LIF capabilities
+ * @capabilities:        LIF capabilities
  *
- * Ethernet:
- *     @version:          Ethernet identify structure version.
- *     @features:         Ethernet features supported on this lif type.
- *     @max_ucast_filters:  Number of perfect unicast addresses supported.
- *     @max_mcast_filters:  Number of perfect multicast addresses supported.
- *     @min_frame_size:   Minimum size of frames to be sent
- *     @max_frame_size:   Maximum size of frames to be sent
- *     @config:           LIF config struct with features, mtu, mac, q counts
+ * @eth:                    Ethernet identify structure
+ *     @version:            Ethernet identify structure version
+ *     @max_ucast_filters:  Number of perfect unicast addresses supported
+ *     @max_mcast_filters:  Number of perfect multicast addresses supported
+ *     @min_frame_size:     Minimum size of frames to be sent
+ *     @max_frame_size:     Maximum size of frames to be sent
+ *     @config:             LIF config struct with features, mtu, mac, q counts
  *
- * RDMA:
- *     @version:         RDMA version of opcodes and queue descriptors.
- *     @qp_opcodes:      Number of rdma queue pair opcodes supported.
- *     @admin_opcodes:   Number of rdma admin opcodes supported.
- *     @npts_per_lif:    Page table size per lif
- *     @nmrs_per_lif:    Number of memory regions per lif
- *     @nahs_per_lif:    Number of address handles per lif
- *     @max_stride:      Max work request stride.
- *     @cl_stride:       Cache line stride.
- *     @pte_stride:      Page table entry stride.
- *     @rrq_stride:      Remote RQ work request stride.
- *     @rsq_stride:      Remote SQ work request stride.
+ * @rdma:                RDMA identify structure
+ *     @version:         RDMA version of opcodes and queue descriptors
+ *     @qp_opcodes:      Number of RDMA queue pair opcodes supported
+ *     @admin_opcodes:   Number of RDMA admin opcodes supported
+ *     @npts_per_lif:    Page table size per LIF
+ *     @nmrs_per_lif:    Number of memory regions per LIF
+ *     @nahs_per_lif:    Number of address handles per LIF
+ *     @max_stride:      Max work request stride
+ *     @cl_stride:       Cache line stride
+ *     @pte_stride:      Page table entry stride
+ *     @rrq_stride:      Remote RQ work request stride
+ *     @rsq_stride:      Remote SQ work request stride
  *     @dcqcn_profiles:  Number of DCQCN profiles
- *     @aq_qtype:        RDMA Admin Qtype.
- *     @sq_qtype:        RDMA Send Qtype.
- *     @rq_qtype:        RDMA Receive Qtype.
- *     @cq_qtype:        RDMA Completion Qtype.
- *     @eq_qtype:        RDMA Event Qtype.
+ *     @aq_qtype:        RDMA Admin Qtype
+ *     @sq_qtype:        RDMA Send Qtype
+ *     @rq_qtype:        RDMA Receive Qtype
+ *     @cq_qtype:        RDMA Completion Qtype
+ *     @eq_qtype:        RDMA Event Qtype
  */
 union ionic_lif_identity {
 	struct {
@@ -414,7 +437,7 @@ union ionic_lif_identity {
 			__le32 max_frame_size;
 			u8 rsvd2[106];
 			union ionic_lif_config config;
-		} eth;
+		} __rte_packed eth;
 
 		struct {
 			u8 version;
@@ -436,17 +459,17 @@ union ionic_lif_identity {
 			struct ionic_lif_logical_qtype rq_qtype;
 			struct ionic_lif_logical_qtype cq_qtype;
 			struct ionic_lif_logical_qtype eq_qtype;
-		} rdma;
-	};
-	__le32 words[512];
+		} __rte_packed rdma;
+	} __rte_packed;
+	__le32 words[478];
 };
 
 /**
  * struct ionic_lif_init_cmd - LIF init command
- * @opcode:       opcode
- * @type:         LIF type (enum lif_type)
+ * @opcode:       Opcode
+ * @type:         LIF type (enum ionic_lif_type)
  * @index:        LIF index
- * @info_pa:      destination address for lif info (struct ionic_lif_info)
+ * @info_pa:      Destination address for LIF info (struct ionic_lif_info)
  */
 struct ionic_lif_init_cmd {
 	u8     opcode;
@@ -459,7 +482,8 @@ struct ionic_lif_init_cmd {
 
 /**
  * struct ionic_lif_init_comp - LIF init command completion
- * @status: The status of the command (enum status_code)
+ * @status:	Status of the command (enum ionic_status_code)
+ * @hw_index:	Hardware index of the initialized LIF
  */
 struct ionic_lif_init_comp {
 	u8 status;
@@ -468,14 +492,74 @@ struct ionic_lif_init_comp {
 	u8 rsvd2[12];
 };
 
+/**
+ * struct ionic_q_identify_cmd - queue identify command
+ * @opcode:     opcode
+ * @lif_type:   LIF type (enum ionic_lif_type)
+ * @type:       Logical queue type (enum ionic_logical_qtype)
+ * @ver:        Highest queue type version that the driver supports
+ */
+struct ionic_q_identify_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 lif_type;
+	u8     type;
+	u8     ver;
+	u8     rsvd2[58];
+};
+
+/**
+ * struct ionic_q_identify_comp - queue identify command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @ver:        Queue type version that can be used with FW
+ */
+struct ionic_q_identify_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	u8     ver;
+	u8     rsvd2[11];
+};
+
+/**
+ * union ionic_q_identity - queue identity information
+ *     @version:        Queue type version that can be used with FW
+ *     @supported:      Bitfield of queue versions, first bit = ver 0
+ *     @features:       Queue features
+ *     @desc_sz:        Descriptor size
+ *     @comp_sz:        Completion descriptor size
+ *     @sg_desc_sz:     Scatter/Gather descriptor size
+ *     @max_sg_elems:   Maximum number of Scatter/Gather elements
+ *     @sg_desc_stride: Number of Scatter/Gather elements per descriptor
+ */
+union ionic_q_identity {
+	struct {
+		u8      version;
+		u8      supported;
+		u8      rsvd[6];
+#define IONIC_QIDENT_F_CQ	0x01	/* queue has completion ring */
+#define IONIC_QIDENT_F_SG	0x02	/* queue has scatter/gather ring */
+#define IONIC_QIDENT_F_EQ	0x04	/* queue can use event queue */
+#define IONIC_QIDENT_F_CMB	0x08	/* queue is in cmb bar */
+		__le64  features;
+		__le16  desc_sz;
+		__le16  comp_sz;
+		__le16  sg_desc_sz;
+		__le16  max_sg_elems;
+		__le16  sg_desc_stride;
+	};
+	__le32 words[478];
+};
+
 /**
  * struct ionic_q_init_cmd - Queue init command
  * @opcode:       opcode
  * @type:         Logical queue type
- * @ver:          Queue version (defines opcode/descriptor scope)
+ * @ver:          Queue type version
  * @lif_index:    LIF index
- * @index:        (lif, qtype) relative admin queue index
- * @intr_index:   Interrupt control register index
+ * @index:        (LIF, qtype) relative admin queue index
+ * @intr_index:   Interrupt control register index, or Event queue index
  * @pid:          Process ID
  * @flags:
  *    IRQ:        Interrupt requested on completion
@@ -493,12 +577,11 @@ struct ionic_lif_init_comp {
  *                descriptors.  Values of ring_size <2 and >16 are
  *                reserved.
  *    EQ:         Enable the Event Queue
- * @cos:          Class of service for this queue.
+ * @cos:          Class of service for this queue
  * @ring_size:    Queue ring size, encoded as a log2(size)
  * @ring_base:    Queue ring base address
  * @cq_ring_base: Completion queue ring base address
  * @sg_ring_base: Scatter/Gather ring base address
- * @eq_index:	  Event queue index
  */
 struct ionic_q_init_cmd {
 	u8     opcode;
@@ -515,29 +598,27 @@ struct ionic_q_init_cmd {
 #define IONIC_QINIT_F_ENA	0x02	/* Enable the queue */
 #define IONIC_QINIT_F_SG	0x04	/* Enable scatter/gather on the queue */
 #define IONIC_QINIT_F_EQ	0x08	/* Enable event queue */
-#define IONIC_QINIT_F_DEBUG 0x80	/* Enable queue debugging */
+#define IONIC_QINIT_F_CMB	0x10	/* Enable cmb-based queue */
+#define IONIC_QINIT_F_DEBUG	0x80	/* Enable queue debugging */
 	u8     cos;
 	u8     ring_size;
 	__le64 ring_base;
 	__le64 cq_ring_base;
 	__le64 sg_ring_base;
-	__le32 eq_index;
-	u8     rsvd2[16];
-};
+	u8     rsvd2[20];
+} __rte_packed;
 
 /**
  * struct ionic_q_init_comp - Queue init command completion
- * @status:     The status of the command (enum status_code)
- * @ver:        Queue version (defines opcode/descriptor scope)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @hw_index:   Hardware Queue ID
  * @hw_type:    Hardware Queue type
  * @color:      Color
  */
 struct ionic_q_init_comp {
 	u8     status;
-	u8     ver;
+	u8     rsvd;
 	__le16 comp_index;
 	__le32 hw_index;
 	u8     hw_type;
@@ -558,10 +639,9 @@ enum ionic_txq_desc_opcode {
 
 /**
  * struct ionic_txq_desc - Ethernet Tx queue descriptor format
- * @opcode:       Tx operation, see TXQ_DESC_OPCODE_*:
+ * @cmd:          Tx operation, see IONIC_TXQ_DESC_OPCODE_*:
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_NONE:
- *
  *                      Non-offload send.  No segmentation,
  *                      fragmentation or checksum calc/insertion is
  *                      performed by device; packet is prepared
@@ -569,7 +649,6 @@ enum ionic_txq_desc_opcode {
  *                      no further manipulation from device.
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_PARTIAL:
- *
  *                      Offload 16-bit L4 checksum
  *                      calculation/insertion.  The device will
  *                      calculate the L4 checksum value and
@@ -578,14 +657,16 @@ enum ionic_txq_desc_opcode {
  *                      is calculated starting at @csum_start bytes
  *                      into the packet to the end of the packet.
  *                      The checksum insertion position is given
- *                      in @csum_offset.  This feature is only
- *                      applicable to protocols such as TCP, UDP
- *                      and ICMP where a standard (i.e. the
- *                      'IP-style' checksum) one's complement
- *                      16-bit checksum is used, using an IP
- *                      pseudo-header to seed the calculation.
- *                      Software will preload the L4 checksum
- *                      field with the IP pseudo-header checksum.
+ *                      in @csum_offset, which is the offset from
+ *                      @csum_start to the checksum field in the L4
+ *                      header.  This feature is only applicable to
+ *                      protocols such as TCP, UDP and ICMP where a
+ *                      standard (i.e. the 'IP-style' checksum)
+ *                      one's complement 16-bit checksum is used,
+ *                      using an IP pseudo-header to seed the
+ *                      calculation.  Software will preload the L4
+ *                      checksum field with the IP pseudo-header
+ *                      checksum.
  *
  *                      For tunnel encapsulation, @csum_start and
  *                      @csum_offset refer to the inner L4
@@ -597,11 +678,10 @@ enum ionic_txq_desc_opcode {
  *                      the @encap is set, the device will
  *                      offload the outer header checksums using
  *                      LCO (local checksum offload) (see
- *                      Documentation/networking/checksum-
- *                      offloads.txt for more info).
+ *                      Documentation/networking/checksum-offloads.rst
+ *                      for more info).
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_HW:
- *
  *                      Offload 16-bit checksum computation to hardware.
  *                      If @csum_l3 is set then the packet's L3 checksum is
  *                      updated. Similarly, if @csum_l4 is set the the L4
@@ -609,7 +689,6 @@ enum ionic_txq_desc_opcode {
  *                      checksums are also updated.
  *
  *                   IONIC_TXQ_DESC_OPCODE_TSO:
- *
  *                      Device performs TCP segmentation offload
  *                      (TSO).  @hdr_len is the number of bytes
  *                      to the end of TCP header (the offset to
@@ -636,40 +715,41 @@ enum ionic_txq_desc_opcode {
  *                      clear CWR in remaining segments.
  * @flags:
  *                vlan:
- *                    Insert an L2 VLAN header using @vlan_tci.
+ *                    Insert an L2 VLAN header using @vlan_tci
  *                encap:
- *                    Calculate encap header checksum.
+ *                    Calculate encap header checksum
  *                csum_l3:
- *                    Compute L3 header checksum.
+ *                    Compute L3 header checksum
  *                csum_l4:
- *                    Compute L4 header checksum.
+ *                    Compute L4 header checksum
  *                tso_sot:
  *                    TSO start
  *                tso_eot:
  *                    TSO end
  * @num_sg_elems: Number of scatter-gather elements in SG
  *                descriptor
- * @addr:         First data buffer's DMA address.
- *                (Subsequent data buffers are on txq_sg_desc).
+ * @addr:         First data buffer's DMA address
+ *                (Subsequent data buffers are on txq_sg_desc)
  * @len:          First data buffer's length, in bytes
  * @vlan_tci:     VLAN tag to insert in the packet (if requested
  *                by @V-bit).  Includes .1p and .1q tags
  * @hdr_len:      Length of packet headers, including
- *                encapsulating outer header, if applicable.
- *                Valid for opcodes TXQ_DESC_OPCODE_CALC_CSUM and
- *                TXQ_DESC_OPCODE_TSO.  Should be set to zero for
+ *                encapsulating outer header, if applicable
+ *                Valid for opcodes IONIC_TXQ_DESC_OPCODE_CALC_CSUM and
+ *                IONIC_TXQ_DESC_OPCODE_TSO.  Should be set to zero for
  *                all other modes.  For
- *                TXQ_DESC_OPCODE_CALC_CSUM, @hdr_len is length
+ *                IONIC_TXQ_DESC_OPCODE_CALC_CSUM, @hdr_len is length
  *                of headers up to inner-most L4 header.  For
- *                TXQ_DESC_OPCODE_TSO, @hdr_len is up to
+ *                IONIC_TXQ_DESC_OPCODE_TSO, @hdr_len is up to
  *                inner-most L4 payload, so inclusive of
  *                inner-most L4 header.
- * @mss:          Desired MSS value for TSO.  Only applicable for
- *                TXQ_DESC_OPCODE_TSO.
- * @csum_start:   Offset into inner-most L3 header of checksum
- * @csum_offset:  Offset into inner-most L4 header of checksum
+ * @mss:          Desired MSS value for TSO; only applicable for
+ *                IONIC_TXQ_DESC_OPCODE_TSO
+ * @csum_start:   Offset from packet to first byte checked in L4 checksum
+ * @csum_offset:  Offset from csum_start to L4 checksum field
  */
-
+struct ionic_txq_desc {
+	__le64  cmd;
 #define IONIC_TXQ_DESC_OPCODE_MASK		0xf
 #define IONIC_TXQ_DESC_OPCODE_SHIFT		4
 #define IONIC_TXQ_DESC_FLAGS_MASK		0xf
@@ -691,8 +771,6 @@ enum ionic_txq_desc_opcode {
 #define IONIC_TXQ_DESC_FLAG_TSO_SOT		0x4
 #define IONIC_TXQ_DESC_FLAG_TSO_EOT		0x8
 
-struct ionic_txq_desc {
-	__le64  cmd;
 	__le16  len;
 	union {
 		__le16  vlan_tci;
@@ -719,45 +797,60 @@ static inline u64 encode_txq_desc_cmd(u8 opcode, u8 flags,
 		IONIC_TXQ_DESC_OPCODE_SHIFT;
 	cmd |= (flags & IONIC_TXQ_DESC_FLAGS_MASK) <<
 		IONIC_TXQ_DESC_FLAGS_SHIFT;
-	cmd |= (nsge & IONIC_TXQ_DESC_NSGE_MASK) << IONIC_TXQ_DESC_NSGE_SHIFT;
-	cmd |= (addr & IONIC_TXQ_DESC_ADDR_MASK) << IONIC_TXQ_DESC_ADDR_SHIFT;
+	cmd |= (nsge & IONIC_TXQ_DESC_NSGE_MASK) <<
+		IONIC_TXQ_DESC_NSGE_SHIFT;
+	cmd |= (addr & IONIC_TXQ_DESC_ADDR_MASK) <<
+		IONIC_TXQ_DESC_ADDR_SHIFT;
 
 	return cmd;
 };
 
-static inline void decode_txq_desc_cmd(u64 cmd, u8 *opcode, u8 *flags,
+static inline void
+decode_txq_desc_cmd(u64 cmd, u8 *opcode, u8 *flags,
 				       u8 *nsge, u64 *addr)
 {
 	*opcode = (cmd >> IONIC_TXQ_DESC_OPCODE_SHIFT) &
 		IONIC_TXQ_DESC_OPCODE_MASK;
 	*flags = (cmd >> IONIC_TXQ_DESC_FLAGS_SHIFT) &
 		IONIC_TXQ_DESC_FLAGS_MASK;
-	*nsge = (cmd >> IONIC_TXQ_DESC_NSGE_SHIFT) & IONIC_TXQ_DESC_NSGE_MASK;
-	*addr = (cmd >> IONIC_TXQ_DESC_ADDR_SHIFT) & IONIC_TXQ_DESC_ADDR_MASK;
+	*nsge = (cmd >> IONIC_TXQ_DESC_NSGE_SHIFT) &
+		IONIC_TXQ_DESC_NSGE_MASK;
+	*addr = (cmd >> IONIC_TXQ_DESC_ADDR_SHIFT) &
+		IONIC_TXQ_DESC_ADDR_MASK;
 };
 
-#define IONIC_TX_MAX_SG_ELEMS	8
-#define IONIC_RX_MAX_SG_ELEMS	8
-
 /**
- * struct ionic_txq_sg_desc - Transmit scatter-gather (SG) list
+ * struct ionic_txq_sg_elem - Transmit scatter-gather (SG) descriptor element
  * @addr:      DMA address of SG element data buffer
  * @len:       Length of SG element data buffer, in bytes
  */
+struct ionic_txq_sg_elem {
+	__le64 addr;
+	__le16 len;
+	__le16 rsvd[3];
+};
+
+/**
+ * struct ionic_txq_sg_desc - Transmit scatter-gather (SG) list
+ * @elems:     Scatter-gather elements
+ */
 struct ionic_txq_sg_desc {
-	struct ionic_txq_sg_elem {
-		__le64 addr;
-		__le16 len;
-		__le16 rsvd[3];
-	} elems[IONIC_TX_MAX_SG_ELEMS];
+#define IONIC_TX_MAX_SG_ELEMS		8
+#define IONIC_TX_SG_DESC_STRIDE		8
+	struct ionic_txq_sg_elem elems[IONIC_TX_MAX_SG_ELEMS];
+};
+
+struct ionic_txq_sg_desc_v1 {
+#define IONIC_TX_MAX_SG_ELEMS_V1		15
+#define IONIC_TX_SG_DESC_STRIDE_V1		16
+	struct ionic_txq_sg_elem elems[IONIC_TX_SG_DESC_STRIDE_V1];
 };
 
 /**
  * struct ionic_txq_comp - Ethernet transmit queue completion descriptor
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *                 is the completion.
- * @color:      Color bit.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @color:      Color bit
  */
 struct ionic_txq_comp {
 	u8     status;
@@ -774,16 +867,15 @@ enum ionic_rxq_desc_opcode {
 
 /**
  * struct ionic_rxq_desc - Ethernet Rx queue descriptor format
- * @opcode:       Rx operation, see RXQ_DESC_OPCODE_*:
- *
- *                   RXQ_DESC_OPCODE_SIMPLE:
+ * @opcode:       Rx operation, see IONIC_RXQ_DESC_OPCODE_*:
  *
+ *                   IONIC_RXQ_DESC_OPCODE_SIMPLE:
  *                      Receive full packet into data buffer
  *                      starting at @addr.  Results of
  *                      receive, including actual bytes received,
  *                      are recorded in Rx completion descriptor.
  *
- * @len:          Data buffer's length, in bytes.
+ * @len:          Data buffer's length, in bytes
  * @addr:         Data buffer's DMA address
  */
 struct ionic_rxq_desc {
@@ -794,26 +886,33 @@ struct ionic_rxq_desc {
 };
 
 /**
- * struct ionic_rxq_sg_desc - Receive scatter-gather (SG) list
+ * struct ionic_rxq_sg_elem - Receive scatter-gather (SG) descriptor element
  * @addr:      DMA address of SG element data buffer
  * @len:       Length of SG element data buffer, in bytes
  */
+struct ionic_rxq_sg_elem {
+	__le64 addr;
+	__le16 len;
+	__le16 rsvd[3];
+};
+
+/**
+ * struct ionic_rxq_sg_desc - Receive scatter-gather (SG) list
+ * @elems:     Scatter-gather elements
+ */
 struct ionic_rxq_sg_desc {
-	struct ionic_rxq_sg_elem {
-		__le64 addr;
-		__le16 len;
-		__le16 rsvd[3];
-	} elems[IONIC_RX_MAX_SG_ELEMS];
+#define IONIC_RX_MAX_SG_ELEMS		8
+#define IONIC_RX_SG_DESC_STRIDE		8
+	struct ionic_rxq_sg_elem elems[IONIC_RX_SG_DESC_STRIDE];
 };
 
 /**
  * struct ionic_rxq_comp - Ethernet receive queue completion descriptor
- * @status:       The status of the command (enum status_code)
+ * @status:       Status of the command (enum ionic_status_code)
  * @num_sg_elems: Number of SG elements used by this descriptor
- * @comp_index:   The index in the descriptor ring for which this
- *                is the completion.
+ * @comp_index:   Index in the descriptor ring for which this is the completion
  * @rss_hash:     32-bit RSS hash
- * @csum:         16-bit sum of the packet's L2 payload.
+ * @csum:         16-bit sum of the packet's L2 payload
  *                If the packet's L2 payload is odd length, an extra
  *                zero-value byte is included in the @csum calculation but
  *                not included in @len.
@@ -821,33 +920,51 @@ struct ionic_rxq_sg_desc {
  *                set.  Includes .1p and .1q tags.
  * @len:          Received packet length, in bytes.  Excludes FCS.
  * @csum_calc     L2 payload checksum is computed or not
- * @csum_tcp_ok:  The TCP checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                TCP header
- * @csum_tcp_bad: The TCP checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                TCP header.
- * @csum_udp_ok:  The UDP checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                UDP header
- * @csum_udp_bad: The UDP checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                UDP header.
- * @csum_ip_ok:   The IPv4 checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                first IPv4 header.  If the receive packet
- *                contains both a tunnel IPv4 header and a
- *                transport IPv4 header, the device validates the
- *                checksum for the both IPv4 headers.
- * @csum_ip_bad:  The IPv4 checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                first IPv4 header. If the receive packet
- *                contains both a tunnel IPv4 header and a
- *                transport IPv4 header, the device validates the
- *                checksum for both IP headers.
- * @VLAN:         VLAN header was stripped and placed in @vlan_tci.
- * @pkt_type:     Packet type
- * @color:        Color bit.
+ * @csum_flags:   See IONIC_RXQ_COMP_CSUM_F_*:
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_TCP_OK:
+ *                    The TCP checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    TCP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_TCP_BAD:
+ *                    The TCP checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    TCP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_UDP_OK:
+ *                    The UDP checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    UDP header
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_UDP_BAD:
+ *                    The UDP checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    UDP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_IP_OK:
+ *                    The IPv4 checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    first IPv4 header.  If the receive packet
+ *                    contains both a tunnel IPv4 header and a
+ *                    transport IPv4 header, the device validates the
+ *                    checksum for the both IPv4 headers.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_IP_BAD:
+ *                    The IPv4 checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    first IPv4 header. If the receive packet
+ *                    contains both a tunnel IPv4 header and a
+ *                    transport IPv4 header, the device validates the
+ *                    checksum for both IP headers.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_VLAN:
+ *                    The VLAN header was stripped and placed in @vlan_tci.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_CALC:
+ *                    The checksum was calculated by the device.
+ *
+ * @pkt_type_color: Packet type and color bit; see IONIC_RXQ_COMP_PKT_TYPE_MASK
  */
 struct ionic_rxq_comp {
 	u8     status;
@@ -871,13 +988,21 @@ struct ionic_rxq_comp {
 };
 
 enum ionic_pkt_type {
-	IONIC_PKT_TYPE_NON_IP     = 0x000,
-	IONIC_PKT_TYPE_IPV4       = 0x001,
-	IONIC_PKT_TYPE_IPV4_TCP   = 0x003,
-	IONIC_PKT_TYPE_IPV4_UDP   = 0x005,
-	IONIC_PKT_TYPE_IPV6       = 0x008,
-	IONIC_PKT_TYPE_IPV6_TCP   = 0x018,
-	IONIC_PKT_TYPE_IPV6_UDP   = 0x028,
+	IONIC_PKT_TYPE_NON_IP		= 0x00,
+	IONIC_PKT_TYPE_IPV4		= 0x01,
+	IONIC_PKT_TYPE_IPV4_TCP		= 0x03,
+	IONIC_PKT_TYPE_IPV4_UDP		= 0x05,
+	IONIC_PKT_TYPE_IPV6		= 0x08,
+	IONIC_PKT_TYPE_IPV6_TCP		= 0x18,
+	IONIC_PKT_TYPE_IPV6_UDP		= 0x28,
+	/* below types are only used if encap offloads are enabled on lif */
+	IONIC_PKT_TYPE_ENCAP_NON_IP	= 0x40,
+	IONIC_PKT_TYPE_ENCAP_IPV4	= 0x41,
+	IONIC_PKT_TYPE_ENCAP_IPV4_TCP	= 0x43,
+	IONIC_PKT_TYPE_ENCAP_IPV4_UDP	= 0x45,
+	IONIC_PKT_TYPE_ENCAP_IPV6	= 0x48,
+	IONIC_PKT_TYPE_ENCAP_IPV6_TCP	= 0x58,
+	IONIC_PKT_TYPE_ENCAP_IPV6_UDP	= 0x68,
 };
 
 enum ionic_eth_hw_features {
@@ -894,10 +1019,13 @@ enum ionic_eth_hw_features {
 	IONIC_ETH_HW_TSO_ECN		= BIT(10),
 	IONIC_ETH_HW_TSO_GRE		= BIT(11),
 	IONIC_ETH_HW_TSO_GRE_CSUM	= BIT(12),
-	IONIC_ETH_HW_TSO_IPXIP4	= BIT(13),
-	IONIC_ETH_HW_TSO_IPXIP6	= BIT(14),
+	IONIC_ETH_HW_TSO_IPXIP4		= BIT(13),
+	IONIC_ETH_HW_TSO_IPXIP6		= BIT(14),
 	IONIC_ETH_HW_TSO_UDP		= BIT(15),
 	IONIC_ETH_HW_TSO_UDP_CSUM	= BIT(16),
+	IONIC_ETH_HW_RX_CSUM_GENEVE	= BIT(17),
+	IONIC_ETH_HW_TX_CSUM_GENEVE	= BIT(18),
+	IONIC_ETH_HW_TSO_GENEVE		= BIT(19)
 };
 
 /**
@@ -906,7 +1034,7 @@ enum ionic_eth_hw_features {
  * @type:       Queue type
  * @lif_index:  LIF index
  * @index:      Queue index
- * @oper:       Operation (enum q_control_oper)
+ * @oper:       Operation (enum ionic_q_control_oper)
  */
 struct ionic_q_control_cmd {
 	u8     opcode;
@@ -919,14 +1047,17 @@ struct ionic_q_control_cmd {
 
 typedef struct ionic_admin_comp ionic_q_control_comp;
 
-enum q_control_oper {
+enum ionic_q_control_oper {
 	IONIC_Q_DISABLE		= 0,
 	IONIC_Q_ENABLE		= 1,
 	IONIC_Q_HANG_RESET	= 2,
 };
 
 /**
- * Physical connection type
+ * enum ionic_phy_type - Physical connection type
+ * @IONIC_PHY_TYPE_NONE:    No PHY installed
+ * @IONIC_PHY_TYPE_COPPER:  Copper PHY
+ * @IONIC_PHY_TYPE_FIBER:   Fiber PHY
  */
 enum ionic_phy_type {
 	IONIC_PHY_TYPE_NONE	= 0,
@@ -935,18 +1066,23 @@ enum ionic_phy_type {
 };
 
 /**
- * Transceiver status
+ * enum ionic_xcvr_state - Transceiver status
+ * @IONIC_XCVR_STATE_REMOVED:        Transceiver removed
+ * @IONIC_XCVR_STATE_INSERTED:       Transceiver inserted
+ * @IONIC_XCVR_STATE_PENDING:        Transceiver pending
+ * @IONIC_XCVR_STATE_SPROM_READ:     Transceiver data read
+ * @IONIC_XCVR_STATE_SPROM_READ_ERR: Transceiver data read error
  */
 enum ionic_xcvr_state {
 	IONIC_XCVR_STATE_REMOVED	 = 0,
 	IONIC_XCVR_STATE_INSERTED	 = 1,
 	IONIC_XCVR_STATE_PENDING	 = 2,
 	IONIC_XCVR_STATE_SPROM_READ	 = 3,
-	IONIC_XCVR_STATE_SPROM_READ_ERR  = 4,
+	IONIC_XCVR_STATE_SPROM_READ_ERR	 = 4,
 };
 
 /**
- * Supported link modes
+ * enum ionic_xcvr_pid - Supported link modes
  */
 enum ionic_xcvr_pid {
 	IONIC_XCVR_PID_UNKNOWN           = 0,
@@ -980,67 +1116,74 @@ enum ionic_xcvr_pid {
 	IONIC_XCVR_PID_SFP_10GBASE_CU   = 68,
 	IONIC_XCVR_PID_QSFP_100G_CWDM4  = 69,
 	IONIC_XCVR_PID_QSFP_100G_PSM4   = 70,
+	IONIC_XCVR_PID_SFP_25GBASE_ACC  = 71,
 };
 
 /**
- * Port types
- */
-enum ionic_port_type {
-	IONIC_PORT_TYPE_NONE = 0,  /* port type not configured */
-	IONIC_PORT_TYPE_ETH  = 1,  /* port carries ethernet traffic (inband) */
-	IONIC_PORT_TYPE_MGMT = 2,  /* port carries mgmt traffic (out-of-band) */
-};
-
-/**
- * Port config state
+ * enum ionic_port_admin_state - Port config state
+ * @IONIC_PORT_ADMIN_STATE_NONE:    Port admin state not configured
+ * @IONIC_PORT_ADMIN_STATE_DOWN:    Port admin disabled
+ * @IONIC_PORT_ADMIN_STATE_UP:      Port admin enabled
  */
 enum ionic_port_admin_state {
-	IONIC_PORT_ADMIN_STATE_NONE = 0,   /* port admin state not configured */
-	IONIC_PORT_ADMIN_STATE_DOWN = 1,   /* port is admin disabled */
-	IONIC_PORT_ADMIN_STATE_UP   = 2,   /* port is admin enabled */
+	IONIC_PORT_ADMIN_STATE_NONE = 0,
+	IONIC_PORT_ADMIN_STATE_DOWN = 1,
+	IONIC_PORT_ADMIN_STATE_UP   = 2,
 };
 
 /**
- * Port operational status
+ * enum ionic_port_oper_status - Port operational status
+ * @IONIC_PORT_OPER_STATUS_NONE:    Port disabled
+ * @IONIC_PORT_OPER_STATUS_UP:      Port link status up
+ * @IONIC_PORT_OPER_STATUS_DOWN:    Port link status down
  */
 enum ionic_port_oper_status {
-	IONIC_PORT_OPER_STATUS_NONE  = 0,	/* port is disabled */
-	IONIC_PORT_OPER_STATUS_UP    = 1,	/* port is linked up */
-	IONIC_PORT_OPER_STATUS_DOWN  = 2,	/* port link status is down */
+	IONIC_PORT_OPER_STATUS_NONE  = 0,
+	IONIC_PORT_OPER_STATUS_UP    = 1,
+	IONIC_PORT_OPER_STATUS_DOWN  = 2,
 };
 
 /**
- * Ethernet Forward error correction (fec) modes
+ * enum ionic_port_fec_type - Ethernet Forward error correction (FEC) modes
+ * @IONIC_PORT_FEC_TYPE_NONE:       FEC Disabled
+ * @IONIC_PORT_FEC_TYPE_FC:         FireCode FEC
+ * @IONIC_PORT_FEC_TYPE_RS:         ReedSolomon FEC
  */
 enum ionic_port_fec_type {
-	IONIC_PORT_FEC_TYPE_NONE = 0,		/* Disabled */
-	IONIC_PORT_FEC_TYPE_FC   = 1,		/* FireCode */
-	IONIC_PORT_FEC_TYPE_RS   = 2,		/* ReedSolomon */
+	IONIC_PORT_FEC_TYPE_NONE = 0,
+	IONIC_PORT_FEC_TYPE_FC   = 1,
+	IONIC_PORT_FEC_TYPE_RS   = 2,
 };
 
 /**
- * Ethernet pause (flow control) modes
+ * enum ionic_port_pause_type - Ethernet pause (flow control) modes
+ * @IONIC_PORT_PAUSE_TYPE_NONE:     Disable Pause
+ * @IONIC_PORT_PAUSE_TYPE_LINK:     Link level pause
+ * @IONIC_PORT_PAUSE_TYPE_PFC:      Priority-Flow Control
  */
 enum ionic_port_pause_type {
-	IONIC_PORT_PAUSE_TYPE_NONE = 0,	/* Disable Pause */
-	IONIC_PORT_PAUSE_TYPE_LINK = 1,	/* Link level pause */
-	IONIC_PORT_PAUSE_TYPE_PFC  = 2,	/* Priority-Flow control */
+	IONIC_PORT_PAUSE_TYPE_NONE = 0,
+	IONIC_PORT_PAUSE_TYPE_LINK = 1,
+	IONIC_PORT_PAUSE_TYPE_PFC  = 2,
 };
 
 /**
- * Loopback modes
+ * enum ionic_port_loopback_mode - Loopback modes
+ * @IONIC_PORT_LOOPBACK_MODE_NONE:  Disable loopback
+ * @IONIC_PORT_LOOPBACK_MODE_MAC:   MAC loopback
+ * @IONIC_PORT_LOOPBACK_MODE_PHY:   PHY/SerDes loopback
  */
 enum ionic_port_loopback_mode {
-	IONIC_PORT_LOOPBACK_MODE_NONE = 0,	/* Disable loopback */
-	IONIC_PORT_LOOPBACK_MODE_MAC  = 1,	/* MAC loopback */
-	IONIC_PORT_LOOPBACK_MODE_PHY  = 2,	/* PHY/Serdes loopback */
+	IONIC_PORT_LOOPBACK_MODE_NONE = 0,
+	IONIC_PORT_LOOPBACK_MODE_MAC  = 1,
+	IONIC_PORT_LOOPBACK_MODE_PHY  = 2,
 };
 
 /**
- * Transceiver Status information
+ * struct ionic_xcvr_status - Transceiver Status information
  * @state:    Transceiver status (enum ionic_xcvr_state)
  * @phy:      Physical connection type (enum ionic_phy_type)
- * @pid:      Transceiver link mode (enum pid)
+ * @pid:      Transceiver link mode (enum ionic_xcvr_pid)
  * @sprom:    Transceiver sprom contents
  */
 struct ionic_xcvr_status {
@@ -1051,10 +1194,10 @@ struct ionic_xcvr_status {
 };
 
 /**
- * Port configuration
+ * union ionic_port_config - Port configuration
  * @speed:              port speed (in Mbps)
  * @mtu:                mtu
- * @state:              port admin state (enum port_admin_state)
+ * @state:              port admin state (enum ionic_port_admin_state)
  * @an_enable:          autoneg enable
  * @fec_type:           fec type (enum ionic_port_fec_type)
  * @pause_type:         pause type (enum ionic_port_pause_type)
@@ -1084,19 +1227,23 @@ union ionic_port_config {
 };
 
 /**
- * Port Status information
+ * struct ionic_port_status - Port Status information
  * @status:             link status (enum ionic_port_oper_status)
  * @id:                 port id
  * @speed:              link speed (in Mbps)
+ * @link_down_count:    number of times link went from up to down
+ * @fec_type:           fec type (enum ionic_port_fec_type)
  * @xcvr:               transceiver status
  */
 struct ionic_port_status {
 	__le32 id;
 	__le32 speed;
 	u8     status;
-	u8     rsvd[51];
+	__le16 link_down_count;
+	u8     fec_type;
+	u8     rsvd[48];
 	struct ionic_xcvr_status  xcvr;
-};
+} __rte_packed;
 
 /**
  * struct ionic_port_identify_cmd - Port identify command
@@ -1113,7 +1260,7 @@ struct ionic_port_identify_cmd {
 
 /**
  * struct ionic_port_identify_comp - Port identify command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_port_identify_comp {
@@ -1138,7 +1285,7 @@ struct ionic_port_init_cmd {
 
 /**
  * struct ionic_port_init_comp - Port initialization command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_port_init_comp {
 	u8 status;
@@ -1158,7 +1305,7 @@ struct ionic_port_reset_cmd {
 
 /**
  * struct ionic_port_reset_comp - Port reset command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_port_reset_comp {
 	u8 status;
@@ -1166,15 +1313,23 @@ struct ionic_port_reset_comp {
 };
 
 /**
- * enum stats_ctl_cmd - List of commands for stats control
+ * enum ionic_stats_ctl_cmd - List of commands for stats control
+ * @IONIC_STATS_CTL_RESET:      Reset statistics
  */
 enum ionic_stats_ctl_cmd {
 	IONIC_STATS_CTL_RESET		= 0,
 };
 
-
 /**
  * enum ionic_port_attr - List of device attributes
+ * @IONIC_PORT_ATTR_STATE:      Port state attribute
+ * @IONIC_PORT_ATTR_SPEED:      Port speed attribute
+ * @IONIC_PORT_ATTR_MTU:        Port MTU attribute
+ * @IONIC_PORT_ATTR_AUTONEG:    Port autonegotiation attribute
+ * @IONIC_PORT_ATTR_FEC:        Port FEC attribute
+ * @IONIC_PORT_ATTR_PAUSE:      Port pause attribute
+ * @IONIC_PORT_ATTR_LOOPBACK:   Port loopback attribute
+ * @IONIC_PORT_ATTR_STATS_CTRL: Port statistics control attribute
  */
 enum ionic_port_attr {
 	IONIC_PORT_ATTR_STATE		= 0,
@@ -1189,9 +1344,17 @@ enum ionic_port_attr {
 
 /**
  * struct ionic_port_setattr_cmd - Set port attributes on the NIC
- * @opcode:     Opcode
- * @index:      port index
- * @attr:       Attribute type (enum ionic_port_attr)
+ * @opcode:         Opcode
+ * @index:          Port index
+ * @attr:           Attribute type (enum ionic_port_attr)
+ * @state:          Port state
+ * @speed:          Port speed
+ * @mtu:            Port MTU
+ * @an_enable:      Port autonegotiation setting
+ * @fec_type:       Port FEC type setting
+ * @pause_type:     Port pause type setting
+ * @loopback_mode:  Port loopback mode
+ * @stats_ctl:      Port stats setting
  */
 struct ionic_port_setattr_cmd {
 	u8     opcode;
@@ -1206,14 +1369,14 @@ struct ionic_port_setattr_cmd {
 		u8      fec_type;
 		u8      pause_type;
 		u8      loopback_mode;
-		u8	stats_ctl;
+		u8      stats_ctl;
 		u8      rsvd2[60];
 	};
 };
 
 /**
  * struct ionic_port_setattr_comp - Port set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @color:      Color bit
  */
 struct ionic_port_setattr_comp {
@@ -1237,8 +1400,15 @@ struct ionic_port_getattr_cmd {
 
 /**
  * struct ionic_port_getattr_comp - Port get attr command completion
- * @status:     The status of the command (enum status_code)
- * @color:      Color bit
+ * @status:         Status of the command (enum ionic_status_code)
+ * @state:          Port state
+ * @speed:          Port speed
+ * @mtu:            Port MTU
+ * @an_enable:      Port autonegotiation setting
+ * @fec_type:       Port FEC type setting
+ * @pause_type:     Port pause type setting
+ * @loopback_mode:  Port loopback mode
+ * @color:          Color bit
  */
 struct ionic_port_getattr_comp {
 	u8     status;
@@ -1252,17 +1422,17 @@ struct ionic_port_getattr_comp {
 		u8      pause_type;
 		u8      loopback_mode;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
 /**
- * struct ionic_lif_status - Lif status register
+ * struct ionic_lif_status - LIF status register
  * @eid:             most recent NotifyQ event id
- * @port_num:        port the lif is connected to
+ * @port_num:        port the LIF is connected to
  * @link_status:     port status (enum ionic_port_oper_status)
  * @link_speed:      speed of link in Mbps
- * @link_down_count: number of times link status changes
+ * @link_down_count: number of times link went from up to down
  */
 struct ionic_lif_status {
 	__le64 eid;
@@ -1296,6 +1466,9 @@ enum ionic_dev_state {
 
 /**
  * enum ionic_dev_attr - List of device attributes
+ * @IONIC_DEV_ATTR_STATE:     Device state attribute
+ * @IONIC_DEV_ATTR_NAME:      Device name attribute
+ * @IONIC_DEV_ATTR_FEATURES:  Device feature attributes
  */
 enum ionic_dev_attr {
 	IONIC_DEV_ATTR_STATE    = 0,
@@ -1320,12 +1493,12 @@ struct ionic_dev_setattr_cmd {
 		char    name[IONIC_IFNAMSIZ];
 		__le64  features;
 		u8      rsvd2[60];
-	};
+	} __rte_packed;
 };
 
 /**
  * struct ionic_dev_setattr_comp - Device set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @features:   Device features
  * @color:      Color bit
  */
@@ -1335,7 +1508,7 @@ struct ionic_dev_setattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1352,7 +1525,7 @@ struct ionic_dev_getattr_cmd {
 
 /**
  * struct ionic_dev_setattr_comp - Device set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @features:   Device features
  * @color:      Color bit
  */
@@ -1362,7 +1535,7 @@ struct ionic_dev_getattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1382,6 +1555,13 @@ enum ionic_rss_hash_types {
 
 /**
  * enum ionic_lif_attr - List of LIF attributes
+ * @IONIC_LIF_ATTR_STATE:       LIF state attribute
+ * @IONIC_LIF_ATTR_NAME:        LIF name attribute
+ * @IONIC_LIF_ATTR_MTU:         LIF MTU attribute
+ * @IONIC_LIF_ATTR_MAC:         LIF MAC attribute
+ * @IONIC_LIF_ATTR_FEATURES:    LIF features attribute
+ * @IONIC_LIF_ATTR_RSS:         LIF RSS attribute
+ * @IONIC_LIF_ATTR_STATS_CTRL:  LIF statistics control attribute
  */
 enum ionic_lif_attr {
 	IONIC_LIF_ATTR_STATE        = 0,
@@ -1396,18 +1576,18 @@ enum ionic_lif_attr {
 /**
  * struct ionic_lif_setattr_cmd - Set LIF attributes on the NIC
  * @opcode:     Opcode
- * @type:       Attribute type (enum ionic_lif_attr)
+ * @attr:       Attribute type (enum ionic_lif_attr)
  * @index:      LIF index
- * @state:      lif state (enum lif_state)
+ * @state:      LIF state (enum ionic_lif_state)
  * @name:       The netdev name string, 0 terminated
  * @mtu:        Mtu
  * @mac:        Station mac
  * @features:   Features (enum ionic_eth_hw_features)
  * @rss:        RSS properties
- *              @types:     The hash types to enable (see rss_hash_types).
- *              @key:       The hash secret key.
- *              @addr:      Address for the indirection table shared memory.
- * @stats_ctl:  stats control commands (enum stats_ctl_cmd)
+ *              @types:     The hash types to enable (see rss_hash_types)
+ *              @key:       The hash secret key
+ *              @addr:      Address for the indirection table shared memory
+ * @stats_ctl:  stats control commands (enum ionic_stats_ctl_cmd)
  */
 struct ionic_lif_setattr_cmd {
 	u8     opcode;
@@ -1425,16 +1605,15 @@ struct ionic_lif_setattr_cmd {
 			u8     rsvd[6];
 			__le64 addr;
 		} rss;
-		u8	stats_ctl;
+		u8      stats_ctl;
 		u8      rsvd[60];
-	};
+	} __rte_packed;
 };
 
 /**
  * struct ionic_lif_setattr_comp - LIF set attr command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @features:   features (enum ionic_eth_hw_features)
  * @color:      Color bit
  */
@@ -1445,7 +1624,7 @@ struct ionic_lif_setattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1464,10 +1643,9 @@ struct ionic_lif_getattr_cmd {
 
 /**
  * struct ionic_lif_getattr_comp - LIF get attr command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
- * @state:      lif state (enum lif_state)
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @state:      LIF state (enum ionic_lif_state)
  * @name:       The netdev name string, 0 terminated
  * @mtu:        Mtu
  * @mac:        Station mac
@@ -1484,16 +1662,17 @@ struct ionic_lif_getattr_comp {
 		u8      mac[6];
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
 enum ionic_rx_mode {
-	IONIC_RX_MODE_F_UNICAST    = BIT(0),
-	IONIC_RX_MODE_F_MULTICAST  = BIT(1),
-	IONIC_RX_MODE_F_BROADCAST  = BIT(2),
-	IONIC_RX_MODE_F_PROMISC    = BIT(3),
-	IONIC_RX_MODE_F_ALLMULTI   = BIT(4),
+	IONIC_RX_MODE_F_UNICAST		= BIT(0),
+	IONIC_RX_MODE_F_MULTICAST	= BIT(1),
+	IONIC_RX_MODE_F_BROADCAST	= BIT(2),
+	IONIC_RX_MODE_F_PROMISC		= BIT(3),
+	IONIC_RX_MODE_F_ALLMULTI	= BIT(4),
+	IONIC_RX_MODE_F_RDMA_SNIFFER	= BIT(5),
 };
 
 /**
@@ -1501,11 +1680,12 @@ enum ionic_rx_mode {
  * @opcode:     opcode
  * @lif_index:  LIF index
  * @rx_mode:    Rx mode flags:
- *                  IONIC_RX_MODE_F_UNICAST: Accept known unicast packets.
- *                  IONIC_RX_MODE_F_MULTICAST: Accept known multicast packets.
- *                  IONIC_RX_MODE_F_BROADCAST: Accept broadcast packets.
- *                  IONIC_RX_MODE_F_PROMISC: Accept any packets.
- *                  IONIC_RX_MODE_F_ALLMULTI: Accept any multicast packets.
+ *                  IONIC_RX_MODE_F_UNICAST: Accept known unicast packets
+ *                  IONIC_RX_MODE_F_MULTICAST: Accept known multicast packets
+ *                  IONIC_RX_MODE_F_BROADCAST: Accept broadcast packets
+ *                  IONIC_RX_MODE_F_PROMISC: Accept any packets
+ *                  IONIC_RX_MODE_F_ALLMULTI: Accept any multicast packets
+ *                  IONIC_RX_MODE_F_RDMA_SNIFFER: Sniff RDMA packets
  */
 struct ionic_rx_mode_set_cmd {
 	u8     opcode;
@@ -1529,9 +1709,14 @@ enum ionic_rx_filter_match_type {
  * @qtype:      Queue type
  * @lif_index:  LIF index
  * @qid:        Queue ID
- * @match:      Rx filter match type.  (See IONIC_RX_FILTER_MATCH_xxx)
- * @vlan:       VLAN ID
- * @addr:       MAC address (network-byte order)
+ * @match:      Rx filter match type (see IONIC_RX_FILTER_MATCH_xxx)
+ * @vlan:       VLAN filter
+ *              @vlan:  VLAN ID
+ * @mac:        MAC filter
+ *              @addr:  MAC address (network-byte order)
+ * @mac_vlan:   MACVLAN filter
+ *              @vlan:  VLAN ID
+ *              @addr:  MAC address (network-byte order)
  */
 struct ionic_rx_filter_add_cmd {
 	u8     opcode;
@@ -1556,11 +1741,10 @@ struct ionic_rx_filter_add_cmd {
 
 /**
  * struct ionic_rx_filter_add_comp - Add LIF Rx filter command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @filter_id:  Filter ID
- * @color:      Color bit.
+ * @color:      Color bit
  */
 struct ionic_rx_filter_add_comp {
 	u8     status;
@@ -1587,9 +1771,99 @@ struct ionic_rx_filter_del_cmd {
 
 typedef struct ionic_admin_comp ionic_rx_filter_del_comp;
 
+enum ionic_vf_attr {
+	IONIC_VF_ATTR_SPOOFCHK	= 1,
+	IONIC_VF_ATTR_TRUST	= 2,
+	IONIC_VF_ATTR_MAC	= 3,
+	IONIC_VF_ATTR_LINKSTATE	= 4,
+	IONIC_VF_ATTR_VLAN	= 5,
+	IONIC_VF_ATTR_RATE	= 6,
+	IONIC_VF_ATTR_STATSADDR	= 7,
+};
+
+/**
+ * enum ionic_vf_link_status - Virtual Function link status
+ * @IONIC_VF_LINK_STATUS_AUTO:   Use link state of the uplink
+ * @IONIC_VF_LINK_STATUS_UP:     Link always up
+ * @IONIC_VF_LINK_STATUS_DOWN:   Link always down
+ */
+enum ionic_vf_link_status {
+	IONIC_VF_LINK_STATUS_AUTO = 0,
+	IONIC_VF_LINK_STATUS_UP   = 1,
+	IONIC_VF_LINK_STATUS_DOWN = 2,
+};
+
+/**
+ * struct ionic_vf_setattr_cmd - Set VF attributes on the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_vf_attr)
+ * @vf_index:   VF index
+ *	@macaddr:	mac address
+ *	@vlanid:	vlan ID
+ *	@maxrate:	max Tx rate in Mbps
+ *	@spoofchk:	enable address spoof checking
+ *	@trust:		enable VF trust
+ *	@linkstate:	set link up or down
+ *	@stats_pa:	set DMA address for VF stats
+ */
+struct ionic_vf_setattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 vf_index;
+	union {
+		u8     macaddr[6];
+		__le16 vlanid;
+		__le32 maxrate;
+		u8     spoofchk;
+		u8     trust;
+		u8     linkstate;
+		__le64 stats_pa;
+		u8     pad[60];
+	} __rte_packed;
+};
+
+struct ionic_vf_setattr_comp {
+	u8     status;
+	u8     attr;
+	__le16 vf_index;
+	__le16 comp_index;
+	u8     rsvd[9];
+	u8     color;
+};
+
+/**
+ * struct ionic_vf_getattr_cmd - Get VF attributes from the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_vf_attr)
+ * @vf_index:   VF index
+ */
+struct ionic_vf_getattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 vf_index;
+	u8     rsvd[60];
+};
+
+struct ionic_vf_getattr_comp {
+	u8     status;
+	u8     attr;
+	__le16 vf_index;
+	union {
+		u8     macaddr[6];
+		__le16 vlanid;
+		__le32 maxrate;
+		u8     spoofchk;
+		u8     trust;
+		u8     linkstate;
+		__le64 stats_pa;
+		u8     pad[11];
+	} __rte_packed;
+	u8     color;
+};
+
 /**
  * struct ionic_qos_identify_cmd - QoS identify command
- * @opcode:    opcode
+ * @opcode:  opcode
  * @ver:     Highest version of identify supported by driver
  *
  */
@@ -1601,7 +1875,7 @@ struct ionic_qos_identify_cmd {
 
 /**
  * struct ionic_qos_identify_comp - QoS identify command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_qos_identify_comp {
@@ -1610,9 +1884,15 @@ struct ionic_qos_identify_comp {
 	u8 rsvd[14];
 };
 
+#define IONIC_QOS_TC_MAX		8
+#define IONIC_QOS_ALL_TC		0xFF
+/* Capri max supported, should be renamed. */
 #define IONIC_QOS_CLASS_MAX		7
-#define IONIC_QOS_CLASS_NAME_SZ		32
-#define IONIC_QOS_DSCP_MAX_VALUES	64
+#define IONIC_QOS_PCP_MAX		8
+#define IONIC_QOS_CLASS_NAME_SZ	32
+#define IONIC_QOS_DSCP_MAX		64
+#define IONIC_QOS_ALL_PCP		0xFF
+#define IONIC_DSCP_BLOCK_SIZE		8
 
 /**
  * enum ionic_qos_class
@@ -1629,42 +1909,44 @@ enum ionic_qos_class {
 
 /**
  * enum ionic_qos_class_type - Traffic classification criteria
+ * @IONIC_QOS_CLASS_TYPE_NONE:    No QoS
+ * @IONIC_QOS_CLASS_TYPE_PCP:     Dot1Q PCP
+ * @IONIC_QOS_CLASS_TYPE_DSCP:    IP DSCP
  */
 enum ionic_qos_class_type {
 	IONIC_QOS_CLASS_TYPE_NONE	= 0,
-	IONIC_QOS_CLASS_TYPE_PCP	= 1,	/* Dot1Q pcp */
-	IONIC_QOS_CLASS_TYPE_DSCP	= 2,	/* IP dscp */
+	IONIC_QOS_CLASS_TYPE_PCP	= 1,
+	IONIC_QOS_CLASS_TYPE_DSCP	= 2,
 };
 
 /**
- * enum ionic_qos_sched_type - Qos class scheduling type
+ * enum ionic_qos_sched_type - QoS class scheduling type
+ * @IONIC_QOS_SCHED_TYPE_STRICT:  Strict priority
+ * @IONIC_QOS_SCHED_TYPE_DWRR:    Deficit weighted round-robin
  */
 enum ionic_qos_sched_type {
-	/* Strict priority */
 	IONIC_QOS_SCHED_TYPE_STRICT	= 0,
-	/* Deficit weighted round-robin */
 	IONIC_QOS_SCHED_TYPE_DWRR	= 1,
 };
 
 /**
- * union ionic_qos_config - Qos configuration structure
+ * union ionic_qos_config - QoS configuration structure
  * @flags:		Configuration flags
  *	IONIC_QOS_CONFIG_F_ENABLE		enable
- *	IONIC_QOS_CONFIG_F_DROP			drop/nodrop
+ *	IONIC_QOS_CONFIG_F_NO_DROP		drop/nodrop
  *	IONIC_QOS_CONFIG_F_RW_DOT1Q_PCP		enable dot1q pcp rewrite
  *	IONIC_QOS_CONFIG_F_RW_IP_DSCP		enable ip dscp rewrite
- * @sched_type:		Qos class scheduling type (enum ionic_qos_sched_type)
- * @class_type:		Qos class type (enum ionic_qos_class_type)
- * @pause_type:		Qos pause type (enum qos_pause_type)
- * @name:		Qos class name
+ *	IONIC_QOS_CONFIG_F_NON_DISRUPTIVE	Non-disruptive TC update
+ * @sched_type:		QoS class scheduling type (enum ionic_qos_sched_type)
+ * @class_type:		QoS class type (enum ionic_qos_class_type)
+ * @pause_type:		QoS pause type (enum ionic_qos_pause_type)
+ * @name:		QoS class name
  * @mtu:		MTU of the class
- * @pfc_dot1q_pcp:	Pcp value for pause frames (valid iff F_NODROP)
- * @dwrr_weight:	Qos class scheduling weight
+ * @pfc_cos:		Priority-Flow Control class of service
+ * @dwrr_weight:	QoS class scheduling weight
  * @strict_rlmt:	Rate limit for strict priority scheduling
- * @rw_dot1q_pcp:	Rewrite dot1q pcp to this value
- *			(valid iff F_RW_DOT1Q_PCP)
- * @rw_ip_dscp:		Rewrite ip dscp to this value
- *			(valid iff F_RW_IP_DSCP)
+ * @rw_dot1q_pcp:	Rewrite dot1q pcp to value (valid iff F_RW_DOT1Q_PCP)
+ * @rw_ip_dscp:		Rewrite ip dscp to value (valid iff F_RW_IP_DSCP)
  * @dot1q_pcp:		Dot1q pcp value
  * @ndscp:		Number of valid dscp values in the ip_dscp field
  * @ip_dscp:		IP dscp values
@@ -1672,9 +1954,12 @@ enum ionic_qos_sched_type {
 union ionic_qos_config {
 	struct {
 #define IONIC_QOS_CONFIG_F_ENABLE		BIT(0)
-#define IONIC_QOS_CONFIG_F_DROP			BIT(1)
+#define IONIC_QOS_CONFIG_F_NO_DROP		BIT(1)
+/* Used to rewrite PCP or DSCP value. */
 #define IONIC_QOS_CONFIG_F_RW_DOT1Q_PCP		BIT(2)
 #define IONIC_QOS_CONFIG_F_RW_IP_DSCP		BIT(3)
+/* Non-disruptive TC update */
+#define IONIC_QOS_CONFIG_F_NON_DISRUPTIVE	BIT(4)
 		u8      flags;
 		u8      sched_type;
 		u8      class_type;
@@ -1689,6 +1974,7 @@ union ionic_qos_config {
 			__le64  strict_rlmt;
 		};
 		/* marking */
+		/* Used to rewrite PCP or DSCP value. */
 		union {
 			u8      rw_dot1q_pcp;
 			u8      rw_ip_dscp;
@@ -1698,10 +1984,10 @@ union ionic_qos_config {
 			u8      dot1q_pcp;
 			struct {
 				u8      ndscp;
-				u8      ip_dscp[IONIC_QOS_DSCP_MAX_VALUES];
+				u8      ip_dscp[IONIC_QOS_DSCP_MAX];
 			};
 		};
-	};
+	} __rte_packed;
 	__le32  words[64];
 };
 
@@ -1717,15 +2003,15 @@ union ionic_qos_identity {
 		u8     version;
 		u8     type;
 		u8     rsvd[62];
-		union  ionic_qos_config config[IONIC_QOS_CLASS_MAX];
+		union ionic_qos_config config[IONIC_QOS_CLASS_MAX];
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
- * struct qos_init_cmd - QoS config init command
+ * struct ionic_qos_init_cmd - QoS config init command
  * @opcode:	Opcode
- * @group:	Qos class id
+ * @group:	QoS class id
  * @info_pa:	destination address for qos info
  */
 struct ionic_qos_init_cmd {
@@ -1739,8 +2025,9 @@ struct ionic_qos_init_cmd {
 typedef struct ionic_admin_comp ionic_qos_init_comp;
 
 /**
- * struct ionic_qos_reset_cmd - Qos config reset command
+ * struct ionic_qos_reset_cmd - QoS config reset command
  * @opcode:	Opcode
+ * @group:	QoS class id
  */
 struct ionic_qos_reset_cmd {
 	u8    opcode;
@@ -1748,6 +2035,16 @@ struct ionic_qos_reset_cmd {
 	u8    rsvd[62];
 };
 
+/**
+ * struct ionic_qos_clear_port_stats_cmd - Qos config reset command
+ * @opcode:	Opcode
+ */
+struct ionic_qos_clear_stats_cmd {
+	u8    opcode;
+	u8    group_bitmap;
+	u8    rsvd[62];
+};
+
 typedef struct ionic_admin_comp ionic_qos_reset_comp;
 
 /**
@@ -1767,10 +2064,16 @@ struct ionic_fw_download_cmd {
 
 typedef struct ionic_admin_comp ionic_fw_download_comp;
 
+/**
+ * enum ionic_fw_control_oper - FW control operations
+ * @IONIC_FW_RESET:     Reset firmware
+ * @IONIC_FW_INSTALL:   Install firmware
+ * @IONIC_FW_ACTIVATE:  Acticate firmware
+ */
 enum ionic_fw_control_oper {
-	IONIC_FW_RESET		= 0,	/* Reset firmware */
-	IONIC_FW_INSTALL	= 1,	/* Install firmware */
-	IONIC_FW_ACTIVATE	= 2,	/* Activate firmware */
+	IONIC_FW_RESET		= 0,
+	IONIC_FW_INSTALL	= 1,
+	IONIC_FW_ACTIVATE	= 2,
 };
 
 /**
@@ -1789,8 +2092,10 @@ struct ionic_fw_control_cmd {
 
 /**
  * struct ionic_fw_control_comp - Firmware control copletion
- * @opcode:    opcode
- * @slot:      slot where the firmware was installed
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @slot:       Slot where the firmware was installed
+ * @color:      Color bit
  */
 struct ionic_fw_control_comp {
 	u8     status;
@@ -1808,11 +2113,11 @@ struct ionic_fw_control_comp {
 /**
  * struct ionic_rdma_reset_cmd - Reset RDMA LIF cmd
  * @opcode:        opcode
- * @lif_index:     lif index
+ * @lif_index:     LIF index
  *
- * There is no rdma specific dev command completion struct.  Completion uses
+ * There is no RDMA specific dev command completion struct.  Completion uses
  * the common struct ionic_admin_comp.  Only the status is indicated.
- * Nonzero status means the LIF does not support rdma.
+ * Nonzero status means the LIF does not support RDMA.
  **/
 struct ionic_rdma_reset_cmd {
 	u8     opcode;
@@ -1824,30 +2129,29 @@ struct ionic_rdma_reset_cmd {
 /**
  * struct ionic_rdma_queue_cmd - Create RDMA Queue command
  * @opcode:        opcode, 52, 53
- * @lif_index      lif index
- * @qid_ver:       (qid | (rdma version << 24))
+ * @lif_index:     LIF index
+ * @qid_ver:       (qid | (RDMA version << 24))
  * @cid:           intr, eq_id, or cq_id
  * @dbid:          doorbell page id
  * @depth_log2:    log base two of queue depth
  * @stride_log2:   log base two of queue stride
  * @dma_addr:      address of the queue memory
- * @xxx_table_index: temporary, but should not need pgtbl for contig. queues.
  *
- * The same command struct is used to create an rdma event queue, completion
- * queue, or rdma admin queue.  The cid is an interrupt number for an event
+ * The same command struct is used to create an RDMA event queue, completion
+ * queue, or RDMA admin queue.  The cid is an interrupt number for an event
  * queue, an event queue id for a completion queue, or a completion queue id
- * for an rdma admin queue.
+ * for an RDMA admin queue.
  *
  * The queue created via a dev command must be contiguous in dma space.
  *
  * The dev commands are intended only to be used during driver initialization,
- * to create queues supporting the rdma admin queue.  Other queues, and other
- * types of rdma resources like memory regions, will be created and registered
- * via the rdma admin queue, and will support a more complete interface
+ * to create queues supporting the RDMA admin queue.  Other queues, and other
+ * types of RDMA resources like memory regions, will be created and registered
+ * via the RDMA admin queue, and will support a more complete interface
  * providing scatter gather lists for larger, scattered queue buffers and
  * memory registration.
  *
- * There is no rdma specific dev command completion struct.  Completion uses
+ * There is no RDMA specific dev command completion struct.  Completion uses
  * the common struct ionic_admin_comp.  Only the status is indicated.
  **/
 struct ionic_rdma_queue_cmd {
@@ -1860,8 +2164,7 @@ struct ionic_rdma_queue_cmd {
 	u8     depth_log2;
 	u8     stride_log2;
 	__le64 dma_addr;
-	u8     rsvd2[36];
-	__le32 xxx_table_index;
+	u8     rsvd2[40];
 };
 
 /******************************************************************
@@ -1869,7 +2172,7 @@ struct ionic_rdma_queue_cmd {
  ******************************************************************/
 
 /**
- * struct ionic_notifyq_event
+ * struct ionic_notifyq_event - Generic event reporting structure
  * @eid:   event number
  * @ecode: event code
  * @data:  unspecified data about the event
@@ -1884,10 +2187,10 @@ struct ionic_notifyq_event {
 };
 
 /**
- * struct ionic_link_change_event
+ * struct ionic_link_change_event - Link change event notification
  * @eid:		event number
- * @ecode:		event code = EVENT_OPCODE_LINK_CHANGE
- * @link_status:	link up or down, with error bits (enum port_status)
+ * @ecode:		event code = IONIC_EVENT_LINK_CHANGE
+ * @link_status:	link up/down, with error bits (enum ionic_port_status)
  * @link_speed:		speed of the network link
  *
  * Sent when the network link state changes between UP and DOWN
@@ -1901,9 +2204,9 @@ struct ionic_link_change_event {
 };
 
 /**
- * struct ionic_reset_event
+ * struct ionic_reset_event - Reset event notification
  * @eid:		event number
- * @ecode:		event code = EVENT_OPCODE_RESET
+ * @ecode:		event code = IONIC_EVENT_RESET
  * @reset_code:		reset type
  * @state:		0=pending, 1=complete, 2=error
  *
@@ -1919,11 +2222,9 @@ struct ionic_reset_event {
 };
 
 /**
- * struct ionic_heartbeat_event
+ * struct ionic_heartbeat_event - Sent periodically by NIC to indicate health
  * @eid:	event number
- * @ecode:	event code = EVENT_OPCODE_HEARTBEAT
- *
- * Sent periodically by the NIC to indicate continued health
+ * @ecode:	event code = IONIC_EVENT_HEARTBEAT
  */
 struct ionic_heartbeat_event {
 	__le64 eid;
@@ -1932,12 +2233,10 @@ struct ionic_heartbeat_event {
 };
 
 /**
- * struct ionic_log_event
+ * struct ionic_log_event - Sent to notify the driver of an internal error
  * @eid:	event number
- * @ecode:	event code = EVENT_OPCODE_LOG
+ * @ecode:	event code = IONIC_EVENT_LOG
  * @data:	log data
- *
- * Sent to notify the driver of an internal error.
  */
 struct ionic_log_event {
 	__le64 eid;
@@ -1946,7 +2245,18 @@ struct ionic_log_event {
 };
 
 /**
- * struct ionic_port_stats
+ * struct ionic_xcvr_event - Transceiver change event
+ * @eid:	event number
+ * @ecode:	event code = IONIC_EVENT_XCVR
+ */
+struct ionic_xcvr_event {
+	__le64 eid;
+	__le16 ecode;
+	u8     rsvd[54];
+};
+
+/**
+ * struct ionic_port_stats - Port statistics structure
  */
 struct ionic_port_stats {
 	__le64 frames_rx_ok;
@@ -2051,34 +2361,109 @@ struct ionic_mgmt_port_stats {
 	__le64 frames_rx_multicast;
 	__le64 frames_rx_broadcast;
 	__le64 frames_rx_pause;
-	__le64 frames_rx_bad_length0;
-	__le64 frames_rx_undersized1;
-	__le64 frames_rx_oversized2;
-	__le64 frames_rx_fragments3;
-	__le64 frames_rx_jabber4;
-	__le64 frames_rx_64b5;
-	__le64 frames_rx_65b_127b6;
-	__le64 frames_rx_128b_255b7;
-	__le64 frames_rx_256b_511b8;
-	__le64 frames_rx_512b_1023b9;
-	__le64 frames_rx_1024b_1518b0;
-	__le64 frames_rx_gt_1518b1;
-	__le64 frames_rx_fifo_full2;
-	__le64 frames_tx_ok3;
-	__le64 frames_tx_all4;
-	__le64 frames_tx_bad5;
-	__le64 octets_tx_ok6;
-	__le64 octets_tx_total7;
-	__le64 frames_tx_unicast8;
-	__le64 frames_tx_multicast9;
-	__le64 frames_tx_broadcast0;
-	__le64 frames_tx_pause1;
+	__le64 frames_rx_bad_length;
+	__le64 frames_rx_undersized;
+	__le64 frames_rx_oversized;
+	__le64 frames_rx_fragments;
+	__le64 frames_rx_jabber;
+	__le64 frames_rx_64b;
+	__le64 frames_rx_65b_127b;
+	__le64 frames_rx_128b_255b;
+	__le64 frames_rx_256b_511b;
+	__le64 frames_rx_512b_1023b;
+	__le64 frames_rx_1024b_1518b;
+	__le64 frames_rx_gt_1518b;
+	__le64 frames_rx_fifo_full;
+	__le64 frames_tx_ok;
+	__le64 frames_tx_all;
+	__le64 frames_tx_bad;
+	__le64 octets_tx_ok;
+	__le64 octets_tx_total;
+	__le64 frames_tx_unicast;
+	__le64 frames_tx_multicast;
+	__le64 frames_tx_broadcast;
+	__le64 frames_tx_pause;
+};
+
+enum ionic_pb_buffer_drop_stats {
+	IONIC_BUFFER_INTRINSIC_DROP = 0,
+	IONIC_BUFFER_DISCARDED,
+	IONIC_BUFFER_ADMITTED,
+	IONIC_BUFFER_OUT_OF_CELLS_DROP,
+	IONIC_BUFFER_OUT_OF_CELLS_DROP_2,
+	IONIC_BUFFER_OUT_OF_CREDIT_DROP,
+	IONIC_BUFFER_TRUNCATION_DROP,
+	IONIC_BUFFER_PORT_DISABLED_DROP,
+	IONIC_BUFFER_COPY_TO_CPU_TAIL_DROP,
+	IONIC_BUFFER_SPAN_TAIL_DROP,
+	IONIC_BUFFER_MIN_SIZE_VIOLATION_DROP,
+	IONIC_BUFFER_ENQUEUE_ERROR_DROP,
+	IONIC_BUFFER_INVALID_PORT_DROP,
+	IONIC_BUFFER_INVALID_OUTPUT_QUEUE_DROP,
+	IONIC_BUFFER_DROP_MAX,
+};
+
+enum ionic_oflow_drop_stats {
+	IONIC_OFLOW_OCCUPANCY_DROP,
+	IONIC_OFLOW_EMERGENCY_STOP_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_ACK_FILL_UP_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_ACK_FULL_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_FULL_DROP,
+	IONIC_OFLOW_CONTROL_FIFO_FULL_DROP,
+	IONIC_OFLOW_DROP_MAX,
+};
+
+/**
+ * struct port_pb_stats - packet buffers system stats
+ * uses ionic_pb_buffer_drop_stats for drop_counts[]
+ */
+struct ionic_port_pb_stats {
+	__le64 sop_count_in;
+	__le64 eop_count_in;
+	__le64 sop_count_out;
+	__le64 eop_count_out;
+	__le64 drop_counts[IONIC_BUFFER_DROP_MAX];
+	__le64 input_queue_buffer_occupancy[IONIC_QOS_TC_MAX];
+	__le64 input_queue_port_monitor[IONIC_QOS_TC_MAX];
+	__le64 output_queue_port_monitor[IONIC_QOS_TC_MAX];
+	__le64 oflow_drop_counts[IONIC_OFLOW_DROP_MAX];
+	__le64 input_queue_good_pkts_in[IONIC_QOS_TC_MAX];
+	__le64 input_queue_good_pkts_out[IONIC_QOS_TC_MAX];
+	__le64 input_queue_err_pkts_in[IONIC_QOS_TC_MAX];
+	__le64 input_queue_fifo_depth[IONIC_QOS_TC_MAX];
+	__le64 input_queue_max_fifo_depth[IONIC_QOS_TC_MAX];
+	__le64 input_queue_peak_occupancy[IONIC_QOS_TC_MAX];
+	__le64 output_queue_buffer_occupancy[IONIC_QOS_TC_MAX];
+};
+
+/**
+ * enum ionic_port_type - Port types
+ * @IONIC_ETH_UNKNOWN:             Port type not configured
+ * @IONIC_ETH_HOST:                Port carries ethernet traffic (inband)
+ * @IONIC_ETH_HOST_MGMT:           Port carries mgmt traffic (out-of-band)
+ * @IONIC_ETH_MNIC_OOB_MGMT:
+ * @IONIC_ETH_MNIC_INTERNAL_MGMT:
+ * @IONIC_ETH_MNIC_INBAND_MGMT:
+ * @IONIC_ETH_MNIC_CPU:
+ * @IONIC_ETH_MNIC_LEARN:
+ * @IONIC_ETH_MNIC_CONTROL:
+ */
+enum ionic_port_type {
+	IONIC_ETH_UNKNOWN,
+	IONIC_ETH_HOST,
+	IONIC_ETH_HOST_MGMT,
+	IONIC_ETH_MNIC_OOB_MGMT,
+	IONIC_ETH_MNIC_INTERNAL_MGMT,
+	IONIC_ETH_MNIC_INBAND_MGMT,
+	IONIC_ETH_MNIC_CPU,
+	IONIC_ETH_MNIC_LEARN,
+	IONIC_ETH_MNIC_CONTROL,
 };
 
 /**
  * struct ionic_port_identity - port identity structure
  * @version:        identity structure version
- * @type:           type of port (enum port_type)
+ * @type:           type of port (enum ionic_port_type)
  * @num_lanes:      number of lanes for the port
  * @autoneg:        autoneg supported
  * @min_frame_size: minimum frame size supported
@@ -2104,22 +2489,31 @@ union ionic_port_identity {
 		u8     rsvd2[44];
 		union ionic_port_config config;
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
  * struct ionic_port_info - port info structure
- * @port_status:     port status
- * @port_stats:      port stats
+ * @config:          Port configuration data
+ * @status:          Port status data
+ * @stats:           Port statistics data
+ * @mgmt_stats:      Port management statistics data
+ * @port_pb_drop_stats:   uplink pb drop stats
  */
 struct ionic_port_info {
 	union ionic_port_config config;
 	struct ionic_port_status status;
-	struct ionic_port_stats stats;
+	union {
+		struct ionic_port_stats      stats;
+		struct ionic_mgmt_port_stats mgmt_stats;
+	};
+	/* room for pb_stats to start at 2k offset */
+	u8                          rsvd[760];
+	struct ionic_port_pb_stats  pb_stats;
 };
 
 /**
- * struct ionic_lif_stats
+ * struct ionic_lif_stats - LIF statistics structure
  */
 struct ionic_lif_stats {
 	/* RX */
@@ -2172,7 +2566,7 @@ struct ionic_lif_stats {
 	__le64 tx_queue_error;
 	__le64 tx_desc_fetch_error;
 	__le64 tx_desc_data_error;
-	__le64 rsvd9;
+	__le64 tx_queue_empty;
 	__le64 rsvd10;
 	__le64 rsvd11;
 	__le64 rsvd12;
@@ -2273,7 +2667,10 @@ struct ionic_lif_stats {
 };
 
 /**
- * struct ionic_lif_info - lif info structure
+ * struct ionic_lif_info - LIF info structure
+ * @config:	LIF configuration structure
+ * @status:	LIF status structure
+ * @stats:	LIF statistics structure
  */
 struct ionic_lif_info {
 	union ionic_lif_config config;
@@ -2298,6 +2695,9 @@ union ionic_dev_cmd {
 	struct ionic_port_getattr_cmd port_getattr;
 	struct ionic_port_setattr_cmd port_setattr;
 
+	struct ionic_vf_setattr_cmd vf_setattr;
+	struct ionic_vf_getattr_cmd vf_getattr;
+
 	struct ionic_lif_identify_cmd lif_identify;
 	struct ionic_lif_init_cmd lif_init;
 	struct ionic_lif_reset_cmd lif_reset;
@@ -2305,8 +2705,11 @@ union ionic_dev_cmd {
 	struct ionic_qos_identify_cmd qos_identify;
 	struct ionic_qos_init_cmd qos_init;
 	struct ionic_qos_reset_cmd qos_reset;
+	struct ionic_qos_clear_stats_cmd qos_clear_stats;
 
+	struct ionic_q_identify_cmd q_identify;
 	struct ionic_q_init_cmd q_init;
+	struct ionic_q_control_cmd q_control;
 };
 
 union ionic_dev_cmd_comp {
@@ -2327,6 +2730,9 @@ union ionic_dev_cmd_comp {
 	struct ionic_port_getattr_comp port_getattr;
 	struct ionic_port_setattr_comp port_setattr;
 
+	struct ionic_vf_setattr_comp vf_setattr;
+	struct ionic_vf_getattr_comp vf_getattr;
+
 	struct ionic_lif_identify_comp lif_identify;
 	struct ionic_lif_init_comp lif_init;
 	ionic_lif_reset_comp lif_reset;
@@ -2335,19 +2741,20 @@ union ionic_dev_cmd_comp {
 	ionic_qos_init_comp qos_init;
 	ionic_qos_reset_comp qos_reset;
 
+	struct ionic_q_identify_comp q_identify;
 	struct ionic_q_init_comp q_init;
 };
 
 /**
- * union dev_info - Device info register format (read-only)
- * @signature:       Signature value of 0x44455649 ('DEVI').
- * @version:         Current version of info.
- * @asic_type:       Asic type.
- * @asic_rev:        Asic revision.
- * @fw_status:       Firmware status.
- * @fw_heartbeat:    Firmware heartbeat counter.
- * @serial_num:      Serial number.
- * @fw_version:      Firmware version.
+ * union ionic_dev_info_regs - Device info register format (read-only)
+ * @signature:       Signature value of 0x44455649 ('DEVI')
+ * @version:         Current version of info
+ * @asic_type:       Asic type
+ * @asic_rev:        Asic revision
+ * @fw_status:       Firmware status
+ * @fw_heartbeat:    Firmware heartbeat counter
+ * @serial_num:      Serial number
+ * @fw_version:      Firmware version
  */
 union ionic_dev_info_regs {
 #define IONIC_DEVINFO_FWVERS_BUFLEN 32
@@ -2357,6 +2764,7 @@ union ionic_dev_info_regs {
 		u8     version;
 		u8     asic_type;
 		u8     asic_rev;
+#define IONIC_FW_STS_F_RUNNING	0x1
 		u8     fw_status;
 		u32    fw_heartbeat;
 		char   fw_version[IONIC_DEVINFO_FWVERS_BUFLEN];
@@ -2367,10 +2775,10 @@ union ionic_dev_info_regs {
 
 /**
  * union ionic_dev_cmd_regs - Device command register format (read-write)
- * @doorbell:        Device Cmd Doorbell, write-only.
+ * @doorbell:        Device Cmd Doorbell, write-only
  *                   Write a 1 to signal device to process cmd,
  *                   poll done for completion.
- * @done:            Done indicator, bit 0 == 1 when command is complete.
+ * @done:            Done indicator, bit 0 == 1 when command is complete
  * @cmd:             Opcode-specific command bytes
  * @comp:            Opcode-specific response bytes
  * @data:            Opcode-specific side-data
@@ -2383,12 +2791,12 @@ union ionic_dev_cmd_regs {
 		union ionic_dev_cmd_comp    comp;
 		u8                    rsvd[48];
 		u32                   data[478];
-	};
+	} __rte_packed;
 	u32 words[512];
 };
 
 /**
- * union ionic_dev_regs - Device register format in for bar 0 page 0
+ * union ionic_dev_regs - Device register format for bar 0 page 0
  * @info:            Device info registers
  * @devcmd:          Device command registers
  */
@@ -2396,13 +2804,14 @@ union ionic_dev_regs {
 	struct {
 		union ionic_dev_info_regs info;
 		union ionic_dev_cmd_regs  devcmd;
-	};
+	} __rte_packed;
 	__le32 words[1024];
 };
 
 union ionic_adminq_cmd {
 	struct ionic_admin_cmd cmd;
 	struct ionic_nop_cmd nop;
+	struct ionic_q_identify_cmd q_identify;
 	struct ionic_q_init_cmd q_init;
 	struct ionic_q_control_cmd q_control;
 	struct ionic_lif_setattr_cmd lif_setattr;
@@ -2419,6 +2828,7 @@ union ionic_adminq_cmd {
 union ionic_adminq_comp {
 	struct ionic_admin_comp comp;
 	struct ionic_nop_comp nop;
+	struct ionic_q_identify_comp q_identify;
 	struct ionic_q_init_comp q_init;
 	struct ionic_lif_setattr_comp lif_setattr;
 	struct ionic_lif_getattr_comp lif_getattr;
@@ -2444,14 +2854,14 @@ union ionic_adminq_comp {
 /**
  * struct ionic_doorbell - Doorbell register layout
  * @p_index: Producer index
- * @ring:    Selects the specific ring of the queue to update.
+ * @ring:    Selects the specific ring of the queue to update
  *           Type-specific meaning:
- *              ring=0: Default producer/consumer queue.
+ *              ring=0: Default producer/consumer queue
  *              ring=1: (CQ, EQ) Re-Arm queue.  RDMA CQs
  *              send events to EQs when armed.  EQs send
  *              interrupts when armed.
- * @qid:     The queue id selects the queue destination for the
- *           producer index and flags.
+ * @qid_lo:  Queue destination for the producer index and flags (low bits)
+ * @qid_hi:  Queue destination for the producer index and flags (high bits)
  */
 struct ionic_doorbell {
 	__le16 p_index;
@@ -2461,6 +2871,92 @@ struct ionic_doorbell {
 	u16    rsvd2;
 };
 
+/**
+ * struct ionic_intr_ctrl - Interrupt control register
+ * @coalescing_init:  Coalescing timer initial value, in
+ *                    device units.  Use @identity->intr_coal_mult
+ *                    and @identity->intr_coal_div to convert from
+ *                    usecs to device units:
+ *
+ *                      coal_init = coal_usecs * coal_mutl / coal_div
+ *
+ *                    When an interrupt is sent the interrupt
+ *                    coalescing timer current value
+ *                    (@coalescing_curr) is initialized with this
+ *                    value and begins counting down.  No more
+ *                    interrupts are sent until the coalescing
+ *                    timer reaches 0.  When @coalescing_init=0
+ *                    interrupt coalescing is effectively disabled
+ *                    and every interrupt assert results in an
+ *                    interrupt.  Reset value: 0
+ * @mask:             Interrupt mask.  When @mask=1 the interrupt
+ *                    resource will not send an interrupt.  When
+ *                    @mask=0 the interrupt resource will send an
+ *                    interrupt if an interrupt event is pending
+ *                    or on the next interrupt assertion event.
+ *                    Reset value: 1
+ * @int_credits:      Interrupt credits.  This register indicates
+ *                    how many interrupt events the hardware has
+ *                    sent.  When written by software this
+ *                    register atomically decrements @int_credits
+ *                    by the value written.  When @int_credits
+ *                    becomes 0 then the "pending interrupt" bit
+ *                    in the Interrupt Status register is cleared
+ *                    by the hardware and any pending but unsent
+ *                    interrupts are cleared.
+ *                    !!!IMPORTANT!!! This is a signed register.
+ * @flags:            Interrupt control flags
+ *                       @unmask -- When this bit is written with a 1
+ *                       the interrupt resource will set mask=0.
+ *                       @coal_timer_reset -- When this
+ *                       bit is written with a 1 the
+ *                       @coalescing_curr will be reloaded with
+ *                       @coalescing_init to reset the coalescing
+ *                       timer.
+ * @mask_on_assert:   Automatically mask on assertion.  When
+ *                    @mask_on_assert=1 the interrupt resource
+ *                    will set @mask=1 whenever an interrupt is
+ *                    sent.  When using interrupts in Legacy
+ *                    Interrupt mode the driver must select
+ *                    @mask_on_assert=0 for proper interrupt
+ *                    operation.
+ * @coalescing_curr:  Coalescing timer current value, in
+ *                    microseconds.  When this value reaches 0
+ *                    the interrupt resource is again eligible to
+ *                    send an interrupt.  If an interrupt event
+ *                    is already pending when @coalescing_curr
+ *                    reaches 0 the pending interrupt will be
+ *                    sent, otherwise an interrupt will be sent
+ *                    on the next interrupt assertion event.
+ */
+struct ionic_intr_ctrl {
+	u8 coalescing_init;
+	u8 rsvd[3];
+	u8 mask;
+	u8 rsvd2[3];
+	u16 int_credits;
+	u16 flags;
+#define INTR_F_UNMASK		0x0001
+#define INTR_F_TIMER_RESET	0x0002
+	u8 mask_on_assert;
+	u8 rsvd3[3];
+	u8 coalescing_curr;
+	u8 rsvd4[3];
+	u32 rsvd6[3];
+};
+
+#define IONIC_INTR_CTRL_REGS_MAX	2048
+#define IONIC_INTR_CTRL_COAL_MAX	0x3F
+
+#define intr_to_coal(intr_ctrl)		\
+		((void __iomem *)&(intr_ctrl)->coalescing_init)
+#define intr_to_mask(intr_ctrl)		\
+		((void __iomem *)&(intr_ctrl)->mask)
+#define intr_to_credits(intr_ctrl)	\
+		((void __iomem *)&(intr_ctrl)->int_credits)
+#define intr_to_mask_on_assert(intr_ctrl)\
+		((void __iomem *)&(intr_ctrl)->mask_on_assert)
+
 struct ionic_intr_status {
 	u32 status[2];
 };
@@ -2477,6 +2973,28 @@ union ionic_notifyq_comp {
 	struct ionic_log_event log;
 };
 
+/**
+ * struct ionic_eq_comp - Event queue completion descriptor
+ *
+ * @code:	Event code, see enum ionic_eq_comp_code
+ * @lif_index:	To which LIF the event pertains
+ * @qid:	To which queue id the event pertains
+ * @gen_color:	Event queue wrap counter, init 1, incr each wrap
+ */
+struct ionic_eq_comp {
+	__le16 code;
+	__le16 lif_index;
+	__le32 qid;
+	u8 rsvd[7];
+	u8 gen_color;
+};
+
+enum ionic_eq_comp_code {
+	IONIC_EQ_COMP_CODE_NONE = 0,
+	IONIC_EQ_COMP_CODE_RX_COMP = 1,
+	IONIC_EQ_COMP_CODE_TX_COMP = 2,
+};
+
 /* Deprecate */
 struct ionic_identity {
 	union ionic_drv_identity drv;
@@ -2484,8 +3002,7 @@ struct ionic_identity {
 	union ionic_lif_identity lif;
 	union ionic_port_identity port;
 	union ionic_qos_identity qos;
+	union ionic_q_identity txq;
 };
 
-#pragma pack(pop)
-
 #endif /* _IONIC_IF_H_ */
diff --git a/drivers/net/ionic/ionic_regs.h b/drivers/net/ionic/ionic_regs.h
index 3adc2bc7c..6ebc48d04 100644
--- a/drivers/net/ionic/ionic_regs.h
+++ b/drivers/net/ionic/ionic_regs.h
@@ -21,9 +21,6 @@ struct ionic_intr {
 	uint32_t rsvd[3];
 };
 
-#define IONIC_INTR_CTRL_REGS_MAX	2048
-#define IONIC_INTR_CTRL_COAL_MAX	0x3F
-
 /** enum ionic_intr_mask_vals - valid values for mask and mask_assert.
  * @IONIC_INTR_MASK_CLEAR:	unmask interrupt.
  * @IONIC_INTR_MASK_SET:	mask interrupt.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v4 3/9] net/ionic: update documentation and MAINTAINERS
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
                       ` (2 preceding siblings ...)
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 2/9] net/ionic: update interface file to the latest version Andrew Boyer
@ 2020-12-10  2:07     ` Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 4/9] net/ionic: check for cmd completion more frequently Andrew Boyer
                       ` (5 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:07 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

The UNMAINTAINED flag will be removed in a future patch.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 MAINTAINERS                        |  2 +-
 doc/guides/nics/features/ionic.ini |  1 +
 doc/guides/nics/ionic.rst          | 13 +++++++------
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index eafe9f8c4..7bc0010f2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -841,7 +841,7 @@ F: drivers/net/pfe/
 F: doc/guides/nics/features/pfe.ini
 
 Pensando ionic - UNMAINTAINED
-M: Alfredo Cardigliano <cardigliano@ntop.org>
+M: Andrew Boyer <aboyer@pensando.io>
 F: drivers/net/ionic/
 F: doc/guides/nics/ionic.rst
 F: doc/guides/nics/features/ionic.ini
diff --git a/doc/guides/nics/features/ionic.ini b/doc/guides/nics/features/ionic.ini
index 083c7bd99..5e64aeb46 100644
--- a/doc/guides/nics/features/ionic.ini
+++ b/doc/guides/nics/features/ionic.ini
@@ -19,6 +19,7 @@ Unicast MAC filter   = Y
 RSS hash             = Y
 RSS key update       = Y
 RSS reta update      = Y
+SR-IOV               = Y
 VLAN filter          = Y
 VLAN offload         = Y
 Flow control         = Y
diff --git a/doc/guides/nics/ionic.rst b/doc/guides/nics/ionic.rst
index fd32926bf..31f8aef2c 100644
--- a/doc/guides/nics/ionic.rst
+++ b/doc/guides/nics/ionic.rst
@@ -1,5 +1,5 @@
 ..  SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
-    Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
+    Copyright(c) 2018-2020 Pensando Systems, Inc. All rights reserved.
 
 IONIC Driver
 ============
@@ -7,15 +7,16 @@ IONIC Driver
 The ionic driver provides support for Pensando server adapters.
 It currently supports the below models:
 
-- `Naples DSC-25 <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>`_
-- `Naples DSC-100 <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>`_
+- DSC-25 dual-port 25G Distributed Services Card `(pdf) <https://pensando.io/wp-content/uploads/2020/03/Pensando-DSC-25-Product-Brief.pdf>`_
+- DSC-100 dual-port 100G Distributed Services Card `(pdf) <https://pensando.io/wp-content/uploads/2020/03/Pensando-DSC-100-Product-Brief.pdf>`_
 
-Please visit https://pensando.io for more information.
+Please visit the Pensando web site at https://pensando.io for more information.
+The `Documents <https://pensando.io/documents/>`_ page contains Product Briefs and other product information.
 
 Identifying the Adapter
 -----------------------
 
-To find if one or more Pensando PCI Ethernet devices are installed
+To determine if one or more Pensando DSC Ethernet devices are installed
 on the host, check for the PCI devices:
 
    .. code-block:: console
@@ -28,6 +29,6 @@ on the host, check for the PCI devices:
 Building DPDK
 -------------
 
-The ionic PMD driver supports UIO and VFIO, please refer to the
+The ionic PMD supports UIO and VFIO. Please refer to the
 :ref:`DPDK documentation that comes with the DPDK suite <linux_gsg>`
 for instructions on how to build DPDK.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v4 4/9] net/ionic: check for cmd completion more frequently
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
                       ` (3 preceding siblings ...)
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
@ 2020-12-10  2:07     ` Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 5/9] net/ionic: remove some unused fields Andrew Boyer
                       ` (4 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:07 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer, Neel Patel

This reduces the startup time a bit.

Signed-off-by: Neel Patel <neel@pensando.io>
Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_dev.h   |  4 +++-
 drivers/net/ionic/ionic_main.c  | 36 ++++++++++++++++-----------------
 drivers/net/ionic/ionic_osdep.h | 10 ---------
 3 files changed, 21 insertions(+), 29 deletions(-)

diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index 532255a60..dc64a6d28 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -20,7 +20,9 @@
 
 #define IONIC_LIFS_MAX			1024
 
-#define IONIC_DEVCMD_TIMEOUT	30 /* devcmd_timeout */
+#define IONIC_DEVCMD_TIMEOUT		5	/* devcmd_timeout */
+#define IONIC_DEVCMD_CHECK_PERIOD_US	10	/* devcmd status chk period */
+
 #define	IONIC_ALIGN             4096
 
 struct ionic_adapter;
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index 2ade213d2..f77bddaa4 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -144,12 +144,12 @@ static int
 ionic_wait_ctx_for_completion(struct ionic_lif *lif, struct ionic_qcq *qcq,
 		struct ionic_admin_ctx *ctx, unsigned long max_wait)
 {
-	unsigned long step_msec = 1;
-	unsigned int max_wait_msec = max_wait * 1000;
-	unsigned long elapsed_msec = 0;
+	unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US;
+	unsigned long max_wait_usec = max_wait * 1000000L;
+	unsigned long elapsed_usec = 0;
 	int budget = 8;
 
-	while (ctx->pending_work && elapsed_msec < max_wait_msec) {
+	while (ctx->pending_work && elapsed_usec < max_wait_usec) {
 		/*
 		 * Locking here as adminq is served inline (this could be called
 		 * from multiple places)
@@ -160,8 +160,8 @@ ionic_wait_ctx_for_completion(struct ionic_lif *lif, struct ionic_qcq *qcq,
 
 		rte_spinlock_unlock(&lif->adminq_service_lock);
 
-		msec_delay(step_msec);
-		elapsed_msec += step_msec;
+		rte_delay_us_block(step_usec);
+		elapsed_usec += step_usec;
 	}
 
 	return (!ctx->pending_work);
@@ -195,9 +195,9 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 static int
 ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait)
 {
-	unsigned long step_msec = 100;
-	unsigned int max_wait_msec = max_wait * 1000;
-	unsigned long elapsed_msec = 0;
+	unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US;
+	unsigned long max_wait_usec = max_wait * 1000000L;
+	unsigned long elapsed_usec = 0;
 	int done;
 
 	/* Wait for dev cmd to complete.. but no more than max_wait sec */
@@ -205,20 +205,20 @@ ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait)
 	do {
 		done = ionic_dev_cmd_done(idev);
 		if (done) {
-			IONIC_PRINT(DEBUG, "DEVCMD %d done took %ld msecs",
-				idev->dev_cmd->cmd.cmd.opcode,
-				elapsed_msec);
+			IONIC_PRINT(DEBUG, "DEVCMD %d done took %ld usecs",
+				ioread8(&idev->dev_cmd->cmd.cmd.opcode),
+				elapsed_usec);
 			return 0;
 		}
 
-		msec_delay(step_msec);
+		rte_delay_us_block(step_usec);
 
-		elapsed_msec += step_msec;
-	} while (elapsed_msec < max_wait_msec);
+		elapsed_usec += step_usec;
+	} while (elapsed_usec < max_wait_usec);
 
-	IONIC_PRINT(DEBUG, "DEVCMD %d timeout after %ld msecs",
-		idev->dev_cmd->cmd.cmd.opcode,
-		elapsed_msec);
+	IONIC_PRINT(ERR, "DEVCMD %d timeout after %ld usecs",
+		ioread8(&idev->dev_cmd->cmd.cmd.opcode),
+		elapsed_usec);
 
 	return -ETIMEDOUT;
 }
diff --git a/drivers/net/ionic/ionic_osdep.h b/drivers/net/ionic/ionic_osdep.h
index e04bb8f65..a55d59918 100644
--- a/drivers/net/ionic/ionic_osdep.h
+++ b/drivers/net/ionic/ionic_osdep.h
@@ -20,13 +20,8 @@
 
 #include "ionic_logs.h"
 
-#define DELAY(x) rte_delay_us(x)
-#define usec_delay(x) DELAY(x)
-#define msec_delay(x) DELAY(1000 * (x))
-
 #define BIT(nr)            (1UL << (nr))
 #define BIT_ULL(nr)        (1ULL << (nr))
-#define BITS_TO_LONGS(nr)  div_round_up(nr, 8 * sizeof(long))
 
 #ifndef PAGE_SHIFT
 #define PAGE_SHIFT      12
@@ -44,11 +39,6 @@ typedef uint16_t __le16;
 typedef uint32_t __le32;
 typedef uint64_t __le64;
 
-static inline uint32_t div_round_up(uint32_t n, uint32_t d)
-{
-	return (n + d - 1) / d;
-}
-
 #define ioread8(reg)		rte_read8(reg)
 #define ioread32(reg)		rte_read32(reg)
 #define iowrite8(value, reg)	rte_write8(value, reg)
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v4 5/9] net/ionic: remove some unused fields
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
                       ` (4 preceding siblings ...)
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 4/9] net/ionic: check for cmd completion more frequently Andrew Boyer
@ 2020-12-10  2:07     ` Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 6/9] net/ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
                       ` (3 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:07 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

This conserves resources.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic.h        |  1 -
 drivers/net/ionic/ionic_dev.c    |  5 +----
 drivers/net/ionic/ionic_dev.h    |  7 +------
 drivers/net/ionic/ionic_ethdev.c |  2 --
 drivers/net/ionic/ionic_lif.c    | 22 ++++++----------------
 drivers/net/ionic/ionic_lif.h    |  2 --
 drivers/net/ionic/ionic_regs.h   |  6 ------
 7 files changed, 8 insertions(+), 37 deletions(-)

diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h
index 1538df309..a93110326 100644
--- a/drivers/net/ionic/ionic.h
+++ b/drivers/net/ionic/ionic.h
@@ -59,7 +59,6 @@ struct ionic_adapter {
 	uint32_t link_speed;
 	uint32_t nintrs;
 	bool intrs[IONIC_INTR_CTRL_REGS_MAX];
-	bool is_mgmt_nic;
 	bool link_up;
 	char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN];
 	struct rte_pci_device *pci_dev;
diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c
index 5c2820b7a..fc68f5c74 100644
--- a/drivers/net/ionic/ionic_dev.c
+++ b/drivers/net/ionic/ionic_dev.c
@@ -65,7 +65,6 @@ ionic_dev_setup(struct ionic_adapter *adapter)
 	}
 
 	idev->db_pages = bar->vaddr;
-	idev->phy_db_pages = bar->bus_addr;
 
 	return 0;
 }
@@ -343,7 +342,6 @@ ionic_dev_cmd_adminq_init(struct ionic_dev *idev,
 		.q_init.type = q->type,
 		.q_init.index = q->index,
 		.q_init.flags = IONIC_QINIT_F_ENA,
-		.q_init.pid = q->pid,
 		.q_init.intr_index = intr_index,
 		.q_init.ring_size = rte_log2_u32(q->num_descs),
 		.q_init.ring_base = q->base_pa,
@@ -419,7 +417,7 @@ ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,
 int
 ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	     struct ionic_queue *q, uint32_t index, uint32_t num_descs,
-	     size_t desc_size, size_t sg_desc_size, uint32_t pid)
+	     size_t desc_size, size_t sg_desc_size)
 {
 	uint32_t ring_size;
 
@@ -439,7 +437,6 @@ ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	q->sg_desc_size = sg_desc_size;
 	q->head_idx = 0;
 	q->tail_idx = 0;
-	q->pid = pid;
 
 	return 0;
 }
diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index dc64a6d28..7150f7f2c 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -120,10 +120,7 @@ struct ionic_dev {
 	union ionic_dev_cmd_regs __iomem *dev_cmd;
 
 	struct ionic_doorbell __iomem *db_pages;
-	rte_iova_t phy_db_pages;
-
 	struct ionic_intr __iomem *intr_ctrl;
-
 	struct ionic_intr_status __iomem *intr_status;
 
 	struct ionic_port_info *port_info;
@@ -163,11 +160,9 @@ struct ionic_queue {
 	uint32_t num_descs;
 	uint32_t desc_size;
 	uint32_t sg_desc_size;
-	uint32_t pid;
 	uint32_t qid;
 	uint32_t qtype;
 	struct ionic_doorbell __iomem *db;
-	void *nop_desc;
 };
 
 #define IONIC_INTR_INDEX_NOT_ASSIGNED	(-1)
@@ -257,7 +252,7 @@ uint32_t ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,
 
 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	struct ionic_queue *q, uint32_t index, uint32_t num_descs,
-	size_t desc_size, size_t sg_desc_size, uint32_t pid);
+	size_t desc_size, size_t sg_desc_size);
 void ionic_q_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
 void ionic_q_sg_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
 void ionic_q_flush(struct ionic_queue *q);
diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index 600333e20..cd79f250e 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -1178,8 +1178,6 @@ eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 		goto err_free_adapter;
 	}
 
-	adapter->is_mgmt_nic = (pci_dev->id.device_id == IONIC_DEV_ID_ETH_MGMT);
-
 	adapter->num_bars = 0;
 	for (i = 0; i < PCI_MAX_RESOURCE && i < IONIC_BARS_MAX; i++) {
 		resource = &pci_dev->mem_resource[i];
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 60a5f3d53..bc15d75fd 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -536,8 +536,6 @@ ionic_lif_change_mtu(struct ionic_lif *lif, int new_mtu)
 	if (err)
 		return err;
 
-	lif->mtu = new_mtu;
-
 	return 0;
 }
 
@@ -583,7 +581,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 		uint32_t desc_size,
 		uint32_t cq_desc_size,
 		uint32_t sg_desc_size,
-		uint32_t pid, struct ionic_qcq **qcq)
+		struct ionic_qcq **qcq)
 {
 	struct ionic_dev *idev = &lif->adapter->idev;
 	struct ionic_qcq *new;
@@ -633,7 +631,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 	new->q.type = type;
 
 	err = ionic_q_init(lif, idev, &new->q, index, num_descs,
-		desc_size, sg_desc_size, pid);
+		desc_size, sg_desc_size);
 	if (err) {
 		IONIC_PRINT(ERR, "Queue initialization failed");
 		return err;
@@ -734,7 +732,7 @@ ionic_rx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t nrxq_descs,
 		sizeof(struct ionic_rxq_desc),
 		sizeof(struct ionic_rxq_comp),
 		sizeof(struct ionic_rxq_sg_desc),
-		lif->kern_pid, &lif->rxqcqs[index]);
+		&lif->rxqcqs[index]);
 	if (err)
 		return err;
 
@@ -756,7 +754,7 @@ ionic_tx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t ntxq_descs,
 		sizeof(struct ionic_txq_desc),
 		sizeof(struct ionic_txq_comp),
 		sizeof(struct ionic_txq_sg_desc),
-		lif->kern_pid, &lif->txqcqs[index]);
+		&lif->txqcqs[index]);
 	if (err)
 		return err;
 
@@ -777,7 +775,7 @@ ionic_admin_qcq_alloc(struct ionic_lif *lif)
 		sizeof(struct ionic_admin_cmd),
 		sizeof(struct ionic_admin_comp),
 		0,
-		lif->kern_pid, &lif->adminqcq);
+		&lif->adminqcq);
 	if (err)
 		return err;
 
@@ -798,7 +796,7 @@ ionic_notify_qcq_alloc(struct ionic_lif *lif)
 		sizeof(struct ionic_notifyq_cmd),
 		sizeof(union ionic_notifyq_comp),
 		0,
-		lif->kern_pid, &lif->notifyqcq);
+		&lif->notifyqcq);
 	if (err)
 		return err;
 
@@ -831,8 +829,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
 	rte_spinlock_init(&lif->adminq_lock);
 	rte_spinlock_init(&lif->adminq_service_lock);
 
-	lif->kern_pid = 0;
-
 	dbpage_num = ionic_db_page_num(lif, 0);
 
 	lif->kern_dbpage = ionic_bus_map_dbpage(adapter, dbpage_num);
@@ -1211,13 +1207,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
 			.index = q->index,
 			.flags = (IONIC_QINIT_F_IRQ | IONIC_QINIT_F_ENA),
 			.intr_index = qcq->intr.index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 		}
 	};
 
-	IONIC_PRINT(DEBUG, "notifyq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "notifyq_init.index %d",
 		ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
@@ -1320,7 +1314,6 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 			.index = q->index,
 			.flags = IONIC_QINIT_F_SG,
 			.intr_index = cq->bound_intr->index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 			.cq_ring_base = cq->base_pa,
@@ -1329,7 +1322,6 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "txq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "txq_init.index %d", ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "txq_init.ring_base 0x%" PRIx64 "",
 		ctx.cmd.q_init.ring_base);
@@ -1368,7 +1360,6 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 			.index = q->index,
 			.flags = IONIC_QINIT_F_SG,
 			.intr_index = cq->bound_intr->index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 			.cq_ring_base = cq->base_pa,
@@ -1377,7 +1368,6 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "rxq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "rxq_init.index %d", ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "rxq_init.ring_base 0x%" PRIx64 "",
 		ctx.cmd.q_init.ring_base);
diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 425762d65..4e091719f 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -84,13 +84,11 @@ struct ionic_lif {
 	struct ionic_adapter *adapter;
 	struct rte_eth_dev *eth_dev;
 	uint16_t port_id;  /**< Device port identifier */
-	uint16_t mtu;
 	uint32_t index;
 	uint32_t hw_index;
 	uint32_t state;
 	uint32_t ntxqcqs;
 	uint32_t nrxqcqs;
-	uint32_t kern_pid;
 	rte_spinlock_t adminq_lock;
 	rte_spinlock_t adminq_service_lock;
 	struct ionic_qcq *adminqcq;
diff --git a/drivers/net/ionic/ionic_regs.h b/drivers/net/ionic/ionic_regs.h
index 6ebc48d04..3bdec3424 100644
--- a/drivers/net/ionic/ionic_regs.h
+++ b/drivers/net/ionic/ionic_regs.h
@@ -130,10 +130,4 @@ enum ionic_dbell_bits {
 	IONIC_DBELL_INDEX_MASK		= 0xffff,
 };
 
-static inline void
-ionic_dbell_ring(u64 __iomem *db_page, int qtype, u64 val)
-{
-	writeq(val, &db_page[qtype]);
-}
-
 #endif /* _IONIC_REGS_H_ */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v4 6/9] net/ionic: convert 'deferred' boolean to a flag bit
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
                       ` (5 preceding siblings ...)
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 5/9] net/ionic: remove some unused fields Andrew Boyer
@ 2020-12-10  2:07     ` Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 7/9] net/ionic: warn if loopback mode is requested Andrew Boyer
                       ` (2 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:07 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

This conserves resources.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_lif.c  |  4 ++--
 drivers/net/ionic/ionic_lif.h  |  2 +-
 drivers/net/ionic/ionic_rxtx.c | 10 ++++++----
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index bc15d75fd..2e33fb8d9 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -1590,7 +1590,7 @@ ionic_lif_start(struct ionic_lif *lif)
 
 	for (i = 0; i < lif->nrxqcqs; i++) {
 		struct ionic_qcq *rxq = lif->rxqcqs[i];
-		if (!rxq->deferred_start) {
+		if (!(rxq->flags & IONIC_QCQ_F_DEFERRED)) {
 			err = ionic_dev_rx_queue_start(lif->eth_dev, i);
 
 			if (err)
@@ -1600,7 +1600,7 @@ ionic_lif_start(struct ionic_lif *lif)
 
 	for (i = 0; i < lif->ntxqcqs; i++) {
 		struct ionic_qcq *txq = lif->txqcqs[i];
-		if (!txq->deferred_start) {
+		if (!(txq->flags & IONIC_QCQ_F_DEFERRED)) {
 			err = ionic_dev_tx_queue_start(lif->eth_dev, i);
 
 			if (err)
diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 4e091719f..8e2b42443 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -50,6 +50,7 @@ struct ionic_rx_stats {
 #define IONIC_QCQ_F_SG		BIT(1)
 #define IONIC_QCQ_F_INTR	BIT(2)
 #define IONIC_QCQ_F_NOTIFYQ	BIT(3)
+#define IONIC_QCQ_F_DEFERRED	BIT(4)
 
 /* Queue / Completion Queue */
 struct ionic_qcq {
@@ -68,7 +69,6 @@ struct ionic_qcq {
 	uint32_t total_size;
 	uint32_t flags;
 	struct ionic_intr_info intr;
-	bool deferred_start;
 };
 
 #define IONIC_Q_TO_QCQ(q)	container_of(q, struct ionic_qcq, q)
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index 2592f5cab..b953aff49 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -64,7 +64,7 @@ ionic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
 
 	qinfo->nb_desc = q->num_descs;
 	qinfo->conf.offloads = txq->offloads;
-	qinfo->conf.tx_deferred_start = txq->deferred_start;
+	qinfo->conf.tx_deferred_start = txq->flags & IONIC_QCQ_F_DEFERRED;
 }
 
 static inline void __rte_cold
@@ -196,7 +196,8 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	}
 
 	/* Do not start queue with rte_eth_dev_start() */
-	txq->deferred_start = tx_conf->tx_deferred_start;
+	if (tx_conf->tx_deferred_start)
+		txq->flags |= IONIC_QCQ_F_DEFERRED;
 
 	txq->offloads = offloads;
 
@@ -605,7 +606,7 @@ ionic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
 	qinfo->mp = rxq->mb_pool;
 	qinfo->scattered_rx = dev->data->scattered_rx;
 	qinfo->nb_desc = q->num_descs;
-	qinfo->conf.rx_deferred_start = rxq->deferred_start;
+	qinfo->conf.rx_deferred_start = rxq->flags & IONIC_QCQ_F_DEFERRED;
 	qinfo->conf.offloads = rxq->offloads;
 }
 
@@ -703,7 +704,8 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	 */
 
 	/* Do not start queue with rte_eth_dev_start() */
-	rxq->deferred_start = rx_conf->rx_deferred_start;
+	if (rx_conf->rx_deferred_start)
+		rxq->flags |= IONIC_QCQ_F_DEFERRED;
 
 	rxq->offloads = offloads;
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v4 7/9] net/ionic: warn if loopback mode is requested
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
                       ` (6 preceding siblings ...)
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 6/9] net/ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
@ 2020-12-10  2:07     ` Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 9/9] net/ionic: minor logging fixups Andrew Boyer
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:07 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

The ionic FW does not support loopback mode at this time.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_ethdev.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index cd79f250e..ce6ca9671 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -919,6 +919,9 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
 		return -EINVAL;
 	}
 
+	if (dev_conf->lpbk_mode)
+		IONIC_PRINT(WARNING, "Loopback mode not supported");
+
 	err = ionic_lif_start(lif);
 	if (err) {
 		IONIC_PRINT(ERR, "Cannot start LIF: %d", err);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v4 8/9] net/ionic: minor refactorings and helper variables
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
                       ` (7 preceding siblings ...)
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 7/9] net/ionic: warn if loopback mode is requested Andrew Boyer
@ 2020-12-10  2:07     ` Andrew Boyer
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 9/9] net/ionic: minor logging fixups Andrew Boyer
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:07 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

This makes the code clearer and conserves resources.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_lif.c  | 15 ++++++++++-----
 drivers/net/ionic/ionic_main.c | 18 +++++++-----------
 2 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 2e33fb8d9..722a89565 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -77,11 +77,14 @@ void
 ionic_lif_reset(struct ionic_lif *lif)
 {
 	struct ionic_dev *idev = &lif->adapter->idev;
+	int err;
 
 	IONIC_PRINT_CALL();
 
 	ionic_dev_cmd_lif_reset(idev, lif->index);
-	ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
+	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
+	if (err)
+		IONIC_PRINT(WARNING, "Failed to reset lif");
 }
 
 static void
@@ -305,10 +308,11 @@ ionic_dev_add_mac(struct rte_eth_dev *eth_dev,
 }
 
 void
-ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused)
+ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index)
 {
 	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 	struct ionic_adapter *adapter = lif->adapter;
+	struct rte_ether_addr *mac_addr;
 
 	IONIC_PRINT_CALL();
 
@@ -319,11 +323,12 @@ ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused)
 		return;
 	}
 
-	if (!rte_is_valid_assigned_ether_addr(&eth_dev->data->mac_addrs[index]))
+	mac_addr = &eth_dev->data->mac_addrs[index];
+
+	if (!rte_is_valid_assigned_ether_addr(mac_addr))
 		return;
 
-	ionic_lif_addr_del(lif, (const uint8_t *)
-		&eth_dev->data->mac_addrs[index]);
+	ionic_lif_addr_del(lif, (const uint8_t *)mac_addr);
 }
 
 int
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index f77bddaa4..92cf0f398 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -188,8 +188,7 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 	done = ionic_wait_ctx_for_completion(lif, qcq, ctx,
 		IONIC_DEVCMD_TIMEOUT);
 
-	err = ionic_adminq_check_err(ctx, !done /* timed out */);
-	return err;
+	return ionic_adminq_check_err(ctx, !done /* timed out */);
 }
 
 static int
@@ -241,10 +240,11 @@ ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait)
 	int err;
 
 	err = ionic_dev_cmd_wait(idev, max_wait);
-	if (err)
-		return err;
 
-	return ionic_dev_cmd_check_error(idev);
+	if (!err)
+		err = ionic_dev_cmd_check_error(idev);
+
+	return err;
 }
 
 int
@@ -299,22 +299,18 @@ int
 ionic_init(struct ionic_adapter *adapter)
 {
 	struct ionic_dev *idev = &adapter->idev;
-	int err;
 
 	ionic_dev_cmd_init(idev);
-	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
-	return err;
+	return ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 }
 
 int
 ionic_reset(struct ionic_adapter *adapter)
 {
 	struct ionic_dev *idev = &adapter->idev;
-	int err;
 
 	ionic_dev_cmd_reset(idev);
-	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
-	return err;
+	return ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 }
 
 int
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v4 9/9] net/ionic: minor logging fixups
  2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
                       ` (8 preceding siblings ...)
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
@ 2020-12-10  2:07     ` Andrew Boyer
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:07 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

Expose ionic_opcode_to_str() so it can be used for dev cmds, too.
Store the device name in struct adapter.

Switch to memcpy() to work around gcc false positives.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic.h        |  1 +
 drivers/net/ionic/ionic_dev.c    |  5 ++++
 drivers/net/ionic/ionic_dev.h    |  2 ++
 drivers/net/ionic/ionic_ethdev.c |  4 ++--
 drivers/net/ionic/ionic_lif.c    | 28 ++++++++++++++--------
 drivers/net/ionic/ionic_main.c   | 32 ++++++++++++++-----------
 drivers/net/ionic/ionic_rxtx.c   | 41 ++++++++++++++------------------
 7 files changed, 64 insertions(+), 49 deletions(-)

diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h
index a93110326..7ad0ab69e 100644
--- a/drivers/net/ionic/ionic.h
+++ b/drivers/net/ionic/ionic.h
@@ -48,6 +48,7 @@ struct ionic_hw {
 struct ionic_adapter {
 	struct ionic_hw hw;
 	struct ionic_dev idev;
+	const char *name;
 	struct ionic_dev_bar bars[IONIC_BARS_MAX];
 	struct ionic_identity	ident;
 	struct ionic_lif *lifs[IONIC_LIFS_MAX];
diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c
index fc68f5c74..f32966521 100644
--- a/drivers/net/ionic/ionic_dev.c
+++ b/drivers/net/ionic/ionic_dev.c
@@ -102,6 +102,9 @@ ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd)
 	uint32_t cmd_size = sizeof(cmd->words) /
 		sizeof(cmd->words[0]);
 
+	IONIC_PRINT(DEBUG, "Sending %s (%d) via dev_cmd",
+		    ionic_opcode_to_str(cmd->cmd.opcode), cmd->cmd.opcode);
+
 	for (i = 0; i < cmd_size; i++)
 		iowrite32(cmd->words[i], &idev->dev_cmd->cmd.words[i]);
 
@@ -348,6 +351,8 @@ ionic_dev_cmd_adminq_init(struct ionic_dev *idev,
 		.q_init.cq_ring_base = cq->base_pa,
 	};
 
+	IONIC_PRINT(DEBUG, "adminq.q_init.ver %u", cmd.q_init.ver);
+
 	ionic_dev_cmd_go(idev, &cmd);
 }
 
diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index 7150f7f2c..026c4a9f3 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -205,6 +205,8 @@ struct ionic_qcq;
 void ionic_intr_init(struct ionic_dev *idev, struct ionic_intr_info *intr,
 	unsigned long index);
 
+const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode);
+
 int ionic_dev_setup(struct ionic_adapter *adapter);
 
 void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);
diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index ce6ca9671..5a360ac08 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -571,7 +571,7 @@ ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,
 
 	if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
 		IONIC_PRINT(ERR, "The size of hash lookup table configured "
-			"(%d) doesn't match the number hardware can supported "
+			"(%d) does not match the number hardware can support "
 			"(%d)",
 			reta_size, ident->lif.eth.rss_ind_tbl_sz);
 		return -EINVAL;
@@ -605,7 +605,7 @@ ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,
 
 	if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
 		IONIC_PRINT(ERR, "The size of hash lookup table configured "
-			"(%d) doesn't match the number hardware can supported "
+			"(%d) does not match the number hardware can support "
 			"(%d)",
 			reta_size, ident->lif.eth.rss_ind_tbl_sz);
 		return -EINVAL;
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 722a89565..28ae9dc8a 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -84,7 +84,7 @@ ionic_lif_reset(struct ionic_lif *lif)
 	ionic_dev_cmd_lif_reset(idev, lif->index);
 	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 	if (err)
-		IONIC_PRINT(WARNING, "Failed to reset lif");
+		IONIC_PRINT(WARNING, "Failed to reset %s", lif->name);
 }
 
 static void
@@ -554,7 +554,7 @@ ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr)
 	/*
 	 * Note: interrupt handler is called for index = 0 only
 	 * (we use interrupts for the notifyq only anyway,
-	 * which hash index = 0)
+	 * which has index = 0)
 	 */
 
 	for (index = 0; index < adapter->nintrs; index++)
@@ -687,8 +687,8 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 		ionic_q_sg_map(&new->q, sg_base, sg_base_pa);
 	}
 
-	IONIC_PRINT(DEBUG, "Q-Base-PA = %ju CQ-Base-PA = %ju "
-		"SG-base-PA = %ju",
+	IONIC_PRINT(DEBUG, "Q-Base-PA = %#jx CQ-Base-PA = %#jx "
+		"SG-base-PA = %#jx",
 		q_base_pa, cq_base_pa, sg_base_pa);
 
 	ionic_q_map(&new->q, q_base, q_base_pa);
@@ -827,7 +827,13 @@ ionic_lif_alloc(struct ionic_lif *lif)
 	int dbpage_num;
 	int err;
 
-	snprintf(lif->name, sizeof(lif->name), "lif%u", lif->index);
+	/*
+	 * lif->name was zeroed on allocation.
+	 * Copy (sizeof() - 1) bytes to ensure that it is NULL terminated.
+	 */
+	memcpy(lif->name, lif->eth_dev->data->name, sizeof(lif->name) - 1);
+
+	IONIC_PRINT(DEBUG, "LIF: %s", lif->name);
 
 	IONIC_PRINT(DEBUG, "Allocating Lif Info");
 
@@ -868,8 +874,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
 
 	IONIC_PRINT(DEBUG, "Allocating Admin Queue");
 
-	IONIC_PRINT(DEBUG, "Allocating Admin Queue");
-
 	err = ionic_admin_qcq_alloc(lif);
 	if (err) {
 		IONIC_PRINT(ERR, "Cannot allocate admin queue");
@@ -1223,6 +1227,7 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
 		ctx.cmd.q_init.ring_base);
 	IONIC_PRINT(DEBUG, "notifyq_init.ring_size %d",
 		ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "notifyq_init.ver %u", ctx.cmd.q_init.ver);
 
 	err = ionic_adminq_post_wait(lif, &ctx);
 	if (err)
@@ -1332,6 +1337,7 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 		ctx.cmd.q_init.ring_base);
 	IONIC_PRINT(DEBUG, "txq_init.ring_size %d",
 		ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "txq_init.ver %u", ctx.cmd.q_init.ver);
 
 	err = ionic_adminq_post_wait(qcq->lif, &ctx);
 	if (err)
@@ -1378,6 +1384,7 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 		ctx.cmd.q_init.ring_base);
 	IONIC_PRINT(DEBUG, "rxq_init.ring_size %d",
 		ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "rxq_init.ver %u", ctx.cmd.q_init.ver);
 
 	err = ionic_adminq_post_wait(qcq->lif, &ctx);
 	if (err)
@@ -1448,8 +1455,8 @@ ionic_lif_set_name(struct ionic_lif *lif)
 		},
 	};
 
-	snprintf(ctx.cmd.lif_setattr.name, sizeof(ctx.cmd.lif_setattr.name),
-		"%d", lif->port_id);
+	memcpy(ctx.cmd.lif_setattr.name, lif->name,
+		sizeof(ctx.cmd.lif_setattr.name) - 1);
 
 	ionic_adminq_post_wait(lif, &ctx);
 }
@@ -1680,7 +1687,8 @@ ionic_lifs_size(struct ionic_adapter *adapter)
 	nintrs = nlifs * 1 /* notifyq */;
 
 	if (nintrs > dev_nintrs) {
-		IONIC_PRINT(ERR, "At most %d intr queues supported, minimum required is %u",
+		IONIC_PRINT(ERR,
+			"At most %d intr supported, minimum req'd is %u",
 			dev_nintrs, nintrs);
 		return -ENOSPC;
 	}
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index 92cf0f398..ce5d11311 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -61,7 +61,7 @@ ionic_error_to_str(enum ionic_status_code code)
 	}
 }
 
-static const char *
+const char *
 ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
 {
 	switch (opcode) {
@@ -107,6 +107,8 @@ ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
 		return "IONIC_CMD_Q_INIT";
 	case IONIC_CMD_Q_CONTROL:
 		return "IONIC_CMD_Q_CONTROL";
+	case IONIC_CMD_Q_IDENTIFY:
+		return "IONIC_CMD_Q_IDENTIFY";
 	case IONIC_CMD_RDMA_RESET_LIF:
 		return "IONIC_CMD_RDMA_RESET_LIF";
 	case IONIC_CMD_RDMA_CREATE_EQ:
@@ -126,8 +128,9 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout)
 	const char *name;
 	const char *status;
 
+	name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
+
 	if (ctx->comp.comp.status || timeout) {
-		name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
 		status = ionic_error_to_str(ctx->comp.comp.status);
 		IONIC_PRINT(ERR, "%s (%d) failed: %s (%d)",
 			name,
@@ -137,6 +140,8 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout)
 		return -EIO;
 	}
 
+	IONIC_PRINT(DEBUG, "%s (%d) succeeded", name, ctx->cmd.cmd.opcode);
+
 	return 0;
 }
 
@@ -174,14 +179,13 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 	bool done;
 	int err;
 
-	IONIC_PRINT(DEBUG, "Sending %s to the admin queue",
-		ionic_opcode_to_str(ctx->cmd.cmd.opcode));
+	IONIC_PRINT(DEBUG, "Sending %s (%d) via the admin queue",
+		ionic_opcode_to_str(ctx->cmd.cmd.opcode), ctx->cmd.cmd.opcode);
 
 	err = ionic_adminq_post(lif, ctx);
 	if (err) {
-		IONIC_PRINT(ERR, "Failure posting to the admin queue %d (%d)",
+		IONIC_PRINT(ERR, "Failure posting %d to the admin queue (%d)",
 			ctx->cmd.cmd.opcode, err);
-
 		return err;
 	}
 
@@ -244,6 +248,7 @@ ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait)
 	if (!err)
 		err = ionic_dev_cmd_check_error(idev);
 
+	IONIC_PRINT(DEBUG, "dev_cmd returned %d", err);
 	return err;
 }
 
@@ -335,12 +340,12 @@ ionic_port_identify(struct ionic_adapter *adapter)
 				ioread32(&idev->dev_cmd->data[i]);
 	}
 
-	IONIC_PRINT(INFO, "speed %d ", ident->port.config.speed);
-	IONIC_PRINT(INFO, "mtu %d ", ident->port.config.mtu);
-	IONIC_PRINT(INFO, "state %d ", ident->port.config.state);
-	IONIC_PRINT(INFO, "an_enable %d ", ident->port.config.an_enable);
-	IONIC_PRINT(INFO, "fec_type %d ", ident->port.config.fec_type);
-	IONIC_PRINT(INFO, "pause_type %d ", ident->port.config.pause_type);
+	IONIC_PRINT(INFO, "speed %d", ident->port.config.speed);
+	IONIC_PRINT(INFO, "mtu %d", ident->port.config.mtu);
+	IONIC_PRINT(INFO, "state %d", ident->port.config.state);
+	IONIC_PRINT(INFO, "an_enable %d", ident->port.config.an_enable);
+	IONIC_PRINT(INFO, "fec_type %d", ident->port.config.fec_type);
+	IONIC_PRINT(INFO, "pause_type %d", ident->port.config.pause_type);
 	IONIC_PRINT(INFO, "loopback_mode %d",
 		ident->port.config.loopback_mode);
 
@@ -381,8 +386,7 @@ ionic_port_init(struct ionic_adapter *adapter)
 	idev->port_info_sz = RTE_ALIGN(sizeof(*idev->port_info), PAGE_SIZE);
 
 	snprintf(z_name, sizeof(z_name), "%s_port_%s_info",
-		IONIC_DRV_NAME,
-		adapter->pci_dev->device.name);
+		IONIC_DRV_NAME, adapter->name);
 
 	idev->port_info_z = ionic_memzone_reserve(z_name, idev->port_info_sz,
 		SOCKET_ID_ANY);
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index b953aff49..b689c8381 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -133,7 +133,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 {
 	struct ionic_qcq *txq;
 
-	IONIC_PRINT_CALL();
+	IONIC_PRINT(DEBUG, "Stopping TX queue %u", tx_queue_id);
 
 	txq = eth_dev->data->tx_queues[tx_queue_id];
 
@@ -156,7 +156,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 
 int __rte_cold
 ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
-		uint16_t nb_desc, uint32_t socket_id __rte_unused,
+		uint16_t nb_desc, uint32_t socket_id,
 		const struct rte_eth_txconf *tx_conf)
 {
 	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
@@ -164,11 +164,6 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	uint64_t offloads;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Configuring TX queue %u with %u buffers",
-		tx_queue_id, nb_desc);
-
 	if (tx_queue_id >= lif->ntxqcqs) {
 		IONIC_PRINT(DEBUG, "Queue index %u not available "
 			"(max %u queues)",
@@ -177,6 +172,9 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	}
 
 	offloads = tx_conf->offloads | eth_dev->data->dev_conf.txmode.offloads;
+	IONIC_PRINT(DEBUG,
+		"Configuring skt %u TX queue %u with %u buffers, offloads %jx",
+		socket_id, tx_queue_id, nb_desc, offloads);
 
 	/* Validate number of receive descriptors */
 	if (!rte_is_power_of_2(nb_desc) || nb_desc < IONIC_MIN_RING_DESC)
@@ -215,10 +213,11 @@ ionic_dev_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 	struct ionic_qcq *txq;
 	int err;
 
-	IONIC_PRINT_CALL();
-
 	txq = eth_dev->data->tx_queues[tx_queue_id];
 
+	IONIC_PRINT(DEBUG, "Starting TX queue %u, %u descs",
+		tx_queue_id, txq->q.num_descs);
+
 	err = ionic_lif_txq_init(txq);
 	if (err)
 		return err;
@@ -642,7 +641,7 @@ int __rte_cold
 ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 		uint16_t rx_queue_id,
 		uint16_t nb_desc,
-		uint32_t socket_id __rte_unused,
+		uint32_t socket_id,
 		const struct rte_eth_rxconf *rx_conf,
 		struct rte_mempool *mp)
 {
@@ -651,11 +650,6 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	uint64_t offloads;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Configuring RX queue %u with %u buffers",
-		rx_queue_id, nb_desc);
-
 	if (rx_queue_id >= lif->nrxqcqs) {
 		IONIC_PRINT(ERR,
 			"Queue index %u not available (max %u queues)",
@@ -664,13 +658,16 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	}
 
 	offloads = rx_conf->offloads | eth_dev->data->dev_conf.rxmode.offloads;
+	IONIC_PRINT(DEBUG,
+		"Configuring skt %u RX queue %u with %u buffers, offloads %jx",
+		socket_id, rx_queue_id, nb_desc, offloads);
 
 	/* Validate number of receive descriptors */
 	if (!rte_is_power_of_2(nb_desc) ||
 			nb_desc < IONIC_MIN_RING_DESC ||
 			nb_desc > IONIC_MAX_RING_DESC) {
 		IONIC_PRINT(ERR,
-			"Bad number of descriptors (%u) for queue %u (min: %u)",
+			"Bad descriptor count (%u) for queue %u (min: %u)",
 			nb_desc, rx_queue_id, IONIC_MIN_RING_DESC);
 		return -EINVAL; /* or use IONIC_DEFAULT_RING_DESC */
 	}
@@ -687,7 +684,7 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 
 	err = ionic_rx_qcq_alloc(lif, rx_queue_id, nb_desc, &rxq);
 	if (err) {
-		IONIC_PRINT(ERR, "Queue allocation failure");
+		IONIC_PRINT(ERR, "Queue %d allocation failure", rx_queue_id);
 		return -EINVAL;
 	}
 
@@ -959,13 +956,11 @@ ionic_dev_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)
 	struct ionic_qcq *rxq;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Allocating RX queue buffers (size: %u)",
-		frame_size);
-
 	rxq = eth_dev->data->rx_queues[rx_queue_id];
 
+	IONIC_PRINT(DEBUG, "Starting RX queue %u, %u descs (size: %u)",
+		rx_queue_id, rxq->q.num_descs, frame_size);
+
 	err = ionic_lif_rxq_init(rxq);
 	if (err)
 		return err;
@@ -1045,7 +1040,7 @@ ionic_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)
 {
 	struct ionic_qcq *rxq;
 
-	IONIC_PRINT_CALL();
+	IONIC_PRINT(DEBUG, "Stopping RX queue %u", rx_queue_id);
 
 	rxq = eth_dev->data->rx_queues[rx_queue_id];
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v5 0/9] net/ionic: minor updates and documentation
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
@ 2020-12-10  2:57       ` Andrew Boyer
  2020-12-10 12:31         ` Ferruh Yigit
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 1/9] net/ionic: connect ionic to the build system Andrew Boyer
                         ` (8 subsequent siblings)
  9 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:57 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

These patches make some minor changes to the ionic PMD.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>

---
v5:
* Fix syntax error in .rst file

v4:
* Address additional reviewer comments

v3:
* Fixed up false-positives from codespell and gcc 8.3/9.3

v2:
* Address Ferruh's comments (thank you!)
* Switch to net/ionic: prefix
* Leave UNMAINTAINED flag for now
* Split patch 8 into patch 8 & 9; drop whitespace changes

Andrew Boyer (9):
  net/ionic: connect ionic to the build system
  net/ionic: update interface file to the latest version
  net/ionic: update documentation and MAINTAINERS
  net/ionic: check for cmd completion more frequently
  net/ionic: remove some unused fields
  net/ionic: convert 'deferred' boolean to a flag bit
  net/ionic: warn if loopback mode is requested
  net/ionic: minor refactorings and helper variables
  net/ionic: minor logging fixups

 MAINTAINERS                        |    2 +-
 doc/guides/nics/features/ionic.ini |    1 +
 doc/guides/nics/ionic.rst          |   13 +-
 drivers/net/ionic/ionic.h          |    2 +-
 drivers/net/ionic/ionic_dev.c      |   10 +-
 drivers/net/ionic/ionic_dev.h      |   13 +-
 drivers/net/ionic/ionic_ethdev.c   |    9 +-
 drivers/net/ionic/ionic_if.h       | 1343 +++++++++++++++++++---------
 drivers/net/ionic/ionic_lif.c      |   67 +-
 drivers/net/ionic/ionic_lif.h      |    4 +-
 drivers/net/ionic/ionic_main.c     |   86 +-
 drivers/net/ionic/ionic_osdep.h    |   10 -
 drivers/net/ionic/ionic_regs.h     |    9 -
 drivers/net/ionic/ionic_rxtx.c     |   51 +-
 drivers/net/meson.build            |    1 +
 15 files changed, 1061 insertions(+), 560 deletions(-)

-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v5 1/9] net/ionic: connect ionic to the build system
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 " Andrew Boyer
@ 2020-12-10  2:57       ` Andrew Boyer
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 2/9] net/ionic: update interface file to the latest version Andrew Boyer
                         ` (7 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:57 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

Otherwise the ionic PMD is never built.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/meson.build | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index 29f477750..6e4aa6bf3 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -26,6 +26,7 @@ drivers = ['af_packet',
 	'iavf',
 	'ice',
 	'igc',
+	'ionic',
 	'ipn3ke',
 	'ixgbe',
 	'kni',
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v5 2/9] net/ionic: update interface file to the latest version
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 " Andrew Boyer
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 1/9] net/ionic: connect ionic to the build system Andrew Boyer
@ 2020-12-10  2:57       ` Andrew Boyer
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
                         ` (6 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:57 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

The ionic_if.h file contains the firmware interface definitions.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_if.h   | 1343 ++++++++++++++++++++++----------
 drivers/net/ionic/ionic_regs.h |    3 -
 2 files changed, 930 insertions(+), 416 deletions(-)

diff --git a/drivers/net/ionic/ionic_if.h b/drivers/net/ionic/ionic_if.h
index f83c8711b..ba4cc4b72 100644
--- a/drivers/net/ionic/ionic_if.h
+++ b/drivers/net/ionic/ionic_if.h
@@ -1,17 +1,15 @@
 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB OR BSD-3-Clause */
-/* Copyright (c) 2017-2019 Pensando Systems, Inc.  All rights reserved. */
+/* Copyright (c) 2017-2020 Pensando Systems, Inc.  All rights reserved. */
 
 #ifndef _IONIC_IF_H_
 #define _IONIC_IF_H_
 
-#pragma pack(push, 1)
-
 #define IONIC_DEV_INFO_SIGNATURE		0x44455649      /* 'DEVI' */
 #define IONIC_DEV_INFO_VERSION			1
 #define IONIC_IFNAMSIZ				16
 
 /**
- * Commands
+ * enum ionic_cmd_opcode - Device commands
  */
 enum ionic_cmd_opcode {
 	IONIC_CMD_NOP				= 0,
@@ -42,6 +40,7 @@ enum ionic_cmd_opcode {
 	IONIC_CMD_RX_FILTER_DEL			= 32,
 
 	/* Queue commands */
+	IONIC_CMD_Q_IDENTIFY			= 39,
 	IONIC_CMD_Q_INIT			= 40,
 	IONIC_CMD_Q_CONTROL			= 41,
 
@@ -51,10 +50,17 @@ enum ionic_cmd_opcode {
 	IONIC_CMD_RDMA_CREATE_CQ		= 52,
 	IONIC_CMD_RDMA_CREATE_ADMINQ		= 53,
 
+	/* SR/IOV commands */
+	IONIC_CMD_VF_GETATTR			= 60,
+	IONIC_CMD_VF_SETATTR			= 61,
+
 	/* QoS commands */
 	IONIC_CMD_QOS_CLASS_IDENTIFY		= 240,
 	IONIC_CMD_QOS_CLASS_INIT		= 241,
 	IONIC_CMD_QOS_CLASS_RESET		= 242,
+	IONIC_CMD_QOS_CLASS_UPDATE		= 243,
+	IONIC_CMD_QOS_CLEAR_STATS		= 244,
+	IONIC_CMD_QOS_RESET			= 245,
 
 	/* Firmware commands */
 	IONIC_CMD_FW_DOWNLOAD			= 254,
@@ -62,7 +68,7 @@ enum ionic_cmd_opcode {
 };
 
 /**
- * Command Return codes
+ * enum ionic_status_code - Device command return codes
  */
 enum ionic_status_code {
 	IONIC_RC_SUCCESS	= 0,	/* Success */
@@ -86,8 +92,8 @@ enum ionic_status_code {
 	IONIC_RC_DEV_CMD	= 18,	/* Device cmd attempted on AdminQ */
 	IONIC_RC_ENOSUPP	= 19,	/* Operation not supported */
 	IONIC_RC_ERROR		= 29,	/* Generic error */
-
 	IONIC_RC_ERDMA		= 30,	/* Generic RDMA error */
+	IONIC_RC_EVFID		= 31,	/* VF ID does not exist */
 };
 
 enum ionic_notifyq_opcode {
@@ -95,10 +101,11 @@ enum ionic_notifyq_opcode {
 	IONIC_EVENT_RESET		= 2,
 	IONIC_EVENT_HEARTBEAT		= 3,
 	IONIC_EVENT_LOG			= 4,
+	IONIC_EVENT_XCVR		= 5,
 };
 
 /**
- * struct cmd - General admin command format
+ * struct ionic_admin_cmd - General admin command format
  * @opcode:     Opcode for the command
  * @lif_index:  LIF index
  * @cmd_data:   Opcode-specific command bytes
@@ -112,12 +119,11 @@ struct ionic_admin_cmd {
 
 /**
  * struct ionic_admin_comp - General admin command completion format
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
- * @cmd_data:   Command-specific bytes.
- * @color:      Color bit.  (Always 0 for commands issued to the
- *              Device Cmd Registers.)
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @cmd_data:   Command-specific bytes
+ * @color:      Color bit (Always 0 for commands issued to the
+ *              Device Cmd Registers)
  */
 struct ionic_admin_comp {
 	u8     status;
@@ -144,7 +150,7 @@ struct ionic_nop_cmd {
 
 /**
  * struct ionic_nop_comp - NOP command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_nop_comp {
 	u8 status;
@@ -154,7 +160,7 @@ struct ionic_nop_comp {
 /**
  * struct ionic_dev_init_cmd - Device init command
  * @opcode:    opcode
- * @type:      device type
+ * @type:      Device type
  */
 struct ionic_dev_init_cmd {
 	u8     opcode;
@@ -163,8 +169,8 @@ struct ionic_dev_init_cmd {
 };
 
 /**
- * struct init_comp - Device init command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_init_comp - Device init command completion
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_dev_init_comp {
 	u8 status;
@@ -181,8 +187,8 @@ struct ionic_dev_reset_cmd {
 };
 
 /**
- * struct reset_comp - Reset command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_reset_comp - Reset command completion
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_dev_reset_comp {
 	u8 status;
@@ -203,8 +209,8 @@ struct ionic_dev_identify_cmd {
 };
 
 /**
- * struct dev_identify_comp - Driver/device identify command completion
- * @status: The status of the command (enum status_code)
+ * struct ionic_dev_identify_comp - Driver/device identify command completion
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_dev_identify_comp {
@@ -223,8 +229,8 @@ enum ionic_os_type {
 };
 
 /**
- * union drv_identity - driver identity information
- * @os_type:          OS type (see enum os_type)
+ * union ionic_drv_identity - driver identity information
+ * @os_type:          OS type (see enum ionic_os_type)
  * @os_dist:          OS distribution, numeric format
  * @os_dist_str:      OS distribution, string format
  * @kernel_ver:       Kernel version, numeric format
@@ -240,26 +246,26 @@ union ionic_drv_identity {
 		char   kernel_ver_str[32];
 		char   driver_ver_str[32];
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
- * union dev_identity - device identity information
+ * union ionic_dev_identity - device identity information
  * @version:          Version of device identify
  * @type:             Identify type (0 for now)
  * @nports:           Number of ports provisioned
  * @nlifs:            Number of LIFs provisioned
  * @nintrs:           Number of interrupts provisioned
  * @ndbpgs_per_lif:   Number of doorbell pages per LIF
- * @intr_coal_mult:   Interrupt coalescing multiplication factor.
+ * @intr_coal_mult:   Interrupt coalescing multiplication factor
  *                    Scale user-supplied interrupt coalescing
  *                    value in usecs to device units using:
  *                    device units = usecs * mult / div
- * @intr_coal_div:    Interrupt coalescing division factor.
+ * @intr_coal_div:    Interrupt coalescing division factor
  *                    Scale user-supplied interrupt coalescing
  *                    value in usecs to device units using:
  *                    device units = usecs * mult / div
- *
+ * @eq_count:         Number of shared event queues
  */
 union ionic_dev_identity {
 	struct {
@@ -273,8 +279,9 @@ union ionic_dev_identity {
 		__le32 ndbpgs_per_lif;
 		__le32 intr_coal_mult;
 		__le32 intr_coal_div;
+		__le32 eq_count;
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 enum ionic_lif_type {
@@ -284,10 +291,10 @@ enum ionic_lif_type {
 };
 
 /**
- * struct ionic_lif_identify_cmd - lif identify command
+ * struct ionic_lif_identify_cmd - LIF identify command
  * @opcode:  opcode
- * @type:    lif type (enum lif_type)
- * @ver:     version of identify returned by device
+ * @type:    LIF type (enum ionic_lif_type)
+ * @ver:     Version of identify returned by device
  */
 struct ionic_lif_identify_cmd {
 	u8 opcode;
@@ -297,9 +304,9 @@ struct ionic_lif_identify_cmd {
 };
 
 /**
- * struct ionic_lif_identify_comp - lif identify command completion
- * @status:  status of the command (enum status_code)
- * @ver:     version of identify returned by device
+ * struct ionic_lif_identify_comp - LIF identify command completion
+ * @status:  Status of the command (enum ionic_status_code)
+ * @ver:     Version of identify returned by device
  */
 struct ionic_lif_identify_comp {
 	u8 status;
@@ -307,13 +314,24 @@ struct ionic_lif_identify_comp {
 	u8 rsvd2[14];
 };
 
+/**
+ * enum ionic_lif_capability - LIF capabilities
+ * @IONIC_LIF_CAP_ETH:     LIF supports Ethernet
+ * @IONIC_LIF_CAP_RDMA:    LIF support RDMA
+ */
 enum ionic_lif_capability {
 	IONIC_LIF_CAP_ETH        = BIT(0),
 	IONIC_LIF_CAP_RDMA       = BIT(1),
 };
 
 /**
- * Logical Queue Types
+ * enum ionic_logical_qtype - Logical Queue Types
+ * @IONIC_QTYPE_ADMINQ:    Administrative Queue
+ * @IONIC_QTYPE_NOTIFYQ:   Notify Queue
+ * @IONIC_QTYPE_RXQ:       Receive Queue
+ * @IONIC_QTYPE_TXQ:       Transmit Queue
+ * @IONIC_QTYPE_EQ:        Event Queue
+ * @IONIC_QTYPE_MAX:       Max queue type supported
  */
 enum ionic_logical_qtype {
 	IONIC_QTYPE_ADMINQ  = 0,
@@ -325,11 +343,10 @@ enum ionic_logical_qtype {
 };
 
 /**
- * struct ionic_lif_logical_qtype - Descriptor of logical to hardware queue
- * type.
- * @qtype:          Hardware Queue Type.
- * @qid_count:      Number of Queue IDs of the logical type.
- * @qid_base:       Minimum Queue ID of the logical type.
+ * struct ionic_lif_logical_qtype - Descriptor of logical to HW queue type
+ * @qtype:          Hardware Queue Type
+ * @qid_count:      Number of Queue IDs of the logical type
+ * @qid_base:       Minimum Queue ID of the logical type
  */
 struct ionic_lif_logical_qtype {
 	u8     qtype;
@@ -338,20 +355,27 @@ struct ionic_lif_logical_qtype {
 	__le32 qid_base;
 };
 
+/**
+ * enum ionic_lif_state - LIF state
+ * @IONIC_LIF_DISABLE:     LIF disabled
+ * @IONIC_LIF_ENABLE:      LIF enabled
+ * @IONIC_LIF_QUIESCE:     LIF Quiesced
+ */
 enum ionic_lif_state {
-	IONIC_LIF_DISABLE	= 0,
+	IONIC_LIF_QUIESCE	= 0,
 	IONIC_LIF_ENABLE	= 1,
-	IONIC_LIF_HANG_RESET	= 2,
+	IONIC_LIF_DISABLE	= 2,
 };
 
 /**
- * LIF configuration
- * @state:          lif state (enum lif_state)
- * @name:           lif name
- * @mtu:            mtu
- * @mac:            station mac address
- * @features:       features (enum ionic_eth_hw_features)
- * @queue_count:    queue counts per queue-type
+ * union ionic_lif_config - LIF configuration
+ * @state:          LIF state (enum ionic_lif_state)
+ * @name:           LIF name
+ * @mtu:            MTU
+ * @mac:            Station MAC address
+ * @vlan:           Default Vlan ID
+ * @features:       Features (enum ionic_eth_hw_features)
+ * @queue_count:    Queue counts per queue-type
  */
 union ionic_lif_config {
 	struct {
@@ -360,45 +384,44 @@ union ionic_lif_config {
 		char   name[IONIC_IFNAMSIZ];
 		__le32 mtu;
 		u8     mac[6];
-		u8     rsvd2[2];
+		__le16 vlan;
 		__le64 features;
 		__le32 queue_count[IONIC_QTYPE_MAX];
-	};
+	} __rte_packed;
 	__le32 words[64];
 };
 
 /**
- * struct ionic_lif_identity - lif identity information (type-specific)
+ * struct ionic_lif_identity - LIF identity information (type-specific)
  *
- * @capabilities    LIF capabilities
+ * @capabilities:        LIF capabilities
  *
- * Ethernet:
- *     @version:          Ethernet identify structure version.
- *     @features:         Ethernet features supported on this lif type.
- *     @max_ucast_filters:  Number of perfect unicast addresses supported.
- *     @max_mcast_filters:  Number of perfect multicast addresses supported.
- *     @min_frame_size:   Minimum size of frames to be sent
- *     @max_frame_size:   Maximum size of frames to be sent
- *     @config:           LIF config struct with features, mtu, mac, q counts
+ * @eth:                    Ethernet identify structure
+ *     @version:            Ethernet identify structure version
+ *     @max_ucast_filters:  Number of perfect unicast addresses supported
+ *     @max_mcast_filters:  Number of perfect multicast addresses supported
+ *     @min_frame_size:     Minimum size of frames to be sent
+ *     @max_frame_size:     Maximum size of frames to be sent
+ *     @config:             LIF config struct with features, mtu, mac, q counts
  *
- * RDMA:
- *     @version:         RDMA version of opcodes and queue descriptors.
- *     @qp_opcodes:      Number of rdma queue pair opcodes supported.
- *     @admin_opcodes:   Number of rdma admin opcodes supported.
- *     @npts_per_lif:    Page table size per lif
- *     @nmrs_per_lif:    Number of memory regions per lif
- *     @nahs_per_lif:    Number of address handles per lif
- *     @max_stride:      Max work request stride.
- *     @cl_stride:       Cache line stride.
- *     @pte_stride:      Page table entry stride.
- *     @rrq_stride:      Remote RQ work request stride.
- *     @rsq_stride:      Remote SQ work request stride.
+ * @rdma:                RDMA identify structure
+ *     @version:         RDMA version of opcodes and queue descriptors
+ *     @qp_opcodes:      Number of RDMA queue pair opcodes supported
+ *     @admin_opcodes:   Number of RDMA admin opcodes supported
+ *     @npts_per_lif:    Page table size per LIF
+ *     @nmrs_per_lif:    Number of memory regions per LIF
+ *     @nahs_per_lif:    Number of address handles per LIF
+ *     @max_stride:      Max work request stride
+ *     @cl_stride:       Cache line stride
+ *     @pte_stride:      Page table entry stride
+ *     @rrq_stride:      Remote RQ work request stride
+ *     @rsq_stride:      Remote SQ work request stride
  *     @dcqcn_profiles:  Number of DCQCN profiles
- *     @aq_qtype:        RDMA Admin Qtype.
- *     @sq_qtype:        RDMA Send Qtype.
- *     @rq_qtype:        RDMA Receive Qtype.
- *     @cq_qtype:        RDMA Completion Qtype.
- *     @eq_qtype:        RDMA Event Qtype.
+ *     @aq_qtype:        RDMA Admin Qtype
+ *     @sq_qtype:        RDMA Send Qtype
+ *     @rq_qtype:        RDMA Receive Qtype
+ *     @cq_qtype:        RDMA Completion Qtype
+ *     @eq_qtype:        RDMA Event Qtype
  */
 union ionic_lif_identity {
 	struct {
@@ -414,7 +437,7 @@ union ionic_lif_identity {
 			__le32 max_frame_size;
 			u8 rsvd2[106];
 			union ionic_lif_config config;
-		} eth;
+		} __rte_packed eth;
 
 		struct {
 			u8 version;
@@ -436,17 +459,17 @@ union ionic_lif_identity {
 			struct ionic_lif_logical_qtype rq_qtype;
 			struct ionic_lif_logical_qtype cq_qtype;
 			struct ionic_lif_logical_qtype eq_qtype;
-		} rdma;
-	};
-	__le32 words[512];
+		} __rte_packed rdma;
+	} __rte_packed;
+	__le32 words[478];
 };
 
 /**
  * struct ionic_lif_init_cmd - LIF init command
- * @opcode:       opcode
- * @type:         LIF type (enum lif_type)
+ * @opcode:       Opcode
+ * @type:         LIF type (enum ionic_lif_type)
  * @index:        LIF index
- * @info_pa:      destination address for lif info (struct ionic_lif_info)
+ * @info_pa:      Destination address for LIF info (struct ionic_lif_info)
  */
 struct ionic_lif_init_cmd {
 	u8     opcode;
@@ -459,7 +482,8 @@ struct ionic_lif_init_cmd {
 
 /**
  * struct ionic_lif_init_comp - LIF init command completion
- * @status: The status of the command (enum status_code)
+ * @status:	Status of the command (enum ionic_status_code)
+ * @hw_index:	Hardware index of the initialized LIF
  */
 struct ionic_lif_init_comp {
 	u8 status;
@@ -468,14 +492,74 @@ struct ionic_lif_init_comp {
 	u8 rsvd2[12];
 };
 
+/**
+ * struct ionic_q_identify_cmd - queue identify command
+ * @opcode:     opcode
+ * @lif_type:   LIF type (enum ionic_lif_type)
+ * @type:       Logical queue type (enum ionic_logical_qtype)
+ * @ver:        Highest queue type version that the driver supports
+ */
+struct ionic_q_identify_cmd {
+	u8     opcode;
+	u8     rsvd;
+	__le16 lif_type;
+	u8     type;
+	u8     ver;
+	u8     rsvd2[58];
+};
+
+/**
+ * struct ionic_q_identify_comp - queue identify command completion
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @ver:        Queue type version that can be used with FW
+ */
+struct ionic_q_identify_comp {
+	u8     status;
+	u8     rsvd;
+	__le16 comp_index;
+	u8     ver;
+	u8     rsvd2[11];
+};
+
+/**
+ * union ionic_q_identity - queue identity information
+ *     @version:        Queue type version that can be used with FW
+ *     @supported:      Bitfield of queue versions, first bit = ver 0
+ *     @features:       Queue features
+ *     @desc_sz:        Descriptor size
+ *     @comp_sz:        Completion descriptor size
+ *     @sg_desc_sz:     Scatter/Gather descriptor size
+ *     @max_sg_elems:   Maximum number of Scatter/Gather elements
+ *     @sg_desc_stride: Number of Scatter/Gather elements per descriptor
+ */
+union ionic_q_identity {
+	struct {
+		u8      version;
+		u8      supported;
+		u8      rsvd[6];
+#define IONIC_QIDENT_F_CQ	0x01	/* queue has completion ring */
+#define IONIC_QIDENT_F_SG	0x02	/* queue has scatter/gather ring */
+#define IONIC_QIDENT_F_EQ	0x04	/* queue can use event queue */
+#define IONIC_QIDENT_F_CMB	0x08	/* queue is in cmb bar */
+		__le64  features;
+		__le16  desc_sz;
+		__le16  comp_sz;
+		__le16  sg_desc_sz;
+		__le16  max_sg_elems;
+		__le16  sg_desc_stride;
+	};
+	__le32 words[478];
+};
+
 /**
  * struct ionic_q_init_cmd - Queue init command
  * @opcode:       opcode
  * @type:         Logical queue type
- * @ver:          Queue version (defines opcode/descriptor scope)
+ * @ver:          Queue type version
  * @lif_index:    LIF index
- * @index:        (lif, qtype) relative admin queue index
- * @intr_index:   Interrupt control register index
+ * @index:        (LIF, qtype) relative admin queue index
+ * @intr_index:   Interrupt control register index, or Event queue index
  * @pid:          Process ID
  * @flags:
  *    IRQ:        Interrupt requested on completion
@@ -493,12 +577,11 @@ struct ionic_lif_init_comp {
  *                descriptors.  Values of ring_size <2 and >16 are
  *                reserved.
  *    EQ:         Enable the Event Queue
- * @cos:          Class of service for this queue.
+ * @cos:          Class of service for this queue
  * @ring_size:    Queue ring size, encoded as a log2(size)
  * @ring_base:    Queue ring base address
  * @cq_ring_base: Completion queue ring base address
  * @sg_ring_base: Scatter/Gather ring base address
- * @eq_index:	  Event queue index
  */
 struct ionic_q_init_cmd {
 	u8     opcode;
@@ -515,29 +598,27 @@ struct ionic_q_init_cmd {
 #define IONIC_QINIT_F_ENA	0x02	/* Enable the queue */
 #define IONIC_QINIT_F_SG	0x04	/* Enable scatter/gather on the queue */
 #define IONIC_QINIT_F_EQ	0x08	/* Enable event queue */
-#define IONIC_QINIT_F_DEBUG 0x80	/* Enable queue debugging */
+#define IONIC_QINIT_F_CMB	0x10	/* Enable cmb-based queue */
+#define IONIC_QINIT_F_DEBUG	0x80	/* Enable queue debugging */
 	u8     cos;
 	u8     ring_size;
 	__le64 ring_base;
 	__le64 cq_ring_base;
 	__le64 sg_ring_base;
-	__le32 eq_index;
-	u8     rsvd2[16];
-};
+	u8     rsvd2[20];
+} __rte_packed;
 
 /**
  * struct ionic_q_init_comp - Queue init command completion
- * @status:     The status of the command (enum status_code)
- * @ver:        Queue version (defines opcode/descriptor scope)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @hw_index:   Hardware Queue ID
  * @hw_type:    Hardware Queue type
  * @color:      Color
  */
 struct ionic_q_init_comp {
 	u8     status;
-	u8     ver;
+	u8     rsvd;
 	__le16 comp_index;
 	__le32 hw_index;
 	u8     hw_type;
@@ -558,10 +639,9 @@ enum ionic_txq_desc_opcode {
 
 /**
  * struct ionic_txq_desc - Ethernet Tx queue descriptor format
- * @opcode:       Tx operation, see TXQ_DESC_OPCODE_*:
+ * @cmd:          Tx operation, see IONIC_TXQ_DESC_OPCODE_*:
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_NONE:
- *
  *                      Non-offload send.  No segmentation,
  *                      fragmentation or checksum calc/insertion is
  *                      performed by device; packet is prepared
@@ -569,7 +649,6 @@ enum ionic_txq_desc_opcode {
  *                      no further manipulation from device.
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_PARTIAL:
- *
  *                      Offload 16-bit L4 checksum
  *                      calculation/insertion.  The device will
  *                      calculate the L4 checksum value and
@@ -578,14 +657,16 @@ enum ionic_txq_desc_opcode {
  *                      is calculated starting at @csum_start bytes
  *                      into the packet to the end of the packet.
  *                      The checksum insertion position is given
- *                      in @csum_offset.  This feature is only
- *                      applicable to protocols such as TCP, UDP
- *                      and ICMP where a standard (i.e. the
- *                      'IP-style' checksum) one's complement
- *                      16-bit checksum is used, using an IP
- *                      pseudo-header to seed the calculation.
- *                      Software will preload the L4 checksum
- *                      field with the IP pseudo-header checksum.
+ *                      in @csum_offset, which is the offset from
+ *                      @csum_start to the checksum field in the L4
+ *                      header.  This feature is only applicable to
+ *                      protocols such as TCP, UDP and ICMP where a
+ *                      standard (i.e. the 'IP-style' checksum)
+ *                      one's complement 16-bit checksum is used,
+ *                      using an IP pseudo-header to seed the
+ *                      calculation.  Software will preload the L4
+ *                      checksum field with the IP pseudo-header
+ *                      checksum.
  *
  *                      For tunnel encapsulation, @csum_start and
  *                      @csum_offset refer to the inner L4
@@ -597,11 +678,10 @@ enum ionic_txq_desc_opcode {
  *                      the @encap is set, the device will
  *                      offload the outer header checksums using
  *                      LCO (local checksum offload) (see
- *                      Documentation/networking/checksum-
- *                      offloads.txt for more info).
+ *                      Documentation/networking/checksum-offloads.rst
+ *                      for more info).
  *
  *                   IONIC_TXQ_DESC_OPCODE_CSUM_HW:
- *
  *                      Offload 16-bit checksum computation to hardware.
  *                      If @csum_l3 is set then the packet's L3 checksum is
  *                      updated. Similarly, if @csum_l4 is set the the L4
@@ -609,7 +689,6 @@ enum ionic_txq_desc_opcode {
  *                      checksums are also updated.
  *
  *                   IONIC_TXQ_DESC_OPCODE_TSO:
- *
  *                      Device performs TCP segmentation offload
  *                      (TSO).  @hdr_len is the number of bytes
  *                      to the end of TCP header (the offset to
@@ -636,40 +715,41 @@ enum ionic_txq_desc_opcode {
  *                      clear CWR in remaining segments.
  * @flags:
  *                vlan:
- *                    Insert an L2 VLAN header using @vlan_tci.
+ *                    Insert an L2 VLAN header using @vlan_tci
  *                encap:
- *                    Calculate encap header checksum.
+ *                    Calculate encap header checksum
  *                csum_l3:
- *                    Compute L3 header checksum.
+ *                    Compute L3 header checksum
  *                csum_l4:
- *                    Compute L4 header checksum.
+ *                    Compute L4 header checksum
  *                tso_sot:
  *                    TSO start
  *                tso_eot:
  *                    TSO end
  * @num_sg_elems: Number of scatter-gather elements in SG
  *                descriptor
- * @addr:         First data buffer's DMA address.
- *                (Subsequent data buffers are on txq_sg_desc).
+ * @addr:         First data buffer's DMA address
+ *                (Subsequent data buffers are on txq_sg_desc)
  * @len:          First data buffer's length, in bytes
  * @vlan_tci:     VLAN tag to insert in the packet (if requested
  *                by @V-bit).  Includes .1p and .1q tags
  * @hdr_len:      Length of packet headers, including
- *                encapsulating outer header, if applicable.
- *                Valid for opcodes TXQ_DESC_OPCODE_CALC_CSUM and
- *                TXQ_DESC_OPCODE_TSO.  Should be set to zero for
+ *                encapsulating outer header, if applicable
+ *                Valid for opcodes IONIC_TXQ_DESC_OPCODE_CALC_CSUM and
+ *                IONIC_TXQ_DESC_OPCODE_TSO.  Should be set to zero for
  *                all other modes.  For
- *                TXQ_DESC_OPCODE_CALC_CSUM, @hdr_len is length
+ *                IONIC_TXQ_DESC_OPCODE_CALC_CSUM, @hdr_len is length
  *                of headers up to inner-most L4 header.  For
- *                TXQ_DESC_OPCODE_TSO, @hdr_len is up to
+ *                IONIC_TXQ_DESC_OPCODE_TSO, @hdr_len is up to
  *                inner-most L4 payload, so inclusive of
  *                inner-most L4 header.
- * @mss:          Desired MSS value for TSO.  Only applicable for
- *                TXQ_DESC_OPCODE_TSO.
- * @csum_start:   Offset into inner-most L3 header of checksum
- * @csum_offset:  Offset into inner-most L4 header of checksum
+ * @mss:          Desired MSS value for TSO; only applicable for
+ *                IONIC_TXQ_DESC_OPCODE_TSO
+ * @csum_start:   Offset from packet to first byte checked in L4 checksum
+ * @csum_offset:  Offset from csum_start to L4 checksum field
  */
-
+struct ionic_txq_desc {
+	__le64  cmd;
 #define IONIC_TXQ_DESC_OPCODE_MASK		0xf
 #define IONIC_TXQ_DESC_OPCODE_SHIFT		4
 #define IONIC_TXQ_DESC_FLAGS_MASK		0xf
@@ -691,8 +771,6 @@ enum ionic_txq_desc_opcode {
 #define IONIC_TXQ_DESC_FLAG_TSO_SOT		0x4
 #define IONIC_TXQ_DESC_FLAG_TSO_EOT		0x8
 
-struct ionic_txq_desc {
-	__le64  cmd;
 	__le16  len;
 	union {
 		__le16  vlan_tci;
@@ -719,45 +797,60 @@ static inline u64 encode_txq_desc_cmd(u8 opcode, u8 flags,
 		IONIC_TXQ_DESC_OPCODE_SHIFT;
 	cmd |= (flags & IONIC_TXQ_DESC_FLAGS_MASK) <<
 		IONIC_TXQ_DESC_FLAGS_SHIFT;
-	cmd |= (nsge & IONIC_TXQ_DESC_NSGE_MASK) << IONIC_TXQ_DESC_NSGE_SHIFT;
-	cmd |= (addr & IONIC_TXQ_DESC_ADDR_MASK) << IONIC_TXQ_DESC_ADDR_SHIFT;
+	cmd |= (nsge & IONIC_TXQ_DESC_NSGE_MASK) <<
+		IONIC_TXQ_DESC_NSGE_SHIFT;
+	cmd |= (addr & IONIC_TXQ_DESC_ADDR_MASK) <<
+		IONIC_TXQ_DESC_ADDR_SHIFT;
 
 	return cmd;
 };
 
-static inline void decode_txq_desc_cmd(u64 cmd, u8 *opcode, u8 *flags,
+static inline void
+decode_txq_desc_cmd(u64 cmd, u8 *opcode, u8 *flags,
 				       u8 *nsge, u64 *addr)
 {
 	*opcode = (cmd >> IONIC_TXQ_DESC_OPCODE_SHIFT) &
 		IONIC_TXQ_DESC_OPCODE_MASK;
 	*flags = (cmd >> IONIC_TXQ_DESC_FLAGS_SHIFT) &
 		IONIC_TXQ_DESC_FLAGS_MASK;
-	*nsge = (cmd >> IONIC_TXQ_DESC_NSGE_SHIFT) & IONIC_TXQ_DESC_NSGE_MASK;
-	*addr = (cmd >> IONIC_TXQ_DESC_ADDR_SHIFT) & IONIC_TXQ_DESC_ADDR_MASK;
+	*nsge = (cmd >> IONIC_TXQ_DESC_NSGE_SHIFT) &
+		IONIC_TXQ_DESC_NSGE_MASK;
+	*addr = (cmd >> IONIC_TXQ_DESC_ADDR_SHIFT) &
+		IONIC_TXQ_DESC_ADDR_MASK;
 };
 
-#define IONIC_TX_MAX_SG_ELEMS	8
-#define IONIC_RX_MAX_SG_ELEMS	8
-
 /**
- * struct ionic_txq_sg_desc - Transmit scatter-gather (SG) list
+ * struct ionic_txq_sg_elem - Transmit scatter-gather (SG) descriptor element
  * @addr:      DMA address of SG element data buffer
  * @len:       Length of SG element data buffer, in bytes
  */
+struct ionic_txq_sg_elem {
+	__le64 addr;
+	__le16 len;
+	__le16 rsvd[3];
+};
+
+/**
+ * struct ionic_txq_sg_desc - Transmit scatter-gather (SG) list
+ * @elems:     Scatter-gather elements
+ */
 struct ionic_txq_sg_desc {
-	struct ionic_txq_sg_elem {
-		__le64 addr;
-		__le16 len;
-		__le16 rsvd[3];
-	} elems[IONIC_TX_MAX_SG_ELEMS];
+#define IONIC_TX_MAX_SG_ELEMS		8
+#define IONIC_TX_SG_DESC_STRIDE		8
+	struct ionic_txq_sg_elem elems[IONIC_TX_MAX_SG_ELEMS];
+};
+
+struct ionic_txq_sg_desc_v1 {
+#define IONIC_TX_MAX_SG_ELEMS_V1		15
+#define IONIC_TX_SG_DESC_STRIDE_V1		16
+	struct ionic_txq_sg_elem elems[IONIC_TX_SG_DESC_STRIDE_V1];
 };
 
 /**
  * struct ionic_txq_comp - Ethernet transmit queue completion descriptor
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *                 is the completion.
- * @color:      Color bit.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @color:      Color bit
  */
 struct ionic_txq_comp {
 	u8     status;
@@ -774,16 +867,15 @@ enum ionic_rxq_desc_opcode {
 
 /**
  * struct ionic_rxq_desc - Ethernet Rx queue descriptor format
- * @opcode:       Rx operation, see RXQ_DESC_OPCODE_*:
- *
- *                   RXQ_DESC_OPCODE_SIMPLE:
+ * @opcode:       Rx operation, see IONIC_RXQ_DESC_OPCODE_*:
  *
+ *                   IONIC_RXQ_DESC_OPCODE_SIMPLE:
  *                      Receive full packet into data buffer
  *                      starting at @addr.  Results of
  *                      receive, including actual bytes received,
  *                      are recorded in Rx completion descriptor.
  *
- * @len:          Data buffer's length, in bytes.
+ * @len:          Data buffer's length, in bytes
  * @addr:         Data buffer's DMA address
  */
 struct ionic_rxq_desc {
@@ -794,26 +886,33 @@ struct ionic_rxq_desc {
 };
 
 /**
- * struct ionic_rxq_sg_desc - Receive scatter-gather (SG) list
+ * struct ionic_rxq_sg_elem - Receive scatter-gather (SG) descriptor element
  * @addr:      DMA address of SG element data buffer
  * @len:       Length of SG element data buffer, in bytes
  */
+struct ionic_rxq_sg_elem {
+	__le64 addr;
+	__le16 len;
+	__le16 rsvd[3];
+};
+
+/**
+ * struct ionic_rxq_sg_desc - Receive scatter-gather (SG) list
+ * @elems:     Scatter-gather elements
+ */
 struct ionic_rxq_sg_desc {
-	struct ionic_rxq_sg_elem {
-		__le64 addr;
-		__le16 len;
-		__le16 rsvd[3];
-	} elems[IONIC_RX_MAX_SG_ELEMS];
+#define IONIC_RX_MAX_SG_ELEMS		8
+#define IONIC_RX_SG_DESC_STRIDE		8
+	struct ionic_rxq_sg_elem elems[IONIC_RX_SG_DESC_STRIDE];
 };
 
 /**
  * struct ionic_rxq_comp - Ethernet receive queue completion descriptor
- * @status:       The status of the command (enum status_code)
+ * @status:       Status of the command (enum ionic_status_code)
  * @num_sg_elems: Number of SG elements used by this descriptor
- * @comp_index:   The index in the descriptor ring for which this
- *                is the completion.
+ * @comp_index:   Index in the descriptor ring for which this is the completion
  * @rss_hash:     32-bit RSS hash
- * @csum:         16-bit sum of the packet's L2 payload.
+ * @csum:         16-bit sum of the packet's L2 payload
  *                If the packet's L2 payload is odd length, an extra
  *                zero-value byte is included in the @csum calculation but
  *                not included in @len.
@@ -821,33 +920,51 @@ struct ionic_rxq_sg_desc {
  *                set.  Includes .1p and .1q tags.
  * @len:          Received packet length, in bytes.  Excludes FCS.
  * @csum_calc     L2 payload checksum is computed or not
- * @csum_tcp_ok:  The TCP checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                TCP header
- * @csum_tcp_bad: The TCP checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                TCP header.
- * @csum_udp_ok:  The UDP checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                UDP header
- * @csum_udp_bad: The UDP checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                UDP header.
- * @csum_ip_ok:   The IPv4 checksum calculated by the device
- *                matched the checksum in the receive packet's
- *                first IPv4 header.  If the receive packet
- *                contains both a tunnel IPv4 header and a
- *                transport IPv4 header, the device validates the
- *                checksum for the both IPv4 headers.
- * @csum_ip_bad:  The IPv4 checksum calculated by the device did
- *                not match the checksum in the receive packet's
- *                first IPv4 header. If the receive packet
- *                contains both a tunnel IPv4 header and a
- *                transport IPv4 header, the device validates the
- *                checksum for both IP headers.
- * @VLAN:         VLAN header was stripped and placed in @vlan_tci.
- * @pkt_type:     Packet type
- * @color:        Color bit.
+ * @csum_flags:   See IONIC_RXQ_COMP_CSUM_F_*:
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_TCP_OK:
+ *                    The TCP checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    TCP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_TCP_BAD:
+ *                    The TCP checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    TCP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_UDP_OK:
+ *                    The UDP checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    UDP header
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_UDP_BAD:
+ *                    The UDP checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    UDP header.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_IP_OK:
+ *                    The IPv4 checksum calculated by the device
+ *                    matched the checksum in the receive packet's
+ *                    first IPv4 header.  If the receive packet
+ *                    contains both a tunnel IPv4 header and a
+ *                    transport IPv4 header, the device validates the
+ *                    checksum for the both IPv4 headers.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_IP_BAD:
+ *                    The IPv4 checksum calculated by the device did
+ *                    not match the checksum in the receive packet's
+ *                    first IPv4 header. If the receive packet
+ *                    contains both a tunnel IPv4 header and a
+ *                    transport IPv4 header, the device validates the
+ *                    checksum for both IP headers.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_VLAN:
+ *                    The VLAN header was stripped and placed in @vlan_tci.
+ *
+ *                  IONIC_RXQ_COMP_CSUM_F_CALC:
+ *                    The checksum was calculated by the device.
+ *
+ * @pkt_type_color: Packet type and color bit; see IONIC_RXQ_COMP_PKT_TYPE_MASK
  */
 struct ionic_rxq_comp {
 	u8     status;
@@ -871,13 +988,21 @@ struct ionic_rxq_comp {
 };
 
 enum ionic_pkt_type {
-	IONIC_PKT_TYPE_NON_IP     = 0x000,
-	IONIC_PKT_TYPE_IPV4       = 0x001,
-	IONIC_PKT_TYPE_IPV4_TCP   = 0x003,
-	IONIC_PKT_TYPE_IPV4_UDP   = 0x005,
-	IONIC_PKT_TYPE_IPV6       = 0x008,
-	IONIC_PKT_TYPE_IPV6_TCP   = 0x018,
-	IONIC_PKT_TYPE_IPV6_UDP   = 0x028,
+	IONIC_PKT_TYPE_NON_IP		= 0x00,
+	IONIC_PKT_TYPE_IPV4		= 0x01,
+	IONIC_PKT_TYPE_IPV4_TCP		= 0x03,
+	IONIC_PKT_TYPE_IPV4_UDP		= 0x05,
+	IONIC_PKT_TYPE_IPV6		= 0x08,
+	IONIC_PKT_TYPE_IPV6_TCP		= 0x18,
+	IONIC_PKT_TYPE_IPV6_UDP		= 0x28,
+	/* below types are only used if encap offloads are enabled on lif */
+	IONIC_PKT_TYPE_ENCAP_NON_IP	= 0x40,
+	IONIC_PKT_TYPE_ENCAP_IPV4	= 0x41,
+	IONIC_PKT_TYPE_ENCAP_IPV4_TCP	= 0x43,
+	IONIC_PKT_TYPE_ENCAP_IPV4_UDP	= 0x45,
+	IONIC_PKT_TYPE_ENCAP_IPV6	= 0x48,
+	IONIC_PKT_TYPE_ENCAP_IPV6_TCP	= 0x58,
+	IONIC_PKT_TYPE_ENCAP_IPV6_UDP	= 0x68,
 };
 
 enum ionic_eth_hw_features {
@@ -894,10 +1019,13 @@ enum ionic_eth_hw_features {
 	IONIC_ETH_HW_TSO_ECN		= BIT(10),
 	IONIC_ETH_HW_TSO_GRE		= BIT(11),
 	IONIC_ETH_HW_TSO_GRE_CSUM	= BIT(12),
-	IONIC_ETH_HW_TSO_IPXIP4	= BIT(13),
-	IONIC_ETH_HW_TSO_IPXIP6	= BIT(14),
+	IONIC_ETH_HW_TSO_IPXIP4		= BIT(13),
+	IONIC_ETH_HW_TSO_IPXIP6		= BIT(14),
 	IONIC_ETH_HW_TSO_UDP		= BIT(15),
 	IONIC_ETH_HW_TSO_UDP_CSUM	= BIT(16),
+	IONIC_ETH_HW_RX_CSUM_GENEVE	= BIT(17),
+	IONIC_ETH_HW_TX_CSUM_GENEVE	= BIT(18),
+	IONIC_ETH_HW_TSO_GENEVE		= BIT(19)
 };
 
 /**
@@ -906,7 +1034,7 @@ enum ionic_eth_hw_features {
  * @type:       Queue type
  * @lif_index:  LIF index
  * @index:      Queue index
- * @oper:       Operation (enum q_control_oper)
+ * @oper:       Operation (enum ionic_q_control_oper)
  */
 struct ionic_q_control_cmd {
 	u8     opcode;
@@ -919,14 +1047,17 @@ struct ionic_q_control_cmd {
 
 typedef struct ionic_admin_comp ionic_q_control_comp;
 
-enum q_control_oper {
+enum ionic_q_control_oper {
 	IONIC_Q_DISABLE		= 0,
 	IONIC_Q_ENABLE		= 1,
 	IONIC_Q_HANG_RESET	= 2,
 };
 
 /**
- * Physical connection type
+ * enum ionic_phy_type - Physical connection type
+ * @IONIC_PHY_TYPE_NONE:    No PHY installed
+ * @IONIC_PHY_TYPE_COPPER:  Copper PHY
+ * @IONIC_PHY_TYPE_FIBER:   Fiber PHY
  */
 enum ionic_phy_type {
 	IONIC_PHY_TYPE_NONE	= 0,
@@ -935,18 +1066,23 @@ enum ionic_phy_type {
 };
 
 /**
- * Transceiver status
+ * enum ionic_xcvr_state - Transceiver status
+ * @IONIC_XCVR_STATE_REMOVED:        Transceiver removed
+ * @IONIC_XCVR_STATE_INSERTED:       Transceiver inserted
+ * @IONIC_XCVR_STATE_PENDING:        Transceiver pending
+ * @IONIC_XCVR_STATE_SPROM_READ:     Transceiver data read
+ * @IONIC_XCVR_STATE_SPROM_READ_ERR: Transceiver data read error
  */
 enum ionic_xcvr_state {
 	IONIC_XCVR_STATE_REMOVED	 = 0,
 	IONIC_XCVR_STATE_INSERTED	 = 1,
 	IONIC_XCVR_STATE_PENDING	 = 2,
 	IONIC_XCVR_STATE_SPROM_READ	 = 3,
-	IONIC_XCVR_STATE_SPROM_READ_ERR  = 4,
+	IONIC_XCVR_STATE_SPROM_READ_ERR	 = 4,
 };
 
 /**
- * Supported link modes
+ * enum ionic_xcvr_pid - Supported link modes
  */
 enum ionic_xcvr_pid {
 	IONIC_XCVR_PID_UNKNOWN           = 0,
@@ -980,67 +1116,74 @@ enum ionic_xcvr_pid {
 	IONIC_XCVR_PID_SFP_10GBASE_CU   = 68,
 	IONIC_XCVR_PID_QSFP_100G_CWDM4  = 69,
 	IONIC_XCVR_PID_QSFP_100G_PSM4   = 70,
+	IONIC_XCVR_PID_SFP_25GBASE_ACC  = 71,
 };
 
 /**
- * Port types
- */
-enum ionic_port_type {
-	IONIC_PORT_TYPE_NONE = 0,  /* port type not configured */
-	IONIC_PORT_TYPE_ETH  = 1,  /* port carries ethernet traffic (inband) */
-	IONIC_PORT_TYPE_MGMT = 2,  /* port carries mgmt traffic (out-of-band) */
-};
-
-/**
- * Port config state
+ * enum ionic_port_admin_state - Port config state
+ * @IONIC_PORT_ADMIN_STATE_NONE:    Port admin state not configured
+ * @IONIC_PORT_ADMIN_STATE_DOWN:    Port admin disabled
+ * @IONIC_PORT_ADMIN_STATE_UP:      Port admin enabled
  */
 enum ionic_port_admin_state {
-	IONIC_PORT_ADMIN_STATE_NONE = 0,   /* port admin state not configured */
-	IONIC_PORT_ADMIN_STATE_DOWN = 1,   /* port is admin disabled */
-	IONIC_PORT_ADMIN_STATE_UP   = 2,   /* port is admin enabled */
+	IONIC_PORT_ADMIN_STATE_NONE = 0,
+	IONIC_PORT_ADMIN_STATE_DOWN = 1,
+	IONIC_PORT_ADMIN_STATE_UP   = 2,
 };
 
 /**
- * Port operational status
+ * enum ionic_port_oper_status - Port operational status
+ * @IONIC_PORT_OPER_STATUS_NONE:    Port disabled
+ * @IONIC_PORT_OPER_STATUS_UP:      Port link status up
+ * @IONIC_PORT_OPER_STATUS_DOWN:    Port link status down
  */
 enum ionic_port_oper_status {
-	IONIC_PORT_OPER_STATUS_NONE  = 0,	/* port is disabled */
-	IONIC_PORT_OPER_STATUS_UP    = 1,	/* port is linked up */
-	IONIC_PORT_OPER_STATUS_DOWN  = 2,	/* port link status is down */
+	IONIC_PORT_OPER_STATUS_NONE  = 0,
+	IONIC_PORT_OPER_STATUS_UP    = 1,
+	IONIC_PORT_OPER_STATUS_DOWN  = 2,
 };
 
 /**
- * Ethernet Forward error correction (fec) modes
+ * enum ionic_port_fec_type - Ethernet Forward error correction (FEC) modes
+ * @IONIC_PORT_FEC_TYPE_NONE:       FEC Disabled
+ * @IONIC_PORT_FEC_TYPE_FC:         FireCode FEC
+ * @IONIC_PORT_FEC_TYPE_RS:         ReedSolomon FEC
  */
 enum ionic_port_fec_type {
-	IONIC_PORT_FEC_TYPE_NONE = 0,		/* Disabled */
-	IONIC_PORT_FEC_TYPE_FC   = 1,		/* FireCode */
-	IONIC_PORT_FEC_TYPE_RS   = 2,		/* ReedSolomon */
+	IONIC_PORT_FEC_TYPE_NONE = 0,
+	IONIC_PORT_FEC_TYPE_FC   = 1,
+	IONIC_PORT_FEC_TYPE_RS   = 2,
 };
 
 /**
- * Ethernet pause (flow control) modes
+ * enum ionic_port_pause_type - Ethernet pause (flow control) modes
+ * @IONIC_PORT_PAUSE_TYPE_NONE:     Disable Pause
+ * @IONIC_PORT_PAUSE_TYPE_LINK:     Link level pause
+ * @IONIC_PORT_PAUSE_TYPE_PFC:      Priority-Flow Control
  */
 enum ionic_port_pause_type {
-	IONIC_PORT_PAUSE_TYPE_NONE = 0,	/* Disable Pause */
-	IONIC_PORT_PAUSE_TYPE_LINK = 1,	/* Link level pause */
-	IONIC_PORT_PAUSE_TYPE_PFC  = 2,	/* Priority-Flow control */
+	IONIC_PORT_PAUSE_TYPE_NONE = 0,
+	IONIC_PORT_PAUSE_TYPE_LINK = 1,
+	IONIC_PORT_PAUSE_TYPE_PFC  = 2,
 };
 
 /**
- * Loopback modes
+ * enum ionic_port_loopback_mode - Loopback modes
+ * @IONIC_PORT_LOOPBACK_MODE_NONE:  Disable loopback
+ * @IONIC_PORT_LOOPBACK_MODE_MAC:   MAC loopback
+ * @IONIC_PORT_LOOPBACK_MODE_PHY:   PHY/SerDes loopback
  */
 enum ionic_port_loopback_mode {
-	IONIC_PORT_LOOPBACK_MODE_NONE = 0,	/* Disable loopback */
-	IONIC_PORT_LOOPBACK_MODE_MAC  = 1,	/* MAC loopback */
-	IONIC_PORT_LOOPBACK_MODE_PHY  = 2,	/* PHY/Serdes loopback */
+	IONIC_PORT_LOOPBACK_MODE_NONE = 0,
+	IONIC_PORT_LOOPBACK_MODE_MAC  = 1,
+	IONIC_PORT_LOOPBACK_MODE_PHY  = 2,
 };
 
 /**
- * Transceiver Status information
+ * struct ionic_xcvr_status - Transceiver Status information
  * @state:    Transceiver status (enum ionic_xcvr_state)
  * @phy:      Physical connection type (enum ionic_phy_type)
- * @pid:      Transceiver link mode (enum pid)
+ * @pid:      Transceiver link mode (enum ionic_xcvr_pid)
  * @sprom:    Transceiver sprom contents
  */
 struct ionic_xcvr_status {
@@ -1051,10 +1194,10 @@ struct ionic_xcvr_status {
 };
 
 /**
- * Port configuration
+ * union ionic_port_config - Port configuration
  * @speed:              port speed (in Mbps)
  * @mtu:                mtu
- * @state:              port admin state (enum port_admin_state)
+ * @state:              port admin state (enum ionic_port_admin_state)
  * @an_enable:          autoneg enable
  * @fec_type:           fec type (enum ionic_port_fec_type)
  * @pause_type:         pause type (enum ionic_port_pause_type)
@@ -1084,19 +1227,23 @@ union ionic_port_config {
 };
 
 /**
- * Port Status information
+ * struct ionic_port_status - Port Status information
  * @status:             link status (enum ionic_port_oper_status)
  * @id:                 port id
  * @speed:              link speed (in Mbps)
+ * @link_down_count:    number of times link went from up to down
+ * @fec_type:           fec type (enum ionic_port_fec_type)
  * @xcvr:               transceiver status
  */
 struct ionic_port_status {
 	__le32 id;
 	__le32 speed;
 	u8     status;
-	u8     rsvd[51];
+	__le16 link_down_count;
+	u8     fec_type;
+	u8     rsvd[48];
 	struct ionic_xcvr_status  xcvr;
-};
+} __rte_packed;
 
 /**
  * struct ionic_port_identify_cmd - Port identify command
@@ -1113,7 +1260,7 @@ struct ionic_port_identify_cmd {
 
 /**
  * struct ionic_port_identify_comp - Port identify command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_port_identify_comp {
@@ -1138,7 +1285,7 @@ struct ionic_port_init_cmd {
 
 /**
  * struct ionic_port_init_comp - Port initialization command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_port_init_comp {
 	u8 status;
@@ -1158,7 +1305,7 @@ struct ionic_port_reset_cmd {
 
 /**
  * struct ionic_port_reset_comp - Port reset command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  */
 struct ionic_port_reset_comp {
 	u8 status;
@@ -1166,15 +1313,23 @@ struct ionic_port_reset_comp {
 };
 
 /**
- * enum stats_ctl_cmd - List of commands for stats control
+ * enum ionic_stats_ctl_cmd - List of commands for stats control
+ * @IONIC_STATS_CTL_RESET:      Reset statistics
  */
 enum ionic_stats_ctl_cmd {
 	IONIC_STATS_CTL_RESET		= 0,
 };
 
-
 /**
  * enum ionic_port_attr - List of device attributes
+ * @IONIC_PORT_ATTR_STATE:      Port state attribute
+ * @IONIC_PORT_ATTR_SPEED:      Port speed attribute
+ * @IONIC_PORT_ATTR_MTU:        Port MTU attribute
+ * @IONIC_PORT_ATTR_AUTONEG:    Port autonegotiation attribute
+ * @IONIC_PORT_ATTR_FEC:        Port FEC attribute
+ * @IONIC_PORT_ATTR_PAUSE:      Port pause attribute
+ * @IONIC_PORT_ATTR_LOOPBACK:   Port loopback attribute
+ * @IONIC_PORT_ATTR_STATS_CTRL: Port statistics control attribute
  */
 enum ionic_port_attr {
 	IONIC_PORT_ATTR_STATE		= 0,
@@ -1189,9 +1344,17 @@ enum ionic_port_attr {
 
 /**
  * struct ionic_port_setattr_cmd - Set port attributes on the NIC
- * @opcode:     Opcode
- * @index:      port index
- * @attr:       Attribute type (enum ionic_port_attr)
+ * @opcode:         Opcode
+ * @index:          Port index
+ * @attr:           Attribute type (enum ionic_port_attr)
+ * @state:          Port state
+ * @speed:          Port speed
+ * @mtu:            Port MTU
+ * @an_enable:      Port autonegotiation setting
+ * @fec_type:       Port FEC type setting
+ * @pause_type:     Port pause type setting
+ * @loopback_mode:  Port loopback mode
+ * @stats_ctl:      Port stats setting
  */
 struct ionic_port_setattr_cmd {
 	u8     opcode;
@@ -1206,14 +1369,14 @@ struct ionic_port_setattr_cmd {
 		u8      fec_type;
 		u8      pause_type;
 		u8      loopback_mode;
-		u8	stats_ctl;
+		u8      stats_ctl;
 		u8      rsvd2[60];
 	};
 };
 
 /**
  * struct ionic_port_setattr_comp - Port set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @color:      Color bit
  */
 struct ionic_port_setattr_comp {
@@ -1237,8 +1400,15 @@ struct ionic_port_getattr_cmd {
 
 /**
  * struct ionic_port_getattr_comp - Port get attr command completion
- * @status:     The status of the command (enum status_code)
- * @color:      Color bit
+ * @status:         Status of the command (enum ionic_status_code)
+ * @state:          Port state
+ * @speed:          Port speed
+ * @mtu:            Port MTU
+ * @an_enable:      Port autonegotiation setting
+ * @fec_type:       Port FEC type setting
+ * @pause_type:     Port pause type setting
+ * @loopback_mode:  Port loopback mode
+ * @color:          Color bit
  */
 struct ionic_port_getattr_comp {
 	u8     status;
@@ -1252,17 +1422,17 @@ struct ionic_port_getattr_comp {
 		u8      pause_type;
 		u8      loopback_mode;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
 /**
- * struct ionic_lif_status - Lif status register
+ * struct ionic_lif_status - LIF status register
  * @eid:             most recent NotifyQ event id
- * @port_num:        port the lif is connected to
+ * @port_num:        port the LIF is connected to
  * @link_status:     port status (enum ionic_port_oper_status)
  * @link_speed:      speed of link in Mbps
- * @link_down_count: number of times link status changes
+ * @link_down_count: number of times link went from up to down
  */
 struct ionic_lif_status {
 	__le64 eid;
@@ -1296,6 +1466,9 @@ enum ionic_dev_state {
 
 /**
  * enum ionic_dev_attr - List of device attributes
+ * @IONIC_DEV_ATTR_STATE:     Device state attribute
+ * @IONIC_DEV_ATTR_NAME:      Device name attribute
+ * @IONIC_DEV_ATTR_FEATURES:  Device feature attributes
  */
 enum ionic_dev_attr {
 	IONIC_DEV_ATTR_STATE    = 0,
@@ -1320,12 +1493,12 @@ struct ionic_dev_setattr_cmd {
 		char    name[IONIC_IFNAMSIZ];
 		__le64  features;
 		u8      rsvd2[60];
-	};
+	} __rte_packed;
 };
 
 /**
  * struct ionic_dev_setattr_comp - Device set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @features:   Device features
  * @color:      Color bit
  */
@@ -1335,7 +1508,7 @@ struct ionic_dev_setattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1352,7 +1525,7 @@ struct ionic_dev_getattr_cmd {
 
 /**
  * struct ionic_dev_setattr_comp - Device set attr command completion
- * @status:     The status of the command (enum status_code)
+ * @status:     Status of the command (enum ionic_status_code)
  * @features:   Device features
  * @color:      Color bit
  */
@@ -1362,7 +1535,7 @@ struct ionic_dev_getattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1382,6 +1555,13 @@ enum ionic_rss_hash_types {
 
 /**
  * enum ionic_lif_attr - List of LIF attributes
+ * @IONIC_LIF_ATTR_STATE:       LIF state attribute
+ * @IONIC_LIF_ATTR_NAME:        LIF name attribute
+ * @IONIC_LIF_ATTR_MTU:         LIF MTU attribute
+ * @IONIC_LIF_ATTR_MAC:         LIF MAC attribute
+ * @IONIC_LIF_ATTR_FEATURES:    LIF features attribute
+ * @IONIC_LIF_ATTR_RSS:         LIF RSS attribute
+ * @IONIC_LIF_ATTR_STATS_CTRL:  LIF statistics control attribute
  */
 enum ionic_lif_attr {
 	IONIC_LIF_ATTR_STATE        = 0,
@@ -1396,18 +1576,18 @@ enum ionic_lif_attr {
 /**
  * struct ionic_lif_setattr_cmd - Set LIF attributes on the NIC
  * @opcode:     Opcode
- * @type:       Attribute type (enum ionic_lif_attr)
+ * @attr:       Attribute type (enum ionic_lif_attr)
  * @index:      LIF index
- * @state:      lif state (enum lif_state)
+ * @state:      LIF state (enum ionic_lif_state)
  * @name:       The netdev name string, 0 terminated
  * @mtu:        Mtu
  * @mac:        Station mac
  * @features:   Features (enum ionic_eth_hw_features)
  * @rss:        RSS properties
- *              @types:     The hash types to enable (see rss_hash_types).
- *              @key:       The hash secret key.
- *              @addr:      Address for the indirection table shared memory.
- * @stats_ctl:  stats control commands (enum stats_ctl_cmd)
+ *              @types:     The hash types to enable (see rss_hash_types)
+ *              @key:       The hash secret key
+ *              @addr:      Address for the indirection table shared memory
+ * @stats_ctl:  stats control commands (enum ionic_stats_ctl_cmd)
  */
 struct ionic_lif_setattr_cmd {
 	u8     opcode;
@@ -1425,16 +1605,15 @@ struct ionic_lif_setattr_cmd {
 			u8     rsvd[6];
 			__le64 addr;
 		} rss;
-		u8	stats_ctl;
+		u8      stats_ctl;
 		u8      rsvd[60];
-	};
+	} __rte_packed;
 };
 
 /**
  * struct ionic_lif_setattr_comp - LIF set attr command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @features:   features (enum ionic_eth_hw_features)
  * @color:      Color bit
  */
@@ -1445,7 +1624,7 @@ struct ionic_lif_setattr_comp {
 	union {
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
@@ -1464,10 +1643,9 @@ struct ionic_lif_getattr_cmd {
 
 /**
  * struct ionic_lif_getattr_comp - LIF get attr command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
- * @state:      lif state (enum lif_state)
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @state:      LIF state (enum ionic_lif_state)
  * @name:       The netdev name string, 0 terminated
  * @mtu:        Mtu
  * @mac:        Station mac
@@ -1484,16 +1662,17 @@ struct ionic_lif_getattr_comp {
 		u8      mac[6];
 		__le64  features;
 		u8      rsvd2[11];
-	};
+	} __rte_packed;
 	u8     color;
 };
 
 enum ionic_rx_mode {
-	IONIC_RX_MODE_F_UNICAST    = BIT(0),
-	IONIC_RX_MODE_F_MULTICAST  = BIT(1),
-	IONIC_RX_MODE_F_BROADCAST  = BIT(2),
-	IONIC_RX_MODE_F_PROMISC    = BIT(3),
-	IONIC_RX_MODE_F_ALLMULTI   = BIT(4),
+	IONIC_RX_MODE_F_UNICAST		= BIT(0),
+	IONIC_RX_MODE_F_MULTICAST	= BIT(1),
+	IONIC_RX_MODE_F_BROADCAST	= BIT(2),
+	IONIC_RX_MODE_F_PROMISC		= BIT(3),
+	IONIC_RX_MODE_F_ALLMULTI	= BIT(4),
+	IONIC_RX_MODE_F_RDMA_SNIFFER	= BIT(5),
 };
 
 /**
@@ -1501,11 +1680,12 @@ enum ionic_rx_mode {
  * @opcode:     opcode
  * @lif_index:  LIF index
  * @rx_mode:    Rx mode flags:
- *                  IONIC_RX_MODE_F_UNICAST: Accept known unicast packets.
- *                  IONIC_RX_MODE_F_MULTICAST: Accept known multicast packets.
- *                  IONIC_RX_MODE_F_BROADCAST: Accept broadcast packets.
- *                  IONIC_RX_MODE_F_PROMISC: Accept any packets.
- *                  IONIC_RX_MODE_F_ALLMULTI: Accept any multicast packets.
+ *                  IONIC_RX_MODE_F_UNICAST: Accept known unicast packets
+ *                  IONIC_RX_MODE_F_MULTICAST: Accept known multicast packets
+ *                  IONIC_RX_MODE_F_BROADCAST: Accept broadcast packets
+ *                  IONIC_RX_MODE_F_PROMISC: Accept any packets
+ *                  IONIC_RX_MODE_F_ALLMULTI: Accept any multicast packets
+ *                  IONIC_RX_MODE_F_RDMA_SNIFFER: Sniff RDMA packets
  */
 struct ionic_rx_mode_set_cmd {
 	u8     opcode;
@@ -1529,9 +1709,14 @@ enum ionic_rx_filter_match_type {
  * @qtype:      Queue type
  * @lif_index:  LIF index
  * @qid:        Queue ID
- * @match:      Rx filter match type.  (See IONIC_RX_FILTER_MATCH_xxx)
- * @vlan:       VLAN ID
- * @addr:       MAC address (network-byte order)
+ * @match:      Rx filter match type (see IONIC_RX_FILTER_MATCH_xxx)
+ * @vlan:       VLAN filter
+ *              @vlan:  VLAN ID
+ * @mac:        MAC filter
+ *              @addr:  MAC address (network-byte order)
+ * @mac_vlan:   MACVLAN filter
+ *              @vlan:  VLAN ID
+ *              @addr:  MAC address (network-byte order)
  */
 struct ionic_rx_filter_add_cmd {
 	u8     opcode;
@@ -1556,11 +1741,10 @@ struct ionic_rx_filter_add_cmd {
 
 /**
  * struct ionic_rx_filter_add_comp - Add LIF Rx filter command completion
- * @status:     The status of the command (enum status_code)
- * @comp_index: The index in the descriptor ring for which this
- *              is the completion.
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
  * @filter_id:  Filter ID
- * @color:      Color bit.
+ * @color:      Color bit
  */
 struct ionic_rx_filter_add_comp {
 	u8     status;
@@ -1587,9 +1771,99 @@ struct ionic_rx_filter_del_cmd {
 
 typedef struct ionic_admin_comp ionic_rx_filter_del_comp;
 
+enum ionic_vf_attr {
+	IONIC_VF_ATTR_SPOOFCHK	= 1,
+	IONIC_VF_ATTR_TRUST	= 2,
+	IONIC_VF_ATTR_MAC	= 3,
+	IONIC_VF_ATTR_LINKSTATE	= 4,
+	IONIC_VF_ATTR_VLAN	= 5,
+	IONIC_VF_ATTR_RATE	= 6,
+	IONIC_VF_ATTR_STATSADDR	= 7,
+};
+
+/**
+ * enum ionic_vf_link_status - Virtual Function link status
+ * @IONIC_VF_LINK_STATUS_AUTO:   Use link state of the uplink
+ * @IONIC_VF_LINK_STATUS_UP:     Link always up
+ * @IONIC_VF_LINK_STATUS_DOWN:   Link always down
+ */
+enum ionic_vf_link_status {
+	IONIC_VF_LINK_STATUS_AUTO = 0,
+	IONIC_VF_LINK_STATUS_UP   = 1,
+	IONIC_VF_LINK_STATUS_DOWN = 2,
+};
+
+/**
+ * struct ionic_vf_setattr_cmd - Set VF attributes on the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_vf_attr)
+ * @vf_index:   VF index
+ *	@macaddr:	mac address
+ *	@vlanid:	vlan ID
+ *	@maxrate:	max Tx rate in Mbps
+ *	@spoofchk:	enable address spoof checking
+ *	@trust:		enable VF trust
+ *	@linkstate:	set link up or down
+ *	@stats_pa:	set DMA address for VF stats
+ */
+struct ionic_vf_setattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 vf_index;
+	union {
+		u8     macaddr[6];
+		__le16 vlanid;
+		__le32 maxrate;
+		u8     spoofchk;
+		u8     trust;
+		u8     linkstate;
+		__le64 stats_pa;
+		u8     pad[60];
+	} __rte_packed;
+};
+
+struct ionic_vf_setattr_comp {
+	u8     status;
+	u8     attr;
+	__le16 vf_index;
+	__le16 comp_index;
+	u8     rsvd[9];
+	u8     color;
+};
+
+/**
+ * struct ionic_vf_getattr_cmd - Get VF attributes from the NIC
+ * @opcode:     Opcode
+ * @attr:       Attribute type (enum ionic_vf_attr)
+ * @vf_index:   VF index
+ */
+struct ionic_vf_getattr_cmd {
+	u8     opcode;
+	u8     attr;
+	__le16 vf_index;
+	u8     rsvd[60];
+};
+
+struct ionic_vf_getattr_comp {
+	u8     status;
+	u8     attr;
+	__le16 vf_index;
+	union {
+		u8     macaddr[6];
+		__le16 vlanid;
+		__le32 maxrate;
+		u8     spoofchk;
+		u8     trust;
+		u8     linkstate;
+		__le64 stats_pa;
+		u8     pad[11];
+	} __rte_packed;
+	u8     color;
+};
+
 /**
  * struct ionic_qos_identify_cmd - QoS identify command
- * @opcode:    opcode
+ * @opcode:  opcode
  * @ver:     Highest version of identify supported by driver
  *
  */
@@ -1601,7 +1875,7 @@ struct ionic_qos_identify_cmd {
 
 /**
  * struct ionic_qos_identify_comp - QoS identify command completion
- * @status: The status of the command (enum status_code)
+ * @status: Status of the command (enum ionic_status_code)
  * @ver:    Version of identify returned by device
  */
 struct ionic_qos_identify_comp {
@@ -1610,9 +1884,15 @@ struct ionic_qos_identify_comp {
 	u8 rsvd[14];
 };
 
+#define IONIC_QOS_TC_MAX		8
+#define IONIC_QOS_ALL_TC		0xFF
+/* Capri max supported, should be renamed. */
 #define IONIC_QOS_CLASS_MAX		7
-#define IONIC_QOS_CLASS_NAME_SZ		32
-#define IONIC_QOS_DSCP_MAX_VALUES	64
+#define IONIC_QOS_PCP_MAX		8
+#define IONIC_QOS_CLASS_NAME_SZ	32
+#define IONIC_QOS_DSCP_MAX		64
+#define IONIC_QOS_ALL_PCP		0xFF
+#define IONIC_DSCP_BLOCK_SIZE		8
 
 /**
  * enum ionic_qos_class
@@ -1629,42 +1909,44 @@ enum ionic_qos_class {
 
 /**
  * enum ionic_qos_class_type - Traffic classification criteria
+ * @IONIC_QOS_CLASS_TYPE_NONE:    No QoS
+ * @IONIC_QOS_CLASS_TYPE_PCP:     Dot1Q PCP
+ * @IONIC_QOS_CLASS_TYPE_DSCP:    IP DSCP
  */
 enum ionic_qos_class_type {
 	IONIC_QOS_CLASS_TYPE_NONE	= 0,
-	IONIC_QOS_CLASS_TYPE_PCP	= 1,	/* Dot1Q pcp */
-	IONIC_QOS_CLASS_TYPE_DSCP	= 2,	/* IP dscp */
+	IONIC_QOS_CLASS_TYPE_PCP	= 1,
+	IONIC_QOS_CLASS_TYPE_DSCP	= 2,
 };
 
 /**
- * enum ionic_qos_sched_type - Qos class scheduling type
+ * enum ionic_qos_sched_type - QoS class scheduling type
+ * @IONIC_QOS_SCHED_TYPE_STRICT:  Strict priority
+ * @IONIC_QOS_SCHED_TYPE_DWRR:    Deficit weighted round-robin
  */
 enum ionic_qos_sched_type {
-	/* Strict priority */
 	IONIC_QOS_SCHED_TYPE_STRICT	= 0,
-	/* Deficit weighted round-robin */
 	IONIC_QOS_SCHED_TYPE_DWRR	= 1,
 };
 
 /**
- * union ionic_qos_config - Qos configuration structure
+ * union ionic_qos_config - QoS configuration structure
  * @flags:		Configuration flags
  *	IONIC_QOS_CONFIG_F_ENABLE		enable
- *	IONIC_QOS_CONFIG_F_DROP			drop/nodrop
+ *	IONIC_QOS_CONFIG_F_NO_DROP		drop/nodrop
  *	IONIC_QOS_CONFIG_F_RW_DOT1Q_PCP		enable dot1q pcp rewrite
  *	IONIC_QOS_CONFIG_F_RW_IP_DSCP		enable ip dscp rewrite
- * @sched_type:		Qos class scheduling type (enum ionic_qos_sched_type)
- * @class_type:		Qos class type (enum ionic_qos_class_type)
- * @pause_type:		Qos pause type (enum qos_pause_type)
- * @name:		Qos class name
+ *	IONIC_QOS_CONFIG_F_NON_DISRUPTIVE	Non-disruptive TC update
+ * @sched_type:		QoS class scheduling type (enum ionic_qos_sched_type)
+ * @class_type:		QoS class type (enum ionic_qos_class_type)
+ * @pause_type:		QoS pause type (enum ionic_qos_pause_type)
+ * @name:		QoS class name
  * @mtu:		MTU of the class
- * @pfc_dot1q_pcp:	Pcp value for pause frames (valid iff F_NODROP)
- * @dwrr_weight:	Qos class scheduling weight
+ * @pfc_cos:		Priority-Flow Control class of service
+ * @dwrr_weight:	QoS class scheduling weight
  * @strict_rlmt:	Rate limit for strict priority scheduling
- * @rw_dot1q_pcp:	Rewrite dot1q pcp to this value
- *			(valid iff F_RW_DOT1Q_PCP)
- * @rw_ip_dscp:		Rewrite ip dscp to this value
- *			(valid iff F_RW_IP_DSCP)
+ * @rw_dot1q_pcp:	Rewrite dot1q pcp to value (valid iff F_RW_DOT1Q_PCP)
+ * @rw_ip_dscp:		Rewrite ip dscp to value (valid iff F_RW_IP_DSCP)
  * @dot1q_pcp:		Dot1q pcp value
  * @ndscp:		Number of valid dscp values in the ip_dscp field
  * @ip_dscp:		IP dscp values
@@ -1672,9 +1954,12 @@ enum ionic_qos_sched_type {
 union ionic_qos_config {
 	struct {
 #define IONIC_QOS_CONFIG_F_ENABLE		BIT(0)
-#define IONIC_QOS_CONFIG_F_DROP			BIT(1)
+#define IONIC_QOS_CONFIG_F_NO_DROP		BIT(1)
+/* Used to rewrite PCP or DSCP value. */
 #define IONIC_QOS_CONFIG_F_RW_DOT1Q_PCP		BIT(2)
 #define IONIC_QOS_CONFIG_F_RW_IP_DSCP		BIT(3)
+/* Non-disruptive TC update */
+#define IONIC_QOS_CONFIG_F_NON_DISRUPTIVE	BIT(4)
 		u8      flags;
 		u8      sched_type;
 		u8      class_type;
@@ -1689,6 +1974,7 @@ union ionic_qos_config {
 			__le64  strict_rlmt;
 		};
 		/* marking */
+		/* Used to rewrite PCP or DSCP value. */
 		union {
 			u8      rw_dot1q_pcp;
 			u8      rw_ip_dscp;
@@ -1698,10 +1984,10 @@ union ionic_qos_config {
 			u8      dot1q_pcp;
 			struct {
 				u8      ndscp;
-				u8      ip_dscp[IONIC_QOS_DSCP_MAX_VALUES];
+				u8      ip_dscp[IONIC_QOS_DSCP_MAX];
 			};
 		};
-	};
+	} __rte_packed;
 	__le32  words[64];
 };
 
@@ -1717,15 +2003,15 @@ union ionic_qos_identity {
 		u8     version;
 		u8     type;
 		u8     rsvd[62];
-		union  ionic_qos_config config[IONIC_QOS_CLASS_MAX];
+		union ionic_qos_config config[IONIC_QOS_CLASS_MAX];
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
- * struct qos_init_cmd - QoS config init command
+ * struct ionic_qos_init_cmd - QoS config init command
  * @opcode:	Opcode
- * @group:	Qos class id
+ * @group:	QoS class id
  * @info_pa:	destination address for qos info
  */
 struct ionic_qos_init_cmd {
@@ -1739,8 +2025,9 @@ struct ionic_qos_init_cmd {
 typedef struct ionic_admin_comp ionic_qos_init_comp;
 
 /**
- * struct ionic_qos_reset_cmd - Qos config reset command
+ * struct ionic_qos_reset_cmd - QoS config reset command
  * @opcode:	Opcode
+ * @group:	QoS class id
  */
 struct ionic_qos_reset_cmd {
 	u8    opcode;
@@ -1748,6 +2035,16 @@ struct ionic_qos_reset_cmd {
 	u8    rsvd[62];
 };
 
+/**
+ * struct ionic_qos_clear_port_stats_cmd - Qos config reset command
+ * @opcode:	Opcode
+ */
+struct ionic_qos_clear_stats_cmd {
+	u8    opcode;
+	u8    group_bitmap;
+	u8    rsvd[62];
+};
+
 typedef struct ionic_admin_comp ionic_qos_reset_comp;
 
 /**
@@ -1767,10 +2064,16 @@ struct ionic_fw_download_cmd {
 
 typedef struct ionic_admin_comp ionic_fw_download_comp;
 
+/**
+ * enum ionic_fw_control_oper - FW control operations
+ * @IONIC_FW_RESET:     Reset firmware
+ * @IONIC_FW_INSTALL:   Install firmware
+ * @IONIC_FW_ACTIVATE:  Acticate firmware
+ */
 enum ionic_fw_control_oper {
-	IONIC_FW_RESET		= 0,	/* Reset firmware */
-	IONIC_FW_INSTALL	= 1,	/* Install firmware */
-	IONIC_FW_ACTIVATE	= 2,	/* Activate firmware */
+	IONIC_FW_RESET		= 0,
+	IONIC_FW_INSTALL	= 1,
+	IONIC_FW_ACTIVATE	= 2,
 };
 
 /**
@@ -1789,8 +2092,10 @@ struct ionic_fw_control_cmd {
 
 /**
  * struct ionic_fw_control_comp - Firmware control copletion
- * @opcode:    opcode
- * @slot:      slot where the firmware was installed
+ * @status:     Status of the command (enum ionic_status_code)
+ * @comp_index: Index in the descriptor ring for which this is the completion
+ * @slot:       Slot where the firmware was installed
+ * @color:      Color bit
  */
 struct ionic_fw_control_comp {
 	u8     status;
@@ -1808,11 +2113,11 @@ struct ionic_fw_control_comp {
 /**
  * struct ionic_rdma_reset_cmd - Reset RDMA LIF cmd
  * @opcode:        opcode
- * @lif_index:     lif index
+ * @lif_index:     LIF index
  *
- * There is no rdma specific dev command completion struct.  Completion uses
+ * There is no RDMA specific dev command completion struct.  Completion uses
  * the common struct ionic_admin_comp.  Only the status is indicated.
- * Nonzero status means the LIF does not support rdma.
+ * Nonzero status means the LIF does not support RDMA.
  **/
 struct ionic_rdma_reset_cmd {
 	u8     opcode;
@@ -1824,30 +2129,29 @@ struct ionic_rdma_reset_cmd {
 /**
  * struct ionic_rdma_queue_cmd - Create RDMA Queue command
  * @opcode:        opcode, 52, 53
- * @lif_index      lif index
- * @qid_ver:       (qid | (rdma version << 24))
+ * @lif_index:     LIF index
+ * @qid_ver:       (qid | (RDMA version << 24))
  * @cid:           intr, eq_id, or cq_id
  * @dbid:          doorbell page id
  * @depth_log2:    log base two of queue depth
  * @stride_log2:   log base two of queue stride
  * @dma_addr:      address of the queue memory
- * @xxx_table_index: temporary, but should not need pgtbl for contig. queues.
  *
- * The same command struct is used to create an rdma event queue, completion
- * queue, or rdma admin queue.  The cid is an interrupt number for an event
+ * The same command struct is used to create an RDMA event queue, completion
+ * queue, or RDMA admin queue.  The cid is an interrupt number for an event
  * queue, an event queue id for a completion queue, or a completion queue id
- * for an rdma admin queue.
+ * for an RDMA admin queue.
  *
  * The queue created via a dev command must be contiguous in dma space.
  *
  * The dev commands are intended only to be used during driver initialization,
- * to create queues supporting the rdma admin queue.  Other queues, and other
- * types of rdma resources like memory regions, will be created and registered
- * via the rdma admin queue, and will support a more complete interface
+ * to create queues supporting the RDMA admin queue.  Other queues, and other
+ * types of RDMA resources like memory regions, will be created and registered
+ * via the RDMA admin queue, and will support a more complete interface
  * providing scatter gather lists for larger, scattered queue buffers and
  * memory registration.
  *
- * There is no rdma specific dev command completion struct.  Completion uses
+ * There is no RDMA specific dev command completion struct.  Completion uses
  * the common struct ionic_admin_comp.  Only the status is indicated.
  **/
 struct ionic_rdma_queue_cmd {
@@ -1860,8 +2164,7 @@ struct ionic_rdma_queue_cmd {
 	u8     depth_log2;
 	u8     stride_log2;
 	__le64 dma_addr;
-	u8     rsvd2[36];
-	__le32 xxx_table_index;
+	u8     rsvd2[40];
 };
 
 /******************************************************************
@@ -1869,7 +2172,7 @@ struct ionic_rdma_queue_cmd {
  ******************************************************************/
 
 /**
- * struct ionic_notifyq_event
+ * struct ionic_notifyq_event - Generic event reporting structure
  * @eid:   event number
  * @ecode: event code
  * @data:  unspecified data about the event
@@ -1884,10 +2187,10 @@ struct ionic_notifyq_event {
 };
 
 /**
- * struct ionic_link_change_event
+ * struct ionic_link_change_event - Link change event notification
  * @eid:		event number
- * @ecode:		event code = EVENT_OPCODE_LINK_CHANGE
- * @link_status:	link up or down, with error bits (enum port_status)
+ * @ecode:		event code = IONIC_EVENT_LINK_CHANGE
+ * @link_status:	link up/down, with error bits (enum ionic_port_status)
  * @link_speed:		speed of the network link
  *
  * Sent when the network link state changes between UP and DOWN
@@ -1901,9 +2204,9 @@ struct ionic_link_change_event {
 };
 
 /**
- * struct ionic_reset_event
+ * struct ionic_reset_event - Reset event notification
  * @eid:		event number
- * @ecode:		event code = EVENT_OPCODE_RESET
+ * @ecode:		event code = IONIC_EVENT_RESET
  * @reset_code:		reset type
  * @state:		0=pending, 1=complete, 2=error
  *
@@ -1919,11 +2222,9 @@ struct ionic_reset_event {
 };
 
 /**
- * struct ionic_heartbeat_event
+ * struct ionic_heartbeat_event - Sent periodically by NIC to indicate health
  * @eid:	event number
- * @ecode:	event code = EVENT_OPCODE_HEARTBEAT
- *
- * Sent periodically by the NIC to indicate continued health
+ * @ecode:	event code = IONIC_EVENT_HEARTBEAT
  */
 struct ionic_heartbeat_event {
 	__le64 eid;
@@ -1932,12 +2233,10 @@ struct ionic_heartbeat_event {
 };
 
 /**
- * struct ionic_log_event
+ * struct ionic_log_event - Sent to notify the driver of an internal error
  * @eid:	event number
- * @ecode:	event code = EVENT_OPCODE_LOG
+ * @ecode:	event code = IONIC_EVENT_LOG
  * @data:	log data
- *
- * Sent to notify the driver of an internal error.
  */
 struct ionic_log_event {
 	__le64 eid;
@@ -1946,7 +2245,18 @@ struct ionic_log_event {
 };
 
 /**
- * struct ionic_port_stats
+ * struct ionic_xcvr_event - Transceiver change event
+ * @eid:	event number
+ * @ecode:	event code = IONIC_EVENT_XCVR
+ */
+struct ionic_xcvr_event {
+	__le64 eid;
+	__le16 ecode;
+	u8     rsvd[54];
+};
+
+/**
+ * struct ionic_port_stats - Port statistics structure
  */
 struct ionic_port_stats {
 	__le64 frames_rx_ok;
@@ -2051,34 +2361,109 @@ struct ionic_mgmt_port_stats {
 	__le64 frames_rx_multicast;
 	__le64 frames_rx_broadcast;
 	__le64 frames_rx_pause;
-	__le64 frames_rx_bad_length0;
-	__le64 frames_rx_undersized1;
-	__le64 frames_rx_oversized2;
-	__le64 frames_rx_fragments3;
-	__le64 frames_rx_jabber4;
-	__le64 frames_rx_64b5;
-	__le64 frames_rx_65b_127b6;
-	__le64 frames_rx_128b_255b7;
-	__le64 frames_rx_256b_511b8;
-	__le64 frames_rx_512b_1023b9;
-	__le64 frames_rx_1024b_1518b0;
-	__le64 frames_rx_gt_1518b1;
-	__le64 frames_rx_fifo_full2;
-	__le64 frames_tx_ok3;
-	__le64 frames_tx_all4;
-	__le64 frames_tx_bad5;
-	__le64 octets_tx_ok6;
-	__le64 octets_tx_total7;
-	__le64 frames_tx_unicast8;
-	__le64 frames_tx_multicast9;
-	__le64 frames_tx_broadcast0;
-	__le64 frames_tx_pause1;
+	__le64 frames_rx_bad_length;
+	__le64 frames_rx_undersized;
+	__le64 frames_rx_oversized;
+	__le64 frames_rx_fragments;
+	__le64 frames_rx_jabber;
+	__le64 frames_rx_64b;
+	__le64 frames_rx_65b_127b;
+	__le64 frames_rx_128b_255b;
+	__le64 frames_rx_256b_511b;
+	__le64 frames_rx_512b_1023b;
+	__le64 frames_rx_1024b_1518b;
+	__le64 frames_rx_gt_1518b;
+	__le64 frames_rx_fifo_full;
+	__le64 frames_tx_ok;
+	__le64 frames_tx_all;
+	__le64 frames_tx_bad;
+	__le64 octets_tx_ok;
+	__le64 octets_tx_total;
+	__le64 frames_tx_unicast;
+	__le64 frames_tx_multicast;
+	__le64 frames_tx_broadcast;
+	__le64 frames_tx_pause;
+};
+
+enum ionic_pb_buffer_drop_stats {
+	IONIC_BUFFER_INTRINSIC_DROP = 0,
+	IONIC_BUFFER_DISCARDED,
+	IONIC_BUFFER_ADMITTED,
+	IONIC_BUFFER_OUT_OF_CELLS_DROP,
+	IONIC_BUFFER_OUT_OF_CELLS_DROP_2,
+	IONIC_BUFFER_OUT_OF_CREDIT_DROP,
+	IONIC_BUFFER_TRUNCATION_DROP,
+	IONIC_BUFFER_PORT_DISABLED_DROP,
+	IONIC_BUFFER_COPY_TO_CPU_TAIL_DROP,
+	IONIC_BUFFER_SPAN_TAIL_DROP,
+	IONIC_BUFFER_MIN_SIZE_VIOLATION_DROP,
+	IONIC_BUFFER_ENQUEUE_ERROR_DROP,
+	IONIC_BUFFER_INVALID_PORT_DROP,
+	IONIC_BUFFER_INVALID_OUTPUT_QUEUE_DROP,
+	IONIC_BUFFER_DROP_MAX,
+};
+
+enum ionic_oflow_drop_stats {
+	IONIC_OFLOW_OCCUPANCY_DROP,
+	IONIC_OFLOW_EMERGENCY_STOP_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_ACK_FILL_UP_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_ACK_FULL_DROP,
+	IONIC_OFLOW_WRITE_BUFFER_FULL_DROP,
+	IONIC_OFLOW_CONTROL_FIFO_FULL_DROP,
+	IONIC_OFLOW_DROP_MAX,
+};
+
+/**
+ * struct port_pb_stats - packet buffers system stats
+ * uses ionic_pb_buffer_drop_stats for drop_counts[]
+ */
+struct ionic_port_pb_stats {
+	__le64 sop_count_in;
+	__le64 eop_count_in;
+	__le64 sop_count_out;
+	__le64 eop_count_out;
+	__le64 drop_counts[IONIC_BUFFER_DROP_MAX];
+	__le64 input_queue_buffer_occupancy[IONIC_QOS_TC_MAX];
+	__le64 input_queue_port_monitor[IONIC_QOS_TC_MAX];
+	__le64 output_queue_port_monitor[IONIC_QOS_TC_MAX];
+	__le64 oflow_drop_counts[IONIC_OFLOW_DROP_MAX];
+	__le64 input_queue_good_pkts_in[IONIC_QOS_TC_MAX];
+	__le64 input_queue_good_pkts_out[IONIC_QOS_TC_MAX];
+	__le64 input_queue_err_pkts_in[IONIC_QOS_TC_MAX];
+	__le64 input_queue_fifo_depth[IONIC_QOS_TC_MAX];
+	__le64 input_queue_max_fifo_depth[IONIC_QOS_TC_MAX];
+	__le64 input_queue_peak_occupancy[IONIC_QOS_TC_MAX];
+	__le64 output_queue_buffer_occupancy[IONIC_QOS_TC_MAX];
+};
+
+/**
+ * enum ionic_port_type - Port types
+ * @IONIC_ETH_UNKNOWN:             Port type not configured
+ * @IONIC_ETH_HOST:                Port carries ethernet traffic (inband)
+ * @IONIC_ETH_HOST_MGMT:           Port carries mgmt traffic (out-of-band)
+ * @IONIC_ETH_MNIC_OOB_MGMT:
+ * @IONIC_ETH_MNIC_INTERNAL_MGMT:
+ * @IONIC_ETH_MNIC_INBAND_MGMT:
+ * @IONIC_ETH_MNIC_CPU:
+ * @IONIC_ETH_MNIC_LEARN:
+ * @IONIC_ETH_MNIC_CONTROL:
+ */
+enum ionic_port_type {
+	IONIC_ETH_UNKNOWN,
+	IONIC_ETH_HOST,
+	IONIC_ETH_HOST_MGMT,
+	IONIC_ETH_MNIC_OOB_MGMT,
+	IONIC_ETH_MNIC_INTERNAL_MGMT,
+	IONIC_ETH_MNIC_INBAND_MGMT,
+	IONIC_ETH_MNIC_CPU,
+	IONIC_ETH_MNIC_LEARN,
+	IONIC_ETH_MNIC_CONTROL,
 };
 
 /**
  * struct ionic_port_identity - port identity structure
  * @version:        identity structure version
- * @type:           type of port (enum port_type)
+ * @type:           type of port (enum ionic_port_type)
  * @num_lanes:      number of lanes for the port
  * @autoneg:        autoneg supported
  * @min_frame_size: minimum frame size supported
@@ -2104,22 +2489,31 @@ union ionic_port_identity {
 		u8     rsvd2[44];
 		union ionic_port_config config;
 	};
-	__le32 words[512];
+	__le32 words[478];
 };
 
 /**
  * struct ionic_port_info - port info structure
- * @port_status:     port status
- * @port_stats:      port stats
+ * @config:          Port configuration data
+ * @status:          Port status data
+ * @stats:           Port statistics data
+ * @mgmt_stats:      Port management statistics data
+ * @port_pb_drop_stats:   uplink pb drop stats
  */
 struct ionic_port_info {
 	union ionic_port_config config;
 	struct ionic_port_status status;
-	struct ionic_port_stats stats;
+	union {
+		struct ionic_port_stats      stats;
+		struct ionic_mgmt_port_stats mgmt_stats;
+	};
+	/* room for pb_stats to start at 2k offset */
+	u8                          rsvd[760];
+	struct ionic_port_pb_stats  pb_stats;
 };
 
 /**
- * struct ionic_lif_stats
+ * struct ionic_lif_stats - LIF statistics structure
  */
 struct ionic_lif_stats {
 	/* RX */
@@ -2172,7 +2566,7 @@ struct ionic_lif_stats {
 	__le64 tx_queue_error;
 	__le64 tx_desc_fetch_error;
 	__le64 tx_desc_data_error;
-	__le64 rsvd9;
+	__le64 tx_queue_empty;
 	__le64 rsvd10;
 	__le64 rsvd11;
 	__le64 rsvd12;
@@ -2273,7 +2667,10 @@ struct ionic_lif_stats {
 };
 
 /**
- * struct ionic_lif_info - lif info structure
+ * struct ionic_lif_info - LIF info structure
+ * @config:	LIF configuration structure
+ * @status:	LIF status structure
+ * @stats:	LIF statistics structure
  */
 struct ionic_lif_info {
 	union ionic_lif_config config;
@@ -2298,6 +2695,9 @@ union ionic_dev_cmd {
 	struct ionic_port_getattr_cmd port_getattr;
 	struct ionic_port_setattr_cmd port_setattr;
 
+	struct ionic_vf_setattr_cmd vf_setattr;
+	struct ionic_vf_getattr_cmd vf_getattr;
+
 	struct ionic_lif_identify_cmd lif_identify;
 	struct ionic_lif_init_cmd lif_init;
 	struct ionic_lif_reset_cmd lif_reset;
@@ -2305,8 +2705,11 @@ union ionic_dev_cmd {
 	struct ionic_qos_identify_cmd qos_identify;
 	struct ionic_qos_init_cmd qos_init;
 	struct ionic_qos_reset_cmd qos_reset;
+	struct ionic_qos_clear_stats_cmd qos_clear_stats;
 
+	struct ionic_q_identify_cmd q_identify;
 	struct ionic_q_init_cmd q_init;
+	struct ionic_q_control_cmd q_control;
 };
 
 union ionic_dev_cmd_comp {
@@ -2327,6 +2730,9 @@ union ionic_dev_cmd_comp {
 	struct ionic_port_getattr_comp port_getattr;
 	struct ionic_port_setattr_comp port_setattr;
 
+	struct ionic_vf_setattr_comp vf_setattr;
+	struct ionic_vf_getattr_comp vf_getattr;
+
 	struct ionic_lif_identify_comp lif_identify;
 	struct ionic_lif_init_comp lif_init;
 	ionic_lif_reset_comp lif_reset;
@@ -2335,19 +2741,20 @@ union ionic_dev_cmd_comp {
 	ionic_qos_init_comp qos_init;
 	ionic_qos_reset_comp qos_reset;
 
+	struct ionic_q_identify_comp q_identify;
 	struct ionic_q_init_comp q_init;
 };
 
 /**
- * union dev_info - Device info register format (read-only)
- * @signature:       Signature value of 0x44455649 ('DEVI').
- * @version:         Current version of info.
- * @asic_type:       Asic type.
- * @asic_rev:        Asic revision.
- * @fw_status:       Firmware status.
- * @fw_heartbeat:    Firmware heartbeat counter.
- * @serial_num:      Serial number.
- * @fw_version:      Firmware version.
+ * union ionic_dev_info_regs - Device info register format (read-only)
+ * @signature:       Signature value of 0x44455649 ('DEVI')
+ * @version:         Current version of info
+ * @asic_type:       Asic type
+ * @asic_rev:        Asic revision
+ * @fw_status:       Firmware status
+ * @fw_heartbeat:    Firmware heartbeat counter
+ * @serial_num:      Serial number
+ * @fw_version:      Firmware version
  */
 union ionic_dev_info_regs {
 #define IONIC_DEVINFO_FWVERS_BUFLEN 32
@@ -2357,6 +2764,7 @@ union ionic_dev_info_regs {
 		u8     version;
 		u8     asic_type;
 		u8     asic_rev;
+#define IONIC_FW_STS_F_RUNNING	0x1
 		u8     fw_status;
 		u32    fw_heartbeat;
 		char   fw_version[IONIC_DEVINFO_FWVERS_BUFLEN];
@@ -2367,10 +2775,10 @@ union ionic_dev_info_regs {
 
 /**
  * union ionic_dev_cmd_regs - Device command register format (read-write)
- * @doorbell:        Device Cmd Doorbell, write-only.
+ * @doorbell:        Device Cmd Doorbell, write-only
  *                   Write a 1 to signal device to process cmd,
  *                   poll done for completion.
- * @done:            Done indicator, bit 0 == 1 when command is complete.
+ * @done:            Done indicator, bit 0 == 1 when command is complete
  * @cmd:             Opcode-specific command bytes
  * @comp:            Opcode-specific response bytes
  * @data:            Opcode-specific side-data
@@ -2383,12 +2791,12 @@ union ionic_dev_cmd_regs {
 		union ionic_dev_cmd_comp    comp;
 		u8                    rsvd[48];
 		u32                   data[478];
-	};
+	} __rte_packed;
 	u32 words[512];
 };
 
 /**
- * union ionic_dev_regs - Device register format in for bar 0 page 0
+ * union ionic_dev_regs - Device register format for bar 0 page 0
  * @info:            Device info registers
  * @devcmd:          Device command registers
  */
@@ -2396,13 +2804,14 @@ union ionic_dev_regs {
 	struct {
 		union ionic_dev_info_regs info;
 		union ionic_dev_cmd_regs  devcmd;
-	};
+	} __rte_packed;
 	__le32 words[1024];
 };
 
 union ionic_adminq_cmd {
 	struct ionic_admin_cmd cmd;
 	struct ionic_nop_cmd nop;
+	struct ionic_q_identify_cmd q_identify;
 	struct ionic_q_init_cmd q_init;
 	struct ionic_q_control_cmd q_control;
 	struct ionic_lif_setattr_cmd lif_setattr;
@@ -2419,6 +2828,7 @@ union ionic_adminq_cmd {
 union ionic_adminq_comp {
 	struct ionic_admin_comp comp;
 	struct ionic_nop_comp nop;
+	struct ionic_q_identify_comp q_identify;
 	struct ionic_q_init_comp q_init;
 	struct ionic_lif_setattr_comp lif_setattr;
 	struct ionic_lif_getattr_comp lif_getattr;
@@ -2444,14 +2854,14 @@ union ionic_adminq_comp {
 /**
  * struct ionic_doorbell - Doorbell register layout
  * @p_index: Producer index
- * @ring:    Selects the specific ring of the queue to update.
+ * @ring:    Selects the specific ring of the queue to update
  *           Type-specific meaning:
- *              ring=0: Default producer/consumer queue.
+ *              ring=0: Default producer/consumer queue
  *              ring=1: (CQ, EQ) Re-Arm queue.  RDMA CQs
  *              send events to EQs when armed.  EQs send
  *              interrupts when armed.
- * @qid:     The queue id selects the queue destination for the
- *           producer index and flags.
+ * @qid_lo:  Queue destination for the producer index and flags (low bits)
+ * @qid_hi:  Queue destination for the producer index and flags (high bits)
  */
 struct ionic_doorbell {
 	__le16 p_index;
@@ -2461,6 +2871,92 @@ struct ionic_doorbell {
 	u16    rsvd2;
 };
 
+/**
+ * struct ionic_intr_ctrl - Interrupt control register
+ * @coalescing_init:  Coalescing timer initial value, in
+ *                    device units.  Use @identity->intr_coal_mult
+ *                    and @identity->intr_coal_div to convert from
+ *                    usecs to device units:
+ *
+ *                      coal_init = coal_usecs * coal_mutl / coal_div
+ *
+ *                    When an interrupt is sent the interrupt
+ *                    coalescing timer current value
+ *                    (@coalescing_curr) is initialized with this
+ *                    value and begins counting down.  No more
+ *                    interrupts are sent until the coalescing
+ *                    timer reaches 0.  When @coalescing_init=0
+ *                    interrupt coalescing is effectively disabled
+ *                    and every interrupt assert results in an
+ *                    interrupt.  Reset value: 0
+ * @mask:             Interrupt mask.  When @mask=1 the interrupt
+ *                    resource will not send an interrupt.  When
+ *                    @mask=0 the interrupt resource will send an
+ *                    interrupt if an interrupt event is pending
+ *                    or on the next interrupt assertion event.
+ *                    Reset value: 1
+ * @int_credits:      Interrupt credits.  This register indicates
+ *                    how many interrupt events the hardware has
+ *                    sent.  When written by software this
+ *                    register atomically decrements @int_credits
+ *                    by the value written.  When @int_credits
+ *                    becomes 0 then the "pending interrupt" bit
+ *                    in the Interrupt Status register is cleared
+ *                    by the hardware and any pending but unsent
+ *                    interrupts are cleared.
+ *                    !!!IMPORTANT!!! This is a signed register.
+ * @flags:            Interrupt control flags
+ *                       @unmask -- When this bit is written with a 1
+ *                       the interrupt resource will set mask=0.
+ *                       @coal_timer_reset -- When this
+ *                       bit is written with a 1 the
+ *                       @coalescing_curr will be reloaded with
+ *                       @coalescing_init to reset the coalescing
+ *                       timer.
+ * @mask_on_assert:   Automatically mask on assertion.  When
+ *                    @mask_on_assert=1 the interrupt resource
+ *                    will set @mask=1 whenever an interrupt is
+ *                    sent.  When using interrupts in Legacy
+ *                    Interrupt mode the driver must select
+ *                    @mask_on_assert=0 for proper interrupt
+ *                    operation.
+ * @coalescing_curr:  Coalescing timer current value, in
+ *                    microseconds.  When this value reaches 0
+ *                    the interrupt resource is again eligible to
+ *                    send an interrupt.  If an interrupt event
+ *                    is already pending when @coalescing_curr
+ *                    reaches 0 the pending interrupt will be
+ *                    sent, otherwise an interrupt will be sent
+ *                    on the next interrupt assertion event.
+ */
+struct ionic_intr_ctrl {
+	u8 coalescing_init;
+	u8 rsvd[3];
+	u8 mask;
+	u8 rsvd2[3];
+	u16 int_credits;
+	u16 flags;
+#define INTR_F_UNMASK		0x0001
+#define INTR_F_TIMER_RESET	0x0002
+	u8 mask_on_assert;
+	u8 rsvd3[3];
+	u8 coalescing_curr;
+	u8 rsvd4[3];
+	u32 rsvd6[3];
+};
+
+#define IONIC_INTR_CTRL_REGS_MAX	2048
+#define IONIC_INTR_CTRL_COAL_MAX	0x3F
+
+#define intr_to_coal(intr_ctrl)		\
+		((void __iomem *)&(intr_ctrl)->coalescing_init)
+#define intr_to_mask(intr_ctrl)		\
+		((void __iomem *)&(intr_ctrl)->mask)
+#define intr_to_credits(intr_ctrl)	\
+		((void __iomem *)&(intr_ctrl)->int_credits)
+#define intr_to_mask_on_assert(intr_ctrl)\
+		((void __iomem *)&(intr_ctrl)->mask_on_assert)
+
 struct ionic_intr_status {
 	u32 status[2];
 };
@@ -2477,6 +2973,28 @@ union ionic_notifyq_comp {
 	struct ionic_log_event log;
 };
 
+/**
+ * struct ionic_eq_comp - Event queue completion descriptor
+ *
+ * @code:	Event code, see enum ionic_eq_comp_code
+ * @lif_index:	To which LIF the event pertains
+ * @qid:	To which queue id the event pertains
+ * @gen_color:	Event queue wrap counter, init 1, incr each wrap
+ */
+struct ionic_eq_comp {
+	__le16 code;
+	__le16 lif_index;
+	__le32 qid;
+	u8 rsvd[7];
+	u8 gen_color;
+};
+
+enum ionic_eq_comp_code {
+	IONIC_EQ_COMP_CODE_NONE = 0,
+	IONIC_EQ_COMP_CODE_RX_COMP = 1,
+	IONIC_EQ_COMP_CODE_TX_COMP = 2,
+};
+
 /* Deprecate */
 struct ionic_identity {
 	union ionic_drv_identity drv;
@@ -2484,8 +3002,7 @@ struct ionic_identity {
 	union ionic_lif_identity lif;
 	union ionic_port_identity port;
 	union ionic_qos_identity qos;
+	union ionic_q_identity txq;
 };
 
-#pragma pack(pop)
-
 #endif /* _IONIC_IF_H_ */
diff --git a/drivers/net/ionic/ionic_regs.h b/drivers/net/ionic/ionic_regs.h
index 3adc2bc7c..6ebc48d04 100644
--- a/drivers/net/ionic/ionic_regs.h
+++ b/drivers/net/ionic/ionic_regs.h
@@ -21,9 +21,6 @@ struct ionic_intr {
 	uint32_t rsvd[3];
 };
 
-#define IONIC_INTR_CTRL_REGS_MAX	2048
-#define IONIC_INTR_CTRL_COAL_MAX	0x3F
-
 /** enum ionic_intr_mask_vals - valid values for mask and mask_assert.
  * @IONIC_INTR_MASK_CLEAR:	unmask interrupt.
  * @IONIC_INTR_MASK_SET:	mask interrupt.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v5 3/9] net/ionic: update documentation and MAINTAINERS
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
                         ` (2 preceding siblings ...)
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 2/9] net/ionic: update interface file to the latest version Andrew Boyer
@ 2020-12-10  2:57       ` Andrew Boyer
  2020-12-10 12:01         ` Ferruh Yigit
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 4/9] net/ionic: check for cmd completion more frequently Andrew Boyer
                         ` (5 subsequent siblings)
  9 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:57 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

The UNMAINTAINED flag will be removed in a future patch.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 MAINTAINERS                        |  2 +-
 doc/guides/nics/features/ionic.ini |  1 +
 doc/guides/nics/ionic.rst          | 13 +++++++------
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index eafe9f8c4..7bc0010f2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -841,7 +841,7 @@ F: drivers/net/pfe/
 F: doc/guides/nics/features/pfe.ini
 
 Pensando ionic - UNMAINTAINED
-M: Alfredo Cardigliano <cardigliano@ntop.org>
+M: Andrew Boyer <aboyer@pensando.io>
 F: drivers/net/ionic/
 F: doc/guides/nics/ionic.rst
 F: doc/guides/nics/features/ionic.ini
diff --git a/doc/guides/nics/features/ionic.ini b/doc/guides/nics/features/ionic.ini
index 083c7bd99..5e64aeb46 100644
--- a/doc/guides/nics/features/ionic.ini
+++ b/doc/guides/nics/features/ionic.ini
@@ -19,6 +19,7 @@ Unicast MAC filter   = Y
 RSS hash             = Y
 RSS key update       = Y
 RSS reta update      = Y
+SR-IOV               = Y
 VLAN filter          = Y
 VLAN offload         = Y
 Flow control         = Y
diff --git a/doc/guides/nics/ionic.rst b/doc/guides/nics/ionic.rst
index fd32926bf..3b93592c3 100644
--- a/doc/guides/nics/ionic.rst
+++ b/doc/guides/nics/ionic.rst
@@ -1,5 +1,5 @@
 ..  SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
-    Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
+    Copyright(c) 2018-2020 Pensando Systems, Inc. All rights reserved.
 
 IONIC Driver
 ============
@@ -7,15 +7,16 @@ IONIC Driver
 The ionic driver provides support for Pensando server adapters.
 It currently supports the below models:
 
-- `Naples DSC-25 <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>`_
-- `Naples DSC-100 <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>`_
+- DSC-25 dual-port 25G Distributed Services Card `(pdf) <https://pensando.io/wp-content/uploads/2020/03/Pensando-DSC-25-Product-Brief.pdf>`__
+- DSC-100 dual-port 100G Distributed Services Card `(pdf) <https://pensando.io/wp-content/uploads/2020/03/Pensando-DSC-100-Product-Brief.pdf>`__
 
-Please visit https://pensando.io for more information.
+Please visit the Pensando web site at https://pensando.io for more information.
+The `Documents <https://pensando.io/documents/>`_ page contains Product Briefs and other product information.
 
 Identifying the Adapter
 -----------------------
 
-To find if one or more Pensando PCI Ethernet devices are installed
+To determine if one or more Pensando DSC Ethernet devices are installed
 on the host, check for the PCI devices:
 
    .. code-block:: console
@@ -28,6 +29,6 @@ on the host, check for the PCI devices:
 Building DPDK
 -------------
 
-The ionic PMD driver supports UIO and VFIO, please refer to the
+The ionic PMD supports UIO and VFIO. Please refer to the
 :ref:`DPDK documentation that comes with the DPDK suite <linux_gsg>`
 for instructions on how to build DPDK.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v5 4/9] net/ionic: check for cmd completion more frequently
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
                         ` (3 preceding siblings ...)
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
@ 2020-12-10  2:57       ` Andrew Boyer
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 5/9] net/ionic: remove some unused fields Andrew Boyer
                         ` (4 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:57 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer, Neel Patel

This reduces the startup time a bit.

Signed-off-by: Neel Patel <neel@pensando.io>
Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_dev.h   |  4 +++-
 drivers/net/ionic/ionic_main.c  | 36 ++++++++++++++++-----------------
 drivers/net/ionic/ionic_osdep.h | 10 ---------
 3 files changed, 21 insertions(+), 29 deletions(-)

diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index 532255a60..dc64a6d28 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -20,7 +20,9 @@
 
 #define IONIC_LIFS_MAX			1024
 
-#define IONIC_DEVCMD_TIMEOUT	30 /* devcmd_timeout */
+#define IONIC_DEVCMD_TIMEOUT		5	/* devcmd_timeout */
+#define IONIC_DEVCMD_CHECK_PERIOD_US	10	/* devcmd status chk period */
+
 #define	IONIC_ALIGN             4096
 
 struct ionic_adapter;
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index 2ade213d2..f77bddaa4 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -144,12 +144,12 @@ static int
 ionic_wait_ctx_for_completion(struct ionic_lif *lif, struct ionic_qcq *qcq,
 		struct ionic_admin_ctx *ctx, unsigned long max_wait)
 {
-	unsigned long step_msec = 1;
-	unsigned int max_wait_msec = max_wait * 1000;
-	unsigned long elapsed_msec = 0;
+	unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US;
+	unsigned long max_wait_usec = max_wait * 1000000L;
+	unsigned long elapsed_usec = 0;
 	int budget = 8;
 
-	while (ctx->pending_work && elapsed_msec < max_wait_msec) {
+	while (ctx->pending_work && elapsed_usec < max_wait_usec) {
 		/*
 		 * Locking here as adminq is served inline (this could be called
 		 * from multiple places)
@@ -160,8 +160,8 @@ ionic_wait_ctx_for_completion(struct ionic_lif *lif, struct ionic_qcq *qcq,
 
 		rte_spinlock_unlock(&lif->adminq_service_lock);
 
-		msec_delay(step_msec);
-		elapsed_msec += step_msec;
+		rte_delay_us_block(step_usec);
+		elapsed_usec += step_usec;
 	}
 
 	return (!ctx->pending_work);
@@ -195,9 +195,9 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 static int
 ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait)
 {
-	unsigned long step_msec = 100;
-	unsigned int max_wait_msec = max_wait * 1000;
-	unsigned long elapsed_msec = 0;
+	unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US;
+	unsigned long max_wait_usec = max_wait * 1000000L;
+	unsigned long elapsed_usec = 0;
 	int done;
 
 	/* Wait for dev cmd to complete.. but no more than max_wait sec */
@@ -205,20 +205,20 @@ ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait)
 	do {
 		done = ionic_dev_cmd_done(idev);
 		if (done) {
-			IONIC_PRINT(DEBUG, "DEVCMD %d done took %ld msecs",
-				idev->dev_cmd->cmd.cmd.opcode,
-				elapsed_msec);
+			IONIC_PRINT(DEBUG, "DEVCMD %d done took %ld usecs",
+				ioread8(&idev->dev_cmd->cmd.cmd.opcode),
+				elapsed_usec);
 			return 0;
 		}
 
-		msec_delay(step_msec);
+		rte_delay_us_block(step_usec);
 
-		elapsed_msec += step_msec;
-	} while (elapsed_msec < max_wait_msec);
+		elapsed_usec += step_usec;
+	} while (elapsed_usec < max_wait_usec);
 
-	IONIC_PRINT(DEBUG, "DEVCMD %d timeout after %ld msecs",
-		idev->dev_cmd->cmd.cmd.opcode,
-		elapsed_msec);
+	IONIC_PRINT(ERR, "DEVCMD %d timeout after %ld usecs",
+		ioread8(&idev->dev_cmd->cmd.cmd.opcode),
+		elapsed_usec);
 
 	return -ETIMEDOUT;
 }
diff --git a/drivers/net/ionic/ionic_osdep.h b/drivers/net/ionic/ionic_osdep.h
index e04bb8f65..a55d59918 100644
--- a/drivers/net/ionic/ionic_osdep.h
+++ b/drivers/net/ionic/ionic_osdep.h
@@ -20,13 +20,8 @@
 
 #include "ionic_logs.h"
 
-#define DELAY(x) rte_delay_us(x)
-#define usec_delay(x) DELAY(x)
-#define msec_delay(x) DELAY(1000 * (x))
-
 #define BIT(nr)            (1UL << (nr))
 #define BIT_ULL(nr)        (1ULL << (nr))
-#define BITS_TO_LONGS(nr)  div_round_up(nr, 8 * sizeof(long))
 
 #ifndef PAGE_SHIFT
 #define PAGE_SHIFT      12
@@ -44,11 +39,6 @@ typedef uint16_t __le16;
 typedef uint32_t __le32;
 typedef uint64_t __le64;
 
-static inline uint32_t div_round_up(uint32_t n, uint32_t d)
-{
-	return (n + d - 1) / d;
-}
-
 #define ioread8(reg)		rte_read8(reg)
 #define ioread32(reg)		rte_read32(reg)
 #define iowrite8(value, reg)	rte_write8(value, reg)
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v5 5/9] net/ionic: remove some unused fields
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
                         ` (4 preceding siblings ...)
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 4/9] net/ionic: check for cmd completion more frequently Andrew Boyer
@ 2020-12-10  2:57       ` Andrew Boyer
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 6/9] net/ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
                         ` (3 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:57 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

This conserves resources.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic.h        |  1 -
 drivers/net/ionic/ionic_dev.c    |  5 +----
 drivers/net/ionic/ionic_dev.h    |  7 +------
 drivers/net/ionic/ionic_ethdev.c |  2 --
 drivers/net/ionic/ionic_lif.c    | 22 ++++++----------------
 drivers/net/ionic/ionic_lif.h    |  2 --
 drivers/net/ionic/ionic_regs.h   |  6 ------
 7 files changed, 8 insertions(+), 37 deletions(-)

diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h
index 1538df309..a93110326 100644
--- a/drivers/net/ionic/ionic.h
+++ b/drivers/net/ionic/ionic.h
@@ -59,7 +59,6 @@ struct ionic_adapter {
 	uint32_t link_speed;
 	uint32_t nintrs;
 	bool intrs[IONIC_INTR_CTRL_REGS_MAX];
-	bool is_mgmt_nic;
 	bool link_up;
 	char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN];
 	struct rte_pci_device *pci_dev;
diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c
index 5c2820b7a..fc68f5c74 100644
--- a/drivers/net/ionic/ionic_dev.c
+++ b/drivers/net/ionic/ionic_dev.c
@@ -65,7 +65,6 @@ ionic_dev_setup(struct ionic_adapter *adapter)
 	}
 
 	idev->db_pages = bar->vaddr;
-	idev->phy_db_pages = bar->bus_addr;
 
 	return 0;
 }
@@ -343,7 +342,6 @@ ionic_dev_cmd_adminq_init(struct ionic_dev *idev,
 		.q_init.type = q->type,
 		.q_init.index = q->index,
 		.q_init.flags = IONIC_QINIT_F_ENA,
-		.q_init.pid = q->pid,
 		.q_init.intr_index = intr_index,
 		.q_init.ring_size = rte_log2_u32(q->num_descs),
 		.q_init.ring_base = q->base_pa,
@@ -419,7 +417,7 @@ ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,
 int
 ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	     struct ionic_queue *q, uint32_t index, uint32_t num_descs,
-	     size_t desc_size, size_t sg_desc_size, uint32_t pid)
+	     size_t desc_size, size_t sg_desc_size)
 {
 	uint32_t ring_size;
 
@@ -439,7 +437,6 @@ ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	q->sg_desc_size = sg_desc_size;
 	q->head_idx = 0;
 	q->tail_idx = 0;
-	q->pid = pid;
 
 	return 0;
 }
diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index dc64a6d28..7150f7f2c 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -120,10 +120,7 @@ struct ionic_dev {
 	union ionic_dev_cmd_regs __iomem *dev_cmd;
 
 	struct ionic_doorbell __iomem *db_pages;
-	rte_iova_t phy_db_pages;
-
 	struct ionic_intr __iomem *intr_ctrl;
-
 	struct ionic_intr_status __iomem *intr_status;
 
 	struct ionic_port_info *port_info;
@@ -163,11 +160,9 @@ struct ionic_queue {
 	uint32_t num_descs;
 	uint32_t desc_size;
 	uint32_t sg_desc_size;
-	uint32_t pid;
 	uint32_t qid;
 	uint32_t qtype;
 	struct ionic_doorbell __iomem *db;
-	void *nop_desc;
 };
 
 #define IONIC_INTR_INDEX_NOT_ASSIGNED	(-1)
@@ -257,7 +252,7 @@ uint32_t ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,
 
 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
 	struct ionic_queue *q, uint32_t index, uint32_t num_descs,
-	size_t desc_size, size_t sg_desc_size, uint32_t pid);
+	size_t desc_size, size_t sg_desc_size);
 void ionic_q_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
 void ionic_q_sg_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
 void ionic_q_flush(struct ionic_queue *q);
diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index 600333e20..cd79f250e 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -1178,8 +1178,6 @@ eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 		goto err_free_adapter;
 	}
 
-	adapter->is_mgmt_nic = (pci_dev->id.device_id == IONIC_DEV_ID_ETH_MGMT);
-
 	adapter->num_bars = 0;
 	for (i = 0; i < PCI_MAX_RESOURCE && i < IONIC_BARS_MAX; i++) {
 		resource = &pci_dev->mem_resource[i];
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 60a5f3d53..bc15d75fd 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -536,8 +536,6 @@ ionic_lif_change_mtu(struct ionic_lif *lif, int new_mtu)
 	if (err)
 		return err;
 
-	lif->mtu = new_mtu;
-
 	return 0;
 }
 
@@ -583,7 +581,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 		uint32_t desc_size,
 		uint32_t cq_desc_size,
 		uint32_t sg_desc_size,
-		uint32_t pid, struct ionic_qcq **qcq)
+		struct ionic_qcq **qcq)
 {
 	struct ionic_dev *idev = &lif->adapter->idev;
 	struct ionic_qcq *new;
@@ -633,7 +631,7 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 	new->q.type = type;
 
 	err = ionic_q_init(lif, idev, &new->q, index, num_descs,
-		desc_size, sg_desc_size, pid);
+		desc_size, sg_desc_size);
 	if (err) {
 		IONIC_PRINT(ERR, "Queue initialization failed");
 		return err;
@@ -734,7 +732,7 @@ ionic_rx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t nrxq_descs,
 		sizeof(struct ionic_rxq_desc),
 		sizeof(struct ionic_rxq_comp),
 		sizeof(struct ionic_rxq_sg_desc),
-		lif->kern_pid, &lif->rxqcqs[index]);
+		&lif->rxqcqs[index]);
 	if (err)
 		return err;
 
@@ -756,7 +754,7 @@ ionic_tx_qcq_alloc(struct ionic_lif *lif, uint32_t index, uint16_t ntxq_descs,
 		sizeof(struct ionic_txq_desc),
 		sizeof(struct ionic_txq_comp),
 		sizeof(struct ionic_txq_sg_desc),
-		lif->kern_pid, &lif->txqcqs[index]);
+		&lif->txqcqs[index]);
 	if (err)
 		return err;
 
@@ -777,7 +775,7 @@ ionic_admin_qcq_alloc(struct ionic_lif *lif)
 		sizeof(struct ionic_admin_cmd),
 		sizeof(struct ionic_admin_comp),
 		0,
-		lif->kern_pid, &lif->adminqcq);
+		&lif->adminqcq);
 	if (err)
 		return err;
 
@@ -798,7 +796,7 @@ ionic_notify_qcq_alloc(struct ionic_lif *lif)
 		sizeof(struct ionic_notifyq_cmd),
 		sizeof(union ionic_notifyq_comp),
 		0,
-		lif->kern_pid, &lif->notifyqcq);
+		&lif->notifyqcq);
 	if (err)
 		return err;
 
@@ -831,8 +829,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
 	rte_spinlock_init(&lif->adminq_lock);
 	rte_spinlock_init(&lif->adminq_service_lock);
 
-	lif->kern_pid = 0;
-
 	dbpage_num = ionic_db_page_num(lif, 0);
 
 	lif->kern_dbpage = ionic_bus_map_dbpage(adapter, dbpage_num);
@@ -1211,13 +1207,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
 			.index = q->index,
 			.flags = (IONIC_QINIT_F_IRQ | IONIC_QINIT_F_ENA),
 			.intr_index = qcq->intr.index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 		}
 	};
 
-	IONIC_PRINT(DEBUG, "notifyq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "notifyq_init.index %d",
 		ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
@@ -1320,7 +1314,6 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 			.index = q->index,
 			.flags = IONIC_QINIT_F_SG,
 			.intr_index = cq->bound_intr->index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 			.cq_ring_base = cq->base_pa,
@@ -1329,7 +1322,6 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "txq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "txq_init.index %d", ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "txq_init.ring_base 0x%" PRIx64 "",
 		ctx.cmd.q_init.ring_base);
@@ -1368,7 +1360,6 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 			.index = q->index,
 			.flags = IONIC_QINIT_F_SG,
 			.intr_index = cq->bound_intr->index,
-			.pid = q->pid,
 			.ring_size = rte_log2_u32(q->num_descs),
 			.ring_base = q->base_pa,
 			.cq_ring_base = cq->base_pa,
@@ -1377,7 +1368,6 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 	};
 	int err;
 
-	IONIC_PRINT(DEBUG, "rxq_init.pid %d", ctx.cmd.q_init.pid);
 	IONIC_PRINT(DEBUG, "rxq_init.index %d", ctx.cmd.q_init.index);
 	IONIC_PRINT(DEBUG, "rxq_init.ring_base 0x%" PRIx64 "",
 		ctx.cmd.q_init.ring_base);
diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 425762d65..4e091719f 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -84,13 +84,11 @@ struct ionic_lif {
 	struct ionic_adapter *adapter;
 	struct rte_eth_dev *eth_dev;
 	uint16_t port_id;  /**< Device port identifier */
-	uint16_t mtu;
 	uint32_t index;
 	uint32_t hw_index;
 	uint32_t state;
 	uint32_t ntxqcqs;
 	uint32_t nrxqcqs;
-	uint32_t kern_pid;
 	rte_spinlock_t adminq_lock;
 	rte_spinlock_t adminq_service_lock;
 	struct ionic_qcq *adminqcq;
diff --git a/drivers/net/ionic/ionic_regs.h b/drivers/net/ionic/ionic_regs.h
index 6ebc48d04..3bdec3424 100644
--- a/drivers/net/ionic/ionic_regs.h
+++ b/drivers/net/ionic/ionic_regs.h
@@ -130,10 +130,4 @@ enum ionic_dbell_bits {
 	IONIC_DBELL_INDEX_MASK		= 0xffff,
 };
 
-static inline void
-ionic_dbell_ring(u64 __iomem *db_page, int qtype, u64 val)
-{
-	writeq(val, &db_page[qtype]);
-}
-
 #endif /* _IONIC_REGS_H_ */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v5 6/9] net/ionic: convert 'deferred' boolean to a flag bit
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
                         ` (5 preceding siblings ...)
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 5/9] net/ionic: remove some unused fields Andrew Boyer
@ 2020-12-10  2:57       ` Andrew Boyer
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 7/9] net/ionic: warn if loopback mode is requested Andrew Boyer
                         ` (2 subsequent siblings)
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:57 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

This conserves resources.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_lif.c  |  4 ++--
 drivers/net/ionic/ionic_lif.h  |  2 +-
 drivers/net/ionic/ionic_rxtx.c | 10 ++++++----
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index bc15d75fd..2e33fb8d9 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -1590,7 +1590,7 @@ ionic_lif_start(struct ionic_lif *lif)
 
 	for (i = 0; i < lif->nrxqcqs; i++) {
 		struct ionic_qcq *rxq = lif->rxqcqs[i];
-		if (!rxq->deferred_start) {
+		if (!(rxq->flags & IONIC_QCQ_F_DEFERRED)) {
 			err = ionic_dev_rx_queue_start(lif->eth_dev, i);
 
 			if (err)
@@ -1600,7 +1600,7 @@ ionic_lif_start(struct ionic_lif *lif)
 
 	for (i = 0; i < lif->ntxqcqs; i++) {
 		struct ionic_qcq *txq = lif->txqcqs[i];
-		if (!txq->deferred_start) {
+		if (!(txq->flags & IONIC_QCQ_F_DEFERRED)) {
 			err = ionic_dev_tx_queue_start(lif->eth_dev, i);
 
 			if (err)
diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 4e091719f..8e2b42443 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -50,6 +50,7 @@ struct ionic_rx_stats {
 #define IONIC_QCQ_F_SG		BIT(1)
 #define IONIC_QCQ_F_INTR	BIT(2)
 #define IONIC_QCQ_F_NOTIFYQ	BIT(3)
+#define IONIC_QCQ_F_DEFERRED	BIT(4)
 
 /* Queue / Completion Queue */
 struct ionic_qcq {
@@ -68,7 +69,6 @@ struct ionic_qcq {
 	uint32_t total_size;
 	uint32_t flags;
 	struct ionic_intr_info intr;
-	bool deferred_start;
 };
 
 #define IONIC_Q_TO_QCQ(q)	container_of(q, struct ionic_qcq, q)
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index 2592f5cab..b953aff49 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -64,7 +64,7 @@ ionic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
 
 	qinfo->nb_desc = q->num_descs;
 	qinfo->conf.offloads = txq->offloads;
-	qinfo->conf.tx_deferred_start = txq->deferred_start;
+	qinfo->conf.tx_deferred_start = txq->flags & IONIC_QCQ_F_DEFERRED;
 }
 
 static inline void __rte_cold
@@ -196,7 +196,8 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	}
 
 	/* Do not start queue with rte_eth_dev_start() */
-	txq->deferred_start = tx_conf->tx_deferred_start;
+	if (tx_conf->tx_deferred_start)
+		txq->flags |= IONIC_QCQ_F_DEFERRED;
 
 	txq->offloads = offloads;
 
@@ -605,7 +606,7 @@ ionic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
 	qinfo->mp = rxq->mb_pool;
 	qinfo->scattered_rx = dev->data->scattered_rx;
 	qinfo->nb_desc = q->num_descs;
-	qinfo->conf.rx_deferred_start = rxq->deferred_start;
+	qinfo->conf.rx_deferred_start = rxq->flags & IONIC_QCQ_F_DEFERRED;
 	qinfo->conf.offloads = rxq->offloads;
 }
 
@@ -703,7 +704,8 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	 */
 
 	/* Do not start queue with rte_eth_dev_start() */
-	rxq->deferred_start = rx_conf->rx_deferred_start;
+	if (rx_conf->rx_deferred_start)
+		rxq->flags |= IONIC_QCQ_F_DEFERRED;
 
 	rxq->offloads = offloads;
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v5 7/9] net/ionic: warn if loopback mode is requested
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
                         ` (6 preceding siblings ...)
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 6/9] net/ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
@ 2020-12-10  2:57       ` Andrew Boyer
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 9/9] net/ionic: minor logging fixups Andrew Boyer
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:57 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

The ionic FW does not support loopback mode at this time.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_ethdev.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index cd79f250e..ce6ca9671 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -919,6 +919,9 @@ ionic_dev_start(struct rte_eth_dev *eth_dev)
 		return -EINVAL;
 	}
 
+	if (dev_conf->lpbk_mode)
+		IONIC_PRINT(WARNING, "Loopback mode not supported");
+
 	err = ionic_lif_start(lif);
 	if (err) {
 		IONIC_PRINT(ERR, "Cannot start LIF: %d", err);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v5 8/9] net/ionic: minor refactorings and helper variables
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
                         ` (7 preceding siblings ...)
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 7/9] net/ionic: warn if loopback mode is requested Andrew Boyer
@ 2020-12-10  2:57       ` Andrew Boyer
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 9/9] net/ionic: minor logging fixups Andrew Boyer
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:57 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

This makes the code clearer and conserves resources.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic_lif.c  | 15 ++++++++++-----
 drivers/net/ionic/ionic_main.c | 18 +++++++-----------
 2 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 2e33fb8d9..722a89565 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -77,11 +77,14 @@ void
 ionic_lif_reset(struct ionic_lif *lif)
 {
 	struct ionic_dev *idev = &lif->adapter->idev;
+	int err;
 
 	IONIC_PRINT_CALL();
 
 	ionic_dev_cmd_lif_reset(idev, lif->index);
-	ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
+	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
+	if (err)
+		IONIC_PRINT(WARNING, "Failed to reset lif");
 }
 
 static void
@@ -305,10 +308,11 @@ ionic_dev_add_mac(struct rte_eth_dev *eth_dev,
 }
 
 void
-ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused)
+ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index)
 {
 	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
 	struct ionic_adapter *adapter = lif->adapter;
+	struct rte_ether_addr *mac_addr;
 
 	IONIC_PRINT_CALL();
 
@@ -319,11 +323,12 @@ ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index __rte_unused)
 		return;
 	}
 
-	if (!rte_is_valid_assigned_ether_addr(&eth_dev->data->mac_addrs[index]))
+	mac_addr = &eth_dev->data->mac_addrs[index];
+
+	if (!rte_is_valid_assigned_ether_addr(mac_addr))
 		return;
 
-	ionic_lif_addr_del(lif, (const uint8_t *)
-		&eth_dev->data->mac_addrs[index]);
+	ionic_lif_addr_del(lif, (const uint8_t *)mac_addr);
 }
 
 int
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index f77bddaa4..92cf0f398 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -188,8 +188,7 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 	done = ionic_wait_ctx_for_completion(lif, qcq, ctx,
 		IONIC_DEVCMD_TIMEOUT);
 
-	err = ionic_adminq_check_err(ctx, !done /* timed out */);
-	return err;
+	return ionic_adminq_check_err(ctx, !done /* timed out */);
 }
 
 static int
@@ -241,10 +240,11 @@ ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait)
 	int err;
 
 	err = ionic_dev_cmd_wait(idev, max_wait);
-	if (err)
-		return err;
 
-	return ionic_dev_cmd_check_error(idev);
+	if (!err)
+		err = ionic_dev_cmd_check_error(idev);
+
+	return err;
 }
 
 int
@@ -299,22 +299,18 @@ int
 ionic_init(struct ionic_adapter *adapter)
 {
 	struct ionic_dev *idev = &adapter->idev;
-	int err;
 
 	ionic_dev_cmd_init(idev);
-	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
-	return err;
+	return ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 }
 
 int
 ionic_reset(struct ionic_adapter *adapter)
 {
 	struct ionic_dev *idev = &adapter->idev;
-	int err;
 
 	ionic_dev_cmd_reset(idev);
-	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
-	return err;
+	return ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 }
 
 int
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] [PATCH v5 9/9] net/ionic: minor logging fixups
  2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
                         ` (8 preceding siblings ...)
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
@ 2020-12-10  2:57       ` Andrew Boyer
  9 siblings, 0 replies; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10  2:57 UTC (permalink / raw)
  To: dev; +Cc: Alfredo Cardigliano, Andrew Boyer

Expose ionic_opcode_to_str() so it can be used for dev cmds, too.
Store the device name in struct adapter.

Switch to memcpy() to work around gcc false positives.

Signed-off-by: Andrew Boyer <aboyer@pensando.io>
---
 drivers/net/ionic/ionic.h        |  1 +
 drivers/net/ionic/ionic_dev.c    |  5 ++++
 drivers/net/ionic/ionic_dev.h    |  2 ++
 drivers/net/ionic/ionic_ethdev.c |  4 ++--
 drivers/net/ionic/ionic_lif.c    | 28 ++++++++++++++--------
 drivers/net/ionic/ionic_main.c   | 32 ++++++++++++++-----------
 drivers/net/ionic/ionic_rxtx.c   | 41 ++++++++++++++------------------
 7 files changed, 64 insertions(+), 49 deletions(-)

diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h
index a93110326..7ad0ab69e 100644
--- a/drivers/net/ionic/ionic.h
+++ b/drivers/net/ionic/ionic.h
@@ -48,6 +48,7 @@ struct ionic_hw {
 struct ionic_adapter {
 	struct ionic_hw hw;
 	struct ionic_dev idev;
+	const char *name;
 	struct ionic_dev_bar bars[IONIC_BARS_MAX];
 	struct ionic_identity	ident;
 	struct ionic_lif *lifs[IONIC_LIFS_MAX];
diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c
index fc68f5c74..f32966521 100644
--- a/drivers/net/ionic/ionic_dev.c
+++ b/drivers/net/ionic/ionic_dev.c
@@ -102,6 +102,9 @@ ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd)
 	uint32_t cmd_size = sizeof(cmd->words) /
 		sizeof(cmd->words[0]);
 
+	IONIC_PRINT(DEBUG, "Sending %s (%d) via dev_cmd",
+		    ionic_opcode_to_str(cmd->cmd.opcode), cmd->cmd.opcode);
+
 	for (i = 0; i < cmd_size; i++)
 		iowrite32(cmd->words[i], &idev->dev_cmd->cmd.words[i]);
 
@@ -348,6 +351,8 @@ ionic_dev_cmd_adminq_init(struct ionic_dev *idev,
 		.q_init.cq_ring_base = cq->base_pa,
 	};
 
+	IONIC_PRINT(DEBUG, "adminq.q_init.ver %u", cmd.q_init.ver);
+
 	ionic_dev_cmd_go(idev, &cmd);
 }
 
diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h
index 7150f7f2c..026c4a9f3 100644
--- a/drivers/net/ionic/ionic_dev.h
+++ b/drivers/net/ionic/ionic_dev.h
@@ -205,6 +205,8 @@ struct ionic_qcq;
 void ionic_intr_init(struct ionic_dev *idev, struct ionic_intr_info *intr,
 	unsigned long index);
 
+const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode);
+
 int ionic_dev_setup(struct ionic_adapter *adapter);
 
 void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);
diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c
index ce6ca9671..5a360ac08 100644
--- a/drivers/net/ionic/ionic_ethdev.c
+++ b/drivers/net/ionic/ionic_ethdev.c
@@ -571,7 +571,7 @@ ionic_dev_rss_reta_update(struct rte_eth_dev *eth_dev,
 
 	if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
 		IONIC_PRINT(ERR, "The size of hash lookup table configured "
-			"(%d) doesn't match the number hardware can supported "
+			"(%d) does not match the number hardware can support "
 			"(%d)",
 			reta_size, ident->lif.eth.rss_ind_tbl_sz);
 		return -EINVAL;
@@ -605,7 +605,7 @@ ionic_dev_rss_reta_query(struct rte_eth_dev *eth_dev,
 
 	if (reta_size != ident->lif.eth.rss_ind_tbl_sz) {
 		IONIC_PRINT(ERR, "The size of hash lookup table configured "
-			"(%d) doesn't match the number hardware can supported "
+			"(%d) does not match the number hardware can support "
 			"(%d)",
 			reta_size, ident->lif.eth.rss_ind_tbl_sz);
 		return -EINVAL;
diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c
index 722a89565..28ae9dc8a 100644
--- a/drivers/net/ionic/ionic_lif.c
+++ b/drivers/net/ionic/ionic_lif.c
@@ -84,7 +84,7 @@ ionic_lif_reset(struct ionic_lif *lif)
 	ionic_dev_cmd_lif_reset(idev, lif->index);
 	err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
 	if (err)
-		IONIC_PRINT(WARNING, "Failed to reset lif");
+		IONIC_PRINT(WARNING, "Failed to reset %s", lif->name);
 }
 
 static void
@@ -554,7 +554,7 @@ ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr)
 	/*
 	 * Note: interrupt handler is called for index = 0 only
 	 * (we use interrupts for the notifyq only anyway,
-	 * which hash index = 0)
+	 * which has index = 0)
 	 */
 
 	for (index = 0; index < adapter->nintrs; index++)
@@ -687,8 +687,8 @@ ionic_qcq_alloc(struct ionic_lif *lif, uint8_t type,
 		ionic_q_sg_map(&new->q, sg_base, sg_base_pa);
 	}
 
-	IONIC_PRINT(DEBUG, "Q-Base-PA = %ju CQ-Base-PA = %ju "
-		"SG-base-PA = %ju",
+	IONIC_PRINT(DEBUG, "Q-Base-PA = %#jx CQ-Base-PA = %#jx "
+		"SG-base-PA = %#jx",
 		q_base_pa, cq_base_pa, sg_base_pa);
 
 	ionic_q_map(&new->q, q_base, q_base_pa);
@@ -827,7 +827,13 @@ ionic_lif_alloc(struct ionic_lif *lif)
 	int dbpage_num;
 	int err;
 
-	snprintf(lif->name, sizeof(lif->name), "lif%u", lif->index);
+	/*
+	 * lif->name was zeroed on allocation.
+	 * Copy (sizeof() - 1) bytes to ensure that it is NULL terminated.
+	 */
+	memcpy(lif->name, lif->eth_dev->data->name, sizeof(lif->name) - 1);
+
+	IONIC_PRINT(DEBUG, "LIF: %s", lif->name);
 
 	IONIC_PRINT(DEBUG, "Allocating Lif Info");
 
@@ -868,8 +874,6 @@ ionic_lif_alloc(struct ionic_lif *lif)
 
 	IONIC_PRINT(DEBUG, "Allocating Admin Queue");
 
-	IONIC_PRINT(DEBUG, "Allocating Admin Queue");
-
 	err = ionic_admin_qcq_alloc(lif);
 	if (err) {
 		IONIC_PRINT(ERR, "Cannot allocate admin queue");
@@ -1223,6 +1227,7 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
 		ctx.cmd.q_init.ring_base);
 	IONIC_PRINT(DEBUG, "notifyq_init.ring_size %d",
 		ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "notifyq_init.ver %u", ctx.cmd.q_init.ver);
 
 	err = ionic_adminq_post_wait(lif, &ctx);
 	if (err)
@@ -1332,6 +1337,7 @@ ionic_lif_txq_init(struct ionic_qcq *qcq)
 		ctx.cmd.q_init.ring_base);
 	IONIC_PRINT(DEBUG, "txq_init.ring_size %d",
 		ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "txq_init.ver %u", ctx.cmd.q_init.ver);
 
 	err = ionic_adminq_post_wait(qcq->lif, &ctx);
 	if (err)
@@ -1378,6 +1384,7 @@ ionic_lif_rxq_init(struct ionic_qcq *qcq)
 		ctx.cmd.q_init.ring_base);
 	IONIC_PRINT(DEBUG, "rxq_init.ring_size %d",
 		ctx.cmd.q_init.ring_size);
+	IONIC_PRINT(DEBUG, "rxq_init.ver %u", ctx.cmd.q_init.ver);
 
 	err = ionic_adminq_post_wait(qcq->lif, &ctx);
 	if (err)
@@ -1448,8 +1455,8 @@ ionic_lif_set_name(struct ionic_lif *lif)
 		},
 	};
 
-	snprintf(ctx.cmd.lif_setattr.name, sizeof(ctx.cmd.lif_setattr.name),
-		"%d", lif->port_id);
+	memcpy(ctx.cmd.lif_setattr.name, lif->name,
+		sizeof(ctx.cmd.lif_setattr.name) - 1);
 
 	ionic_adminq_post_wait(lif, &ctx);
 }
@@ -1680,7 +1687,8 @@ ionic_lifs_size(struct ionic_adapter *adapter)
 	nintrs = nlifs * 1 /* notifyq */;
 
 	if (nintrs > dev_nintrs) {
-		IONIC_PRINT(ERR, "At most %d intr queues supported, minimum required is %u",
+		IONIC_PRINT(ERR,
+			"At most %d intr supported, minimum req'd is %u",
 			dev_nintrs, nintrs);
 		return -ENOSPC;
 	}
diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c
index 92cf0f398..ce5d11311 100644
--- a/drivers/net/ionic/ionic_main.c
+++ b/drivers/net/ionic/ionic_main.c
@@ -61,7 +61,7 @@ ionic_error_to_str(enum ionic_status_code code)
 	}
 }
 
-static const char *
+const char *
 ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
 {
 	switch (opcode) {
@@ -107,6 +107,8 @@ ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
 		return "IONIC_CMD_Q_INIT";
 	case IONIC_CMD_Q_CONTROL:
 		return "IONIC_CMD_Q_CONTROL";
+	case IONIC_CMD_Q_IDENTIFY:
+		return "IONIC_CMD_Q_IDENTIFY";
 	case IONIC_CMD_RDMA_RESET_LIF:
 		return "IONIC_CMD_RDMA_RESET_LIF";
 	case IONIC_CMD_RDMA_CREATE_EQ:
@@ -126,8 +128,9 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout)
 	const char *name;
 	const char *status;
 
+	name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
+
 	if (ctx->comp.comp.status || timeout) {
-		name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
 		status = ionic_error_to_str(ctx->comp.comp.status);
 		IONIC_PRINT(ERR, "%s (%d) failed: %s (%d)",
 			name,
@@ -137,6 +140,8 @@ ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout)
 		return -EIO;
 	}
 
+	IONIC_PRINT(DEBUG, "%s (%d) succeeded", name, ctx->cmd.cmd.opcode);
+
 	return 0;
 }
 
@@ -174,14 +179,13 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
 	bool done;
 	int err;
 
-	IONIC_PRINT(DEBUG, "Sending %s to the admin queue",
-		ionic_opcode_to_str(ctx->cmd.cmd.opcode));
+	IONIC_PRINT(DEBUG, "Sending %s (%d) via the admin queue",
+		ionic_opcode_to_str(ctx->cmd.cmd.opcode), ctx->cmd.cmd.opcode);
 
 	err = ionic_adminq_post(lif, ctx);
 	if (err) {
-		IONIC_PRINT(ERR, "Failure posting to the admin queue %d (%d)",
+		IONIC_PRINT(ERR, "Failure posting %d to the admin queue (%d)",
 			ctx->cmd.cmd.opcode, err);
-
 		return err;
 	}
 
@@ -244,6 +248,7 @@ ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait)
 	if (!err)
 		err = ionic_dev_cmd_check_error(idev);
 
+	IONIC_PRINT(DEBUG, "dev_cmd returned %d", err);
 	return err;
 }
 
@@ -335,12 +340,12 @@ ionic_port_identify(struct ionic_adapter *adapter)
 				ioread32(&idev->dev_cmd->data[i]);
 	}
 
-	IONIC_PRINT(INFO, "speed %d ", ident->port.config.speed);
-	IONIC_PRINT(INFO, "mtu %d ", ident->port.config.mtu);
-	IONIC_PRINT(INFO, "state %d ", ident->port.config.state);
-	IONIC_PRINT(INFO, "an_enable %d ", ident->port.config.an_enable);
-	IONIC_PRINT(INFO, "fec_type %d ", ident->port.config.fec_type);
-	IONIC_PRINT(INFO, "pause_type %d ", ident->port.config.pause_type);
+	IONIC_PRINT(INFO, "speed %d", ident->port.config.speed);
+	IONIC_PRINT(INFO, "mtu %d", ident->port.config.mtu);
+	IONIC_PRINT(INFO, "state %d", ident->port.config.state);
+	IONIC_PRINT(INFO, "an_enable %d", ident->port.config.an_enable);
+	IONIC_PRINT(INFO, "fec_type %d", ident->port.config.fec_type);
+	IONIC_PRINT(INFO, "pause_type %d", ident->port.config.pause_type);
 	IONIC_PRINT(INFO, "loopback_mode %d",
 		ident->port.config.loopback_mode);
 
@@ -381,8 +386,7 @@ ionic_port_init(struct ionic_adapter *adapter)
 	idev->port_info_sz = RTE_ALIGN(sizeof(*idev->port_info), PAGE_SIZE);
 
 	snprintf(z_name, sizeof(z_name), "%s_port_%s_info",
-		IONIC_DRV_NAME,
-		adapter->pci_dev->device.name);
+		IONIC_DRV_NAME, adapter->name);
 
 	idev->port_info_z = ionic_memzone_reserve(z_name, idev->port_info_sz,
 		SOCKET_ID_ANY);
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index b953aff49..b689c8381 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -133,7 +133,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 {
 	struct ionic_qcq *txq;
 
-	IONIC_PRINT_CALL();
+	IONIC_PRINT(DEBUG, "Stopping TX queue %u", tx_queue_id);
 
 	txq = eth_dev->data->tx_queues[tx_queue_id];
 
@@ -156,7 +156,7 @@ ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 
 int __rte_cold
 ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
-		uint16_t nb_desc, uint32_t socket_id __rte_unused,
+		uint16_t nb_desc, uint32_t socket_id,
 		const struct rte_eth_txconf *tx_conf)
 {
 	struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
@@ -164,11 +164,6 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	uint64_t offloads;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Configuring TX queue %u with %u buffers",
-		tx_queue_id, nb_desc);
-
 	if (tx_queue_id >= lif->ntxqcqs) {
 		IONIC_PRINT(DEBUG, "Queue index %u not available "
 			"(max %u queues)",
@@ -177,6 +172,9 @@ ionic_dev_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id,
 	}
 
 	offloads = tx_conf->offloads | eth_dev->data->dev_conf.txmode.offloads;
+	IONIC_PRINT(DEBUG,
+		"Configuring skt %u TX queue %u with %u buffers, offloads %jx",
+		socket_id, tx_queue_id, nb_desc, offloads);
 
 	/* Validate number of receive descriptors */
 	if (!rte_is_power_of_2(nb_desc) || nb_desc < IONIC_MIN_RING_DESC)
@@ -215,10 +213,11 @@ ionic_dev_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
 	struct ionic_qcq *txq;
 	int err;
 
-	IONIC_PRINT_CALL();
-
 	txq = eth_dev->data->tx_queues[tx_queue_id];
 
+	IONIC_PRINT(DEBUG, "Starting TX queue %u, %u descs",
+		tx_queue_id, txq->q.num_descs);
+
 	err = ionic_lif_txq_init(txq);
 	if (err)
 		return err;
@@ -642,7 +641,7 @@ int __rte_cold
 ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 		uint16_t rx_queue_id,
 		uint16_t nb_desc,
-		uint32_t socket_id __rte_unused,
+		uint32_t socket_id,
 		const struct rte_eth_rxconf *rx_conf,
 		struct rte_mempool *mp)
 {
@@ -651,11 +650,6 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	uint64_t offloads;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Configuring RX queue %u with %u buffers",
-		rx_queue_id, nb_desc);
-
 	if (rx_queue_id >= lif->nrxqcqs) {
 		IONIC_PRINT(ERR,
 			"Queue index %u not available (max %u queues)",
@@ -664,13 +658,16 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 	}
 
 	offloads = rx_conf->offloads | eth_dev->data->dev_conf.rxmode.offloads;
+	IONIC_PRINT(DEBUG,
+		"Configuring skt %u RX queue %u with %u buffers, offloads %jx",
+		socket_id, rx_queue_id, nb_desc, offloads);
 
 	/* Validate number of receive descriptors */
 	if (!rte_is_power_of_2(nb_desc) ||
 			nb_desc < IONIC_MIN_RING_DESC ||
 			nb_desc > IONIC_MAX_RING_DESC) {
 		IONIC_PRINT(ERR,
-			"Bad number of descriptors (%u) for queue %u (min: %u)",
+			"Bad descriptor count (%u) for queue %u (min: %u)",
 			nb_desc, rx_queue_id, IONIC_MIN_RING_DESC);
 		return -EINVAL; /* or use IONIC_DEFAULT_RING_DESC */
 	}
@@ -687,7 +684,7 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 
 	err = ionic_rx_qcq_alloc(lif, rx_queue_id, nb_desc, &rxq);
 	if (err) {
-		IONIC_PRINT(ERR, "Queue allocation failure");
+		IONIC_PRINT(ERR, "Queue %d allocation failure", rx_queue_id);
 		return -EINVAL;
 	}
 
@@ -959,13 +956,11 @@ ionic_dev_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)
 	struct ionic_qcq *rxq;
 	int err;
 
-	IONIC_PRINT_CALL();
-
-	IONIC_PRINT(DEBUG, "Allocating RX queue buffers (size: %u)",
-		frame_size);
-
 	rxq = eth_dev->data->rx_queues[rx_queue_id];
 
+	IONIC_PRINT(DEBUG, "Starting RX queue %u, %u descs (size: %u)",
+		rx_queue_id, rxq->q.num_descs, frame_size);
+
 	err = ionic_lif_rxq_init(rxq);
 	if (err)
 		return err;
@@ -1045,7 +1040,7 @@ ionic_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)
 {
 	struct ionic_qcq *rxq;
 
-	IONIC_PRINT_CALL();
+	IONIC_PRINT(DEBUG, "Stopping RX queue %u", rx_queue_id);
 
 	rxq = eth_dev->data->rx_queues[rx_queue_id];
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 3/9] net/ionic: update documentation and MAINTAINERS
  2020-12-09 19:05               ` Andrew Boyer
@ 2020-12-10  9:23                 ` Ferruh Yigit
  0 siblings, 0 replies; 79+ messages in thread
From: Ferruh Yigit @ 2020-12-10  9:23 UTC (permalink / raw)
  To: Andrew Boyer; +Cc: dev, Alfredo Cardigliano, Thomas Monjalon, David Marchand

On 12/9/2020 7:05 PM, Andrew Boyer wrote:
> 
> 
>> On Dec 9, 2020, at 12:15 PM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
>>
>> On 12/9/2020 4:24 PM, Andrew Boyer wrote:
>>>> On Dec 9, 2020, at 10:24 AM, Ferruh Yigit <ferruh.yigit@intel.com <mailto:ferruh.yigit@intel.com>> wrote:
>>>>
>>>> On 12/9/2020 2:36 PM, Andrew Boyer wrote:
>>>>> Please respond to my questions this time. I have ~70 more patches to post by December 20.
>>>>>> On Dec 9, 2020, at 7:03 AM, Ferruh Yigit <ferruh.yigit@intel.com <mailto:ferruh.yigit@intel.com> <mailto:ferruh.yigit@intel.com <mailto:ferruh.yigit@intel.com>>> wrote:
>>>>>>
>>>>>> On 12/4/2020 8:16 PM, Andrew Boyer wrote:
>>>>>>> The UNMAINTAINED flag will be removed in a future patch.
>>>>>>> Signed-off-by: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io> <mailto:aboyer@pensando.io <mailto:aboyer@pensando.io>>>
>>>>>>> ---
>>>>>>>   MAINTAINERS                        |  3 ++-
>>>>>>>   doc/guides/nics/features/ionic.ini |  2 ++
>>>>>>>   doc/guides/nics/ionic.rst          | 13 +++++++------
>>>>>>>   3 files changed, 11 insertions(+), 7 deletions(-)
>>>>>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>>>>>> index eafe9f8c4..6534983c1 100644
>>>>>>> --- a/MAINTAINERS
>>>>>>> +++ b/MAINTAINERS
>>>>>>> @@ -841,7 +841,8 @@ F: drivers/net/pfe/
>>>>>>>   F: doc/guides/nics/features/pfe.ini
>>>>>>>     Pensando ionic - UNMAINTAINED
>>>>>>> -M: Alfredo Cardigliano <cardigliano@ntop.org <mailto:cardigliano@ntop.org> <mailto:cardigliano@ntop.org <mailto:cardigliano@ntop.org>>>
>>>>>>> +M: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io> <mailto:aboyer@pensando.io <mailto:aboyer@pensando.io>>>
>>>>>>> +M: Pensando Drivers <drivers@pensando.io <mailto:drivers@pensando.io> <mailto:drivers@pensando.io <mailto:drivers@pensando.io>>>
>>>>>>
>>>>>> Same comment from previous version, please don't add group as maintainer, only actual people.
>>>>> I responded to your original comment about this back in November. Is there an official DPDK policy against doing this? Is it your preference? We would very much prefer to have this in the file as a fallback. As long as there is still at least one person listed, what is the harm?
>>>>
>>>> There is no official policy against it as far as I know.
>>>>
>>>> The problem with the groups is we don't know who is behind it, it blurs who is the owner/responsible of the component. Actual people makes it clear that who is responsible.
>>>>
>>>> Why do you prefer to add a group as maintainer?
>>> Because if I am on leave for some reason, one of the other handful of maintainers might be able to help someone with a problem or a question.
>>> If I am listed specifically, doesn’t that make clear “who is the owner/responsible” for ionic PMD? What harm does having drivers@ listed do?
>>
>> If you want backups, pick and list a few of those handful maintainers and add to the list, so we can know who they are.
>>
>> As already said problem is we don't know who is behind a group, if they are reliable or not, or is there really someone or not, what happens if group become silent?
>> You can cc that group in your patches, that is commonly done, so they can be part of the development process, but the maintainers file is to define responsible people, adding a group is hiding actual responsible people.
> 
> Fine. Perhaps you could document somewhere that this requirement exists to save future people the trouble.
> 
> 
>>>>>>>   F: drivers/net/ionic/
>>>>>>>   F: doc/guides/nics/ionic.rst
>>>>>>>   F: doc/guides/nics/features/ionic.ini
>>>>>>> diff --git a/doc/guides/nics/features/ionic.ini b/doc/guides/nics/features/ionic.ini
>>>>>>> index 083c7bd99..dd29dbed6 100644
>>>>>>> --- a/doc/guides/nics/features/ionic.ini
>>>>>>> +++ b/doc/guides/nics/features/ionic.ini
>>>>>>> @@ -8,6 +8,7 @@ Speed capabilities   = Y
>>>>>>>   Link status          = Y
>>>>>>>   Link status event    = Y
>>>>>>>   Queue start/stop     = Y
>>>>>>> +Lock-free Tx queue   = Y
>>>>>>
>>>>>> Are you sure this is supported?
>>>>>> Since it is not advertised as capability, I think this can't be claimed as supported, but still even after this is added as capability, can you please confirm your device supports multiple core enqueue to same queue without locks?
>>>>> I misunderstood the meaning of this flag, will remove.
>>>>>>>   MTU update           = Y
>>>>>>>   Jumbo frame          = Y
>>>>>>>   Scattered Rx         = Y
>>>>>>> @@ -19,6 +20,7 @@ Unicast MAC filter   = Y
>>>>>>>   RSS hash             = Y
>>>>>>>   RSS key update       = Y
>>>>>>>   RSS reta update      = Y
>>>>>>> +SR-IOV               = Y
>>>>>>
>>>>>> Can you please explain what is exactly supported? Like can DPDK drive both PF & VF?
>>>>> Yes. The PMD does not distinguish between PFs and VFs.
>>>>>>
>>>>>> <...>
>>>>>>
>>>>>>> @@ -7,15 +7,16 @@ IONIC Driver
>>>>>>>   The ionic driver provides support for Pensando server adapters.
>>>>>>>   It currently supports the below models:
>>>>>>>   -- `Naples DSC-25 <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf> <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf <https://pensando.io/assets/documents/Naples-25_ProductBrief_10-2019.pdf>>>`_
>>>>>>> -- `Naples DSC-100 <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf> <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf <https://pensando.io/assets/documents/Naples_100_ProductBrief-10-2019.pdf>>>`_
>>>>>>> +- DSC-25 dual-port 25G Distributed Services Card
>>>>>>> +- DSC-100 dual-port 100G Distributed Services Card
>>>>>>>
>>>>>>
>>>>>> Same comment from previous version, can you provide link for these devices, it is hard to find the devices from the main site.
>>>>> And my same response from your previous comment. I do not control the website and do not wish to put stale PDF links in this document, which will live forever. The text includes the URL of the page containing links to the PDFs. Why is this not acceptable?
>>>>
>>>> The request is to put links to the products that you are providing the driver for. This is to help people that are already interested your driver and reading your driver document, to reach to the product information easily.
>>>>
>>>> The request is NOT to provide pdf etc, just a reference to the product. Don't you advertise your product in your official web site? If your product information is not visible/hidden, why you are providing the open source drivers for it?
>>> Does this line in the doc not satisfy your request?
>>> +The `Documents <https://pensando.io/documents/ <https://pensando.io/documents/>>`_ page contains Product Briefs and other product information.
>>
>> No it doesn't, it is not clear which document/product you are referring to.
>> Why it is hard to provide the link of products that your driver is for?
>>
> 
> Fine. These links will become stale next time the files are updated, just like the links in the 20.02-20.11 releases are stale.
> 
> https://pensando.io/wp-content/uploads/2020/03/Pensando-DSC-25-Product-Brief.pdf
> https://pensando.io/wp-content/uploads/2020/03/Pensando-DSC-100-Product-Brief.pdf
> 

If you are sure that they will go stale, that is also not good solution. Why 
they are keep getting stale? Can't you communicate internally in your company 
for permanent link?

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v3 9/9] net/ionic: minor logging fixups
  2020-12-09 19:26           ` Andrew Boyer
@ 2020-12-10  9:58             ` Ferruh Yigit
  0 siblings, 0 replies; 79+ messages in thread
From: Ferruh Yigit @ 2020-12-10  9:58 UTC (permalink / raw)
  To: Andrew Boyer; +Cc: dev, Alfredo Cardigliano

On 12/9/2020 7:26 PM, Andrew Boyer wrote:
> 
> 
>> On Dec 9, 2020, at 10:42 AM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
>>
>> On 12/9/2020 2:45 PM, Andrew Boyer wrote:
>>>> On Dec 9, 2020, at 8:47 AM, Ferruh Yigit <ferruh.yigit@intel.com <mailto:ferruh.yigit@intel.com>> wrote:
>>>>
>>>> On 12/4/2020 8:16 PM, Andrew Boyer wrote:
>>>>> Expose ionic_opcode_to_str() so it can be used for dev cmds, too.
>>>>> Store the device name in struct adapter.
>>>>> Switch to memcpy() to work around gcc false positives.
>>>>> Signed-off-by: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io>>
>>>>> ---
>>>>>   drivers/net/ionic/ionic.h         |  1 +
>>>>>   drivers/net/ionic/ionic_dev.c     |  5 +++
>>>>>   drivers/net/ionic/ionic_dev.h     |  2 +
>>>>>   drivers/net/ionic/ionic_ethdev.c  |  4 +-
>>>>>   drivers/net/ionic/ionic_lif.c     | 68 ++++++++++++++++---------------
>>>>>   drivers/net/ionic/ionic_mac_api.c |  4 +-
>>>>>   drivers/net/ionic/ionic_main.c    | 32 ++++++++-------
>>>>>   drivers/net/ionic/ionic_rxtx.c    | 41 ++++++++-----------
>>>>>   8 files changed, 84 insertions(+), 73 deletions(-)
>>>>
>>>> <...>
>>>>
>>>>> @@ -1217,12 +1221,11 @@ ionic_lif_notifyq_init(struct ionic_lif *lif)
>>>>> }
>>>>> };
>>>>>   -IONIC_PRINT(DEBUG, "notifyq_init.index %d",
>>>>> -ctx.cmd.q_init.index);
>>>>> -IONIC_PRINT(DEBUG, "notifyq_init.ring_base 0x%" PRIx64 "",
>>>>> -ctx.cmd.q_init.ring_base);
>>>>> +IONIC_PRINT(DEBUG, "notifyq_init.index %d", q->index);
>>>>> +IONIC_PRINT(DEBUG, "notifyq_init.ring_base %#jx", q->base_pa);
>>>>
>>>> There are lots of similar PRIx64 -> %j change in this patch,
>>>> '%j' specifier is for 'intmax_t' and which seems 64bit storage, so this should work with 64 bit variable 'q->base_pa',
>>>> but the variable is explicitly uint64_t why replacing 'PRIx64' usage which is correct and more common usage in the DPDK? Why ionic is want to do this in its own way, I am not clear of the motivation of these changes really, can you please clarify?
>>> As best I know, I am following the (two different) contribute guidelines pages, both of which direct submitters to run checkpatch. One of things checkpatch flags is lines over 80 columns. Many of these lines were over 80 columns or oddly broken to meet the 80 column limit.
>>> %j is used in many other places in this PMD - as originally written by Alfredo, one of your core contributors. If we are allowed to use %j, I want to, since I much prefer it to the hideous PRIx64.
>>
>> %j is accepted, that is not an issue. But you are making an active effort to convert PRIx64 -> %j, which is very unnecessary in my opinion.
> 
> Ferruh, I made these changes months ago. Changing them back now is going to take at least a few hours - many other changes are layered on top.
> 
>> 80 column limit is not for log strings, but even if you are fixing them that is different thing from the PRIx64 -> %j conversion, you can keep PRIx64 and stay in 80 columns, and indeed lots of the cases the column limit seems not an issue at all.
>>
>> Andrew, this is a driver currently marked as 'UNMAINTAINED', I kindly suggest focusing your 70+ functional changes instead of this PRIx64 -> %j syntax changes, but it is all up to you of course.
> 
> Apparently it is not up to me, though, is it? I would very much appreciate if you would respond to my request for a meeting, at any time you find convenient.
> 
> When I add new log messages in the future (including adding to these lists of FW values and response codes), should I use PRIx64 or %jx?

for the fixed size variables, like uint64_t or uint32_t, better to use PRInNN

> Should I expect your objection to a mix of PRIx64 and %jx in the same paragraph?
> Am I allowed to change from PRIx64 to %jx if I am also modifying the text or the value logged?
> 

If there is no real reason to change, like unless it is wrong/broken, please 
don't change them. So I think all PRIx64 -> %j changes in this patch can be dropped.

> This is going to involve respinning all of those functional patches, and since I am not a mind-reader it seems likely that this is going to take years.
> 

Discussing may take time, don't get down by it, it will be OK, it won't take 
years ;)
And I am aware rebasing can be hassle, but it can't be justification of a 
change, this is side affect of accumulating too many patches in the backlog 
unfortunately.

>>>> <...>
>>>>
>>>>> @@ -1448,8 +1450,9 @@ ionic_lif_set_name(struct ionic_lif *lif)
>>>>> },
>>>>> };
>>>>>   -snprintf(ctx.cmd.lif_setattr.name, sizeof(ctx.cmd.lif_setattr.name),
>>>>> -"%d", lif->port_id);
>>>>> +/* FW is responsible for NULL terminating this field */
>>>>> +memcpy(ctx.cmd.lif_setattr.name, lif->name,
>>>>> +sizeof(ctx.cmd.lif_setattr.name));
>>>>
>>>> Even though FW may be guaranting the string will be null terminated, won't it be nice to provide input as null terminated if this is the expectation?
>>> No, that is not the expectation. We prefer it to be this way.
>>
>> It is know that FW will add NULL terminate the string but you "prefer" to provide 'name' without NULL termination. Why?
>> "we prefer it to be this way" is not a good justification, please either change or explain in a logical way.
> 
> I will set the last character to NULL if that is what you want. I do not see how it serves any purpose.
> 
> -Andrew
> 


^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v5 3/9] net/ionic: update documentation and MAINTAINERS
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
@ 2020-12-10 12:01         ` Ferruh Yigit
  0 siblings, 0 replies; 79+ messages in thread
From: Ferruh Yigit @ 2020-12-10 12:01 UTC (permalink / raw)
  To: Andrew Boyer, dev; +Cc: Alfredo Cardigliano

On 12/10/2020 2:57 AM, Andrew Boyer wrote:
> The UNMAINTAINED flag will be removed in a future patch.
> 
> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
> ---
>   MAINTAINERS                        |  2 +-
>   doc/guides/nics/features/ionic.ini |  1 +
>   doc/guides/nics/ionic.rst          | 13 +++++++------
>   3 files changed, 9 insertions(+), 7 deletions(-)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index eafe9f8c4..7bc0010f2 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -841,7 +841,7 @@ F: drivers/net/pfe/
>   F: doc/guides/nics/features/pfe.ini
>   
>   Pensando ionic - UNMAINTAINED
> -M: Alfredo Cardigliano <cardigliano@ntop.org>
> +M: Andrew Boyer <aboyer@pensando.io>
>   F: drivers/net/ionic/
>   F: doc/guides/nics/ionic.rst
>   F: doc/guides/nics/features/ionic.ini

Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>

^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] [PATCH v5 0/9] net/ionic: minor updates and documentation
  2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 " Andrew Boyer
@ 2020-12-10 12:31         ` Ferruh Yigit
  2020-12-10 14:44           ` [dpdk-dev] Patchworks " Andrew Boyer
  0 siblings, 1 reply; 79+ messages in thread
From: Ferruh Yigit @ 2020-12-10 12:31 UTC (permalink / raw)
  To: Andrew Boyer, dev; +Cc: Alfredo Cardigliano

On 12/10/2020 2:57 AM, Andrew Boyer wrote:
> These patches make some minor changes to the ionic PMD.
> 
> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
> 
> ---
> v5:
> * Fix syntax error in .rst file
> 
> v4:
> * Address additional reviewer comments
> 
> v3:
> * Fixed up false-positives from codespell and gcc 8.3/9.3
> 
> v2:
> * Address Ferruh's comments (thank you!)
> * Switch to net/ionic: prefix
> * Leave UNMAINTAINED flag for now
> * Split patch 8 into patch 8 & 9; drop whitespace changes
> 
> Andrew Boyer (9):
>    net/ionic: connect ionic to the build system
>    net/ionic: update interface file to the latest version
>    net/ionic: update documentation and MAINTAINERS
>    net/ionic: check for cmd completion more frequently
>    net/ionic: remove some unused fields
>    net/ionic: convert 'deferred' boolean to a flag bit
>    net/ionic: warn if loopback mode is requested
>    net/ionic: minor refactorings and helper variables
>    net/ionic: minor logging fixups
> 

For series,
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>

Series applied to dpdk-next-net/main, thanks.

^ permalink raw reply	[flat|nested] 79+ messages in thread

* [dpdk-dev] Patchworks Re: [PATCH v5 0/9] net/ionic: minor updates and documentation
  2020-12-10 12:31         ` Ferruh Yigit
@ 2020-12-10 14:44           ` Andrew Boyer
  2020-12-10 15:06             ` Ferruh Yigit
  0 siblings, 1 reply; 79+ messages in thread
From: Andrew Boyer @ 2020-12-10 14:44 UTC (permalink / raw)
  To: Ferruh Yigit; +Cc: dev, Alfredo Cardigliano

Ferruh,
'After sending a new version of a patch, developers should set the previous patch as “Superseded”.'

Did this happen automatically for v4 & friends or did you do it? (I did not). I will do it in future if it is not automatic.

'When a patch is applied, it is set to “Accepted”.'

Does that happen automatically, or do you want to do it, or can I help by doing it myself?
(Or do you wait until it reaches main?)

-Andrew

> On Dec 10, 2020, at 7:31 AM, Ferruh Yigit <ferruh.yigit@intel.com> wrote:
> 
> On 12/10/2020 2:57 AM, Andrew Boyer wrote:
>> These patches make some minor changes to the ionic PMD.
>> Signed-off-by: Andrew Boyer <aboyer@pensando.io>
>> ---
>> v5:
>> * Fix syntax error in .rst file
>> v4:
>> * Address additional reviewer comments
>> v3:
>> * Fixed up false-positives from codespell and gcc 8.3/9.3
>> v2:
>> * Address Ferruh's comments (thank you!)
>> * Switch to net/ionic: prefix
>> * Leave UNMAINTAINED flag for now
>> * Split patch 8 into patch 8 & 9; drop whitespace changes
>> Andrew Boyer (9):
>>   net/ionic: connect ionic to the build system
>>   net/ionic: update interface file to the latest version
>>   net/ionic: update documentation and MAINTAINERS
>>   net/ionic: check for cmd completion more frequently
>>   net/ionic: remove some unused fields
>>   net/ionic: convert 'deferred' boolean to a flag bit
>>   net/ionic: warn if loopback mode is requested
>>   net/ionic: minor refactorings and helper variables
>>   net/ionic: minor logging fixups
> 
> For series,
> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com <mailto:ferruh.yigit@intel.com>>
> 
> Series applied to dpdk-next-net/main, thanks.



^ permalink raw reply	[flat|nested] 79+ messages in thread

* Re: [dpdk-dev] Patchworks Re: [PATCH v5 0/9] net/ionic: minor updates and documentation
  2020-12-10 14:44           ` [dpdk-dev] Patchworks " Andrew Boyer
@ 2020-12-10 15:06             ` Ferruh Yigit
  0 siblings, 0 replies; 79+ messages in thread
From: Ferruh Yigit @ 2020-12-10 15:06 UTC (permalink / raw)
  To: Andrew Boyer; +Cc: dev, Alfredo Cardigliano

On 12/10/2020 2:44 PM, Andrew Boyer wrote:
> Ferruh,
> 'After sending a new version of a patch, developers should set the previous 
> patch as “Superseded”.'
> 
> Did this happen automatically for v4 & friends or did you do it? (I did not). I 
> will do it in future if it is not automatic.
> 
> 'When a patch is applied, it is set to “Accepted”.'
> 
> Does that happen automatically, or do you want to do it, or can I help by doing 
> it myself?
> (Or do you wait until it reaches main?)
> 

Patchwork updates are not automatic, all done manually.

When a new version of patch(set) is sent, author should update the status of the 
previous version as 'Superseded'.

When patch is merged, patchwork status set as 'Accepted' by committer, author 
doesn't need to do that.

If you think existing documentation is not clear enough, would you mind sending 
a web patch [1] to clarify it, this can help others too.

[1] https://git.dpdk.org/tools/dpdk-web/


> -Andrew
> 
>> On Dec 10, 2020, at 7:31 AM, Ferruh Yigit <ferruh.yigit@intel.com 
>> <mailto:ferruh.yigit@intel.com>> wrote:
>>
>> On 12/10/2020 2:57 AM, Andrew Boyer wrote:
>>> These patches make some minor changes to the ionic PMD.
>>> Signed-off-by: Andrew Boyer <aboyer@pensando.io <mailto:aboyer@pensando.io>>
>>> ---
>>> v5:
>>> * Fix syntax error in .rst file
>>> v4:
>>> * Address additional reviewer comments
>>> v3:
>>> * Fixed up false-positives from codespell and gcc 8.3/9.3
>>> v2:
>>> * Address Ferruh's comments (thank you!)
>>> * Switch to net/ionic: prefix
>>> * Leave UNMAINTAINED flag for now
>>> * Split patch 8 into patch 8 & 9; drop whitespace changes
>>> Andrew Boyer (9):
>>>   net/ionic: connect ionic to the build system
>>>   net/ionic: update interface file to the latest version
>>>   net/ionic: update documentation and MAINTAINERS
>>>   net/ionic: check for cmd completion more frequently
>>>   net/ionic: remove some unused fields
>>>   net/ionic: convert 'deferred' boolean to a flag bit
>>>   net/ionic: warn if loopback mode is requested
>>>   net/ionic: minor refactorings and helper variables
>>>   net/ionic: minor logging fixups
>>
>> For series,
>> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com <mailto:ferruh.yigit@intel.com>>
>>
>> Series applied to dpdk-next-net/main, thanks.
> 


^ permalink raw reply	[flat|nested] 79+ messages in thread

end of thread, other threads:[~2020-12-10 15:06 UTC | newest]

Thread overview: 79+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-02 18:35 [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Andrew Boyer
2020-11-02 18:35 ` [dpdk-dev] [PATCH 1/8] ionic: update documentation and MAINTAINERS Andrew Boyer
2020-11-03 12:35   ` Ferruh Yigit
2020-11-03 14:43     ` Andrew Boyer
2020-11-02 18:35 ` [dpdk-dev] [PATCH 2/8] ionic: connect to the meson build system Andrew Boyer
2020-11-02 18:35 ` [dpdk-dev] [PATCH 3/8] ionic: update ionic_if.h to the latest version Andrew Boyer
2020-11-03 12:44   ` Ferruh Yigit
2020-11-03 14:36     ` Andrew Boyer
2020-11-03 15:55       ` Ferruh Yigit
2020-11-02 18:35 ` [dpdk-dev] [PATCH 4/8] ionic: check for devcmd/admincmd completion more frequently Andrew Boyer
2020-11-02 18:35 ` [dpdk-dev] [PATCH 5/8] ionic: remove some unused fields Andrew Boyer
2020-11-02 18:35 ` [dpdk-dev] [PATCH 6/8] ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
2020-11-02 18:35 ` [dpdk-dev] [PATCH 7/8] ionic: warn if RTE tries to enable loopback mode Andrew Boyer
2020-11-03 12:52   ` Ferruh Yigit
2020-11-02 18:35 ` [dpdk-dev] [PATCH 8/8] ionic: nits - whitespace, logging, helper variables Andrew Boyer
2020-11-03 13:06   ` Ferruh Yigit
2020-11-03 14:00     ` Andrew Boyer
2020-11-03 14:02       ` Ferruh Yigit
2020-11-03 13:11 ` [dpdk-dev] [PATCH 0/8] net/ionic: minor updates and documentation Ferruh Yigit
2020-11-03 14:45   ` Andrew Boyer
2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 0/9] " Andrew Boyer
2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 " Andrew Boyer
2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 " Andrew Boyer
2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 " Andrew Boyer
2020-12-10 12:31         ` Ferruh Yigit
2020-12-10 14:44           ` [dpdk-dev] Patchworks " Andrew Boyer
2020-12-10 15:06             ` Ferruh Yigit
2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 1/9] net/ionic: connect ionic to the build system Andrew Boyer
2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 2/9] net/ionic: update interface file to the latest version Andrew Boyer
2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
2020-12-10 12:01         ` Ferruh Yigit
2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 4/9] net/ionic: check for cmd completion more frequently Andrew Boyer
2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 5/9] net/ionic: remove some unused fields Andrew Boyer
2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 6/9] net/ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 7/9] net/ionic: warn if loopback mode is requested Andrew Boyer
2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
2020-12-10  2:57       ` [dpdk-dev] [PATCH v5 9/9] net/ionic: minor logging fixups Andrew Boyer
2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 1/9] net/ionic: connect ionic to the build system Andrew Boyer
2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 2/9] net/ionic: update interface file to the latest version Andrew Boyer
2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 4/9] net/ionic: check for cmd completion more frequently Andrew Boyer
2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 5/9] net/ionic: remove some unused fields Andrew Boyer
2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 6/9] net/ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 7/9] net/ionic: warn if loopback mode is requested Andrew Boyer
2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
2020-12-10  2:07     ` [dpdk-dev] [PATCH v4 9/9] net/ionic: minor logging fixups Andrew Boyer
2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 1/9] net/ionic: connect ionic to the build system Andrew Boyer
2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 2/9] net/ionic: update interface file to the latest version Andrew Boyer
2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
2020-12-09 12:03     ` Ferruh Yigit
2020-12-09 14:36       ` Andrew Boyer
2020-12-09 15:24         ` Ferruh Yigit
2020-12-09 16:24           ` Andrew Boyer
2020-12-09 17:15             ` Ferruh Yigit
2020-12-09 19:05               ` Andrew Boyer
2020-12-10  9:23                 ` Ferruh Yigit
2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 4/9] net/ionic: check for cmd completion more frequently Andrew Boyer
2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 5/9] net/ionic: remove some unused fields Andrew Boyer
2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 6/9] net/ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 7/9] net/ionic: warn if loopback mode is requested Andrew Boyer
2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
2020-12-09 13:04     ` Ferruh Yigit
2020-12-09 14:39       ` Andrew Boyer
2020-12-09 15:25         ` Ferruh Yigit
2020-12-04 20:16   ` [dpdk-dev] [PATCH v3 9/9] net/ionic: minor logging fixups Andrew Boyer
2020-12-09 13:47     ` Ferruh Yigit
2020-12-09 14:45       ` Andrew Boyer
2020-12-09 15:42         ` Ferruh Yigit
2020-12-09 19:26           ` Andrew Boyer
2020-12-10  9:58             ` Ferruh Yigit
2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 1/9] net/ionic: connect ionic to the build system Andrew Boyer
2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 2/9] net/ionic: update interface file to the latest version Andrew Boyer
2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 3/9] net/ionic: update documentation and MAINTAINERS Andrew Boyer
2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 4/9] net/ionic: check for cmd completion more frequently Andrew Boyer
2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 5/9] net/ionic: remove some unused fields Andrew Boyer
2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 6/9] net/ionic: convert 'deferred' boolean to a flag bit Andrew Boyer
2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 7/9] net/ionic: warn if loopback mode is requested Andrew Boyer
2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 8/9] net/ionic: minor refactorings and helper variables Andrew Boyer
2020-12-03 20:34 ` [dpdk-dev] [PATCH v2 9/9] net/ionic: minor logging fixups Andrew Boyer

DPDK patches and discussions

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