DPDK patches and discussions
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From: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
To: Jiawei Wang <jiaweiw@nvidia.com>,
	viacheslavo@nvidia.com, orika@nvidia.com, thomas@monjalon.net,
	Aman Singh <aman.deep.singh@intel.com>,
	Yuying Zhang <yuying.zhang@intel.com>,
	Ferruh Yigit <ferruh.yigit@amd.com>
Cc: dev@dpdk.org, rasland@nvidia.com
Subject: Re: [PATCH v2 2/2] ethdev: introduce the PHY affinity field in Tx queue API
Date: Wed, 1 Feb 2023 12:05:35 +0300	[thread overview]
Message-ID: <53ac9185-1f93-d3b3-010f-38c04d04a806@oktetlabs.ru> (raw)
In-Reply-To: <20230130170041.1360-3-jiaweiw@nvidia.com>

On 1/30/23 20:00, Jiawei Wang wrote:
> For the multiple hardware ports connect to a single DPDK port (mhpsdp),
> the previous patch introduces the new rte flow item to match the
> phy affinity of the received packets.
> 
> This patch adds the tx_phy_affinity setting in Tx queue API, the affinity

"This patch adds" -> "Add ..."

> value reflects packets be sent to which hardware port.
> Value 0 is no affinity and traffic will be routed between different
> physical ports,

Who will it be routed?

> if 0 is disabled then try to match on phy_affinity 0
> will result in an error.

Why are you talking about matching here?

> 
> Adds the new tx_phy_affinity field into the padding hole of rte_eth_txconf
> structure, the size of rte_eth_txconf keeps the same. Adds a suppress
> type for structure change in the ABI check file.
> 
> This patch adds the testpmd command line:
> testpmd> port config (port_id) txq (queue_id) phy_affinity (value)
> 
> For example, there're two hardware ports 0 and 1 connected to
> a single DPDK port (port id 0), and phy_affinity 1 stood for
> hardware port 0 and phy_affinity 2 stood for hardware port 1,
> used the below command to config tx phy affinity for per Tx Queue:
>          port config 0 txq 0 phy_affinity 1
>          port config 0 txq 1 phy_affinity 1
>          port config 0 txq 2 phy_affinity 2
>          port config 0 txq 3 phy_affinity 2
> 
> These commands config the TxQ index 0 and TxQ index 1 with phy affinity 1,
> uses TxQ 0 or TxQ 1 send packets, these packets will be sent from the
> hardware port 0, and similar with hardware port 1 if sending packets
> with TxQ 2 or TxQ 3.

Frankly speaking I dislike it. Why do we need to expose it on
generic ethdev layer? IMHO dynamic mbuf field would be a better
solution to control Tx routing to a specific PHY port.

IMHO, we definitely need dev_info information about a number of
physical ports behind. Advertising value greater than 0 should
mean that PMD supports corresponding mbuf dynamic field to
contol ongoing physical port on Tx (or should just reject
packets on prepare which try to specify outgoing phy port
otherwise). In the same way the information may be provided
on Rx.

I'm OK to have 0 as no phy affinity value and greater than
zero as specified phy affinity. I.e. no dynamic flag is
required.

Also I think that order of patches should be different.
We should start from a patch which provides dev_info and
flow API matching and action should be in later patch.

> 
> Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>

[snip]


  parent reply	other threads:[~2023-02-01  9:05 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <http://patches.dpdk.org/project/dpdk/cover/20221221102934.13822-1-jiaweiw@nvidia.com/>
2023-01-30 17:00 ` [PATCH v2 0/2] add new PHY affinity in the flow item and " Jiawei Wang
2023-01-30 17:00   ` [PATCH v2 1/2] ethdev: add PHY affinity match item Jiawei Wang
2023-01-31 14:36     ` Ori Kam
2023-02-01  8:50     ` Andrew Rybchenko
2023-02-01 14:59       ` Jiawei(Jonny) Wang
2023-01-30 17:00   ` [PATCH v2 2/2] ethdev: introduce the PHY affinity field in Tx queue API Jiawei Wang
2023-01-31 17:26     ` Thomas Monjalon
2023-02-01  9:45       ` Jiawei(Jonny) Wang
2023-02-01  9:05     ` Andrew Rybchenko [this message]
2023-02-01 15:50       ` Jiawei(Jonny) Wang
2023-02-02  9:28         ` Andrew Rybchenko
2023-02-02 14:43           ` Thomas Monjalon

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