From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pd0-f182.google.com (mail-pd0-f182.google.com [209.85.192.182]) by dpdk.org (Postfix) with ESMTP id DEB62677B for ; Fri, 31 Oct 2014 01:45:30 +0100 (CET) Received: by mail-pd0-f182.google.com with SMTP id fp1so6224620pdb.27 for ; Thu, 30 Oct 2014 17:54:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=message-id:date:from:user-agent:mime-version:to:subject:references :in-reply-to:content-type; bh=qGWoAQgSjQ10Da7L8BZ1M8i083HFL3UGbcdjFeWqjyI=; b=KjswIlkgHjP3GSn9n8gMwnSVIus/HIs8ONh8cpaKKcy/8yQ3k+ABsvzNDMS7fU/Hqp cw5wCcz8BYUBTUibRa0urS8B0KqCWbfhdjtN9kwej0NX/oG2Lk7+cQCi2GFchDeLZTfi b+q0QzsMjFFlFYL4R3dy8ZDTjZiawg3jYnJB9q01GoaZxKiFyJmlheaynbyxUvEBufts dIVR3Y2P3QwKCMkNMWVwI6WoWBeKKPwUcbStRiTJaNXO4jaE+5rJJaijFlCkEveUErgZ RNMowm/bRoTv90vnIDQIrV4dcJcTv9R19d5s49eIFunbY/wcVi5YZGJCoq9y/nT4NGPv fBXg== X-Received: by 10.66.252.34 with SMTP id zp2mr21429752pac.64.1414716868312; Thu, 30 Oct 2014 17:54:28 -0700 (PDT) Received: from [192.168.10.58] ([122.49.119.83]) by mx.google.com with ESMTPSA id np11sm8231525pdb.78.2014.10.30.17.54.21 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 Oct 2014 17:54:27 -0700 (PDT) Message-ID: <5452DD2C.8030402@gmail.com> Date: Fri, 31 Oct 2014 09:51:56 +0900 From: Gyumin User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: Bruce Richardson , dev@dpdk.org References: <5451E980.2060707@gmail.com> <20141030095522.GA4460@bricha3-MOBL3> In-Reply-To: <20141030095522.GA4460@bricha3-MOBL3> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: Re: [dpdk-dev] Relationship between H/W ring and S/W ring X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 31 Oct 2014 00:45:31 -0000 Thanks Bruce. I also agree with that the size of the S/W ring depends on the configuration parameters because the size of the S/W ring is /sizeof(struct igb_rx_entry) * len/ in the ixgbe_dev_rx_queue_setup function. H/W ring is also allocated in the same function by using the ring_dma_zone_reserve function, and its size is RX_RING_SZ. I don't think the RX_RING_SZ is configurable but it is fixed value. Is there any other code configuring the size of H/W ring? 2014-10-30 오후 6:55에 Bruce Richardson 이(가) 쓴 글: > On Thu, Oct 30, 2014 at 04:32:16PM +0900, Gyumin wrote: >> Hi >> >> I`m reading the ixgbe code especially about H/W ring and S/W ring. Is the >> relationship between H/W ring and S/W ring one-to-one mapping? >> As far as I know, H/W ring size is determined in the code(hard coded) while >> S/W ring size is determined in port configuration time. >> In the ixgbe_rx_alloc_bufs function, H/W ring header address and packet >> address indicate the DMA address of S/W ring's mbuf. I understand it means >> that the relationship between the H/W ring and S/W ring is one-to-one >> mapping. For example, if the size of H/W ring is greater than the size of >> S/W ring then some portion of H/W ring is unused. Is it correct? >> >> Thanks > Hi, > > Yes, there is a 1:1 mapping between the hardware and software ring entries, and both are sized depending on the configuration parameters passed to the ring setup APIs. As you state, the HW ring contains the DMA addresses of the packet buffers, while the sw_ring contains the pointers to the original mbufs. The two rings are always kept in sync in the code. > > /Bruce >