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* [dpdk-dev] Relationship between H/W ring and S/W ring
@ 2014-10-30  7:32 Gyumin
  2014-10-30  9:55 ` Bruce Richardson
  0 siblings, 1 reply; 5+ messages in thread
From: Gyumin @ 2014-10-30  7:32 UTC (permalink / raw)
  To: dev


I`m reading the ixgbe code especially about H/W ring and S/W ring. Is 
the relationship between H/W ring and S/W ring one-to-one mapping?
As far as I know, H/W ring size is determined in the code(hard coded) 
while S/W ring size is determined in port configuration time.
In the ixgbe_rx_alloc_bufs function, H/W ring header address and packet 
address indicate the DMA address of S/W ring's mbuf. I understand it 
means that the relationship between the H/W ring and S/W ring is 
one-to-one mapping. For example, if the size of H/W ring is greater than 
the size of  S/W ring then some portion of H/W ring is unused. Is it 


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2014-11-01 13:43 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-10-30  7:32 [dpdk-dev] Relationship between H/W ring and S/W ring Gyumin
2014-10-30  9:55 ` Bruce Richardson
2014-10-31  0:51   ` Gyumin
2014-10-31 10:08     ` Bruce Richardson
2014-11-01 13:52       ` GyuminHwang

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