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From: Gyumin <hkm73560@gmail.com>
To: dev@dpdk.org
Subject: [dpdk-dev] Intel 82599 tx_conf setting
Date: Wed, 05 Nov 2014 09:43:43 +0900	[thread overview]
Message-ID: <545972BF.9080100@gmail.com> (raw)

Hi

I've read the Intel 82599 official manual and I found that optimal 
PTHRESH is the tx descriptor buffer size - N (N is CPU cache line 
divided by 16).
1. I guess the size of the tx descriptor buffer is 128. Isn't it right?
    Where is the size of the tx descriptor buffer in the official manual?

2. What it means that the TX_PTHRESH=36 in the testpmd.c?
    If the size of tx descriptor buffer is 128 then optimal thresholds 
to minimize latency are pthresh=4(cache line / 16), hthresh=0 and 
wthresh=0. Is there something I missed?


Thanks.

                 reply	other threads:[~2014-11-05  0:36 UTC|newest]

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