From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 558BD376E for ; Tue, 12 May 2015 03:07:09 +0200 (CEST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP; 11 May 2015 18:07:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,411,1427785200"; d="scan'208";a="569824736" Received: from shwdeisgchi017.ccr.corp.intel.com (HELO [10.239.66.47]) ([10.239.66.47]) by orsmga003.jf.intel.com with ESMTP; 11 May 2015 18:07:07 -0700 Message-ID: <55515239.4030601@intel.com> Date: Tue, 12 May 2015 09:07:05 +0800 From: "Liang, Cunming" User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:31.0) Gecko/20100101 Thunderbird/31.5.0 MIME-Version: 1.0 To: Stephen Hemminger References: <1425012976-10173-1-git-send-email-cunming.liang@intel.com> <1430804386-28949-1-git-send-email-cunming.liang@intel.com> <1430804386-28949-9-git-send-email-cunming.liang@intel.com> <20150505113611.1359e2d8@urahara> <55503E98.805@intel.com> <20150511080019.2b7b2982@urahara> In-Reply-To: <20150511080019.2b7b2982@urahara> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Cc: dev@dpdk.org Subject: Re: [dpdk-dev] [PATCH v7 08/10] ixgbe: enable rx queue interrupts for both PF and VF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 May 2015 01:07:09 -0000 On 5/11/2015 11:00 PM, Stephen Hemminger wrote: > On Mon, 11 May 2015 13:31:04 +0800 > "Liang, Cunming" wrote: > >>> Since MSI-X vectors are limited on many hardware platforms, this whole API >>> should be changed so that max_intr is based on number of rx_queues actually >>> used by the application. That means the setup needs to move from init to configure. >> [LCM] When MSI-X is not used, intr_vec and set max_intr are useless. It >> doesn't matter to non MSI-X mode. >> As it allows the sequence "dev_stop->dev_reconfig->dev_start", the real >> used number of queue may change. >> So allocation only on dev_init and release only on dev_close, just make >> it simple. During configure_msix, it do use the real useful queue number >> to set queue/vector mapping, refer xxx_configure_msix(). > The problem is that if a customer has 16 NIC's with 32 MSI vectors per NIC, > it maybe that the MSI table in south bridge gets full. That is why the ixgbe > driver for Linux limits itself to num_online_cpu() + 1 MSI interrrupts. > [LCM] So your concern actual is not about when to allocate the queue/vec mapping table, but the number of vectors enabled per NIC. But even using num_online_cpu()+1, the number of online cpu on a 2U system is easy to exceed 32. So probably using a MSI_VECTOR_NB_MAX to define it in config.