From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wi0-f178.google.com (mail-wi0-f178.google.com [209.85.212.178]) by dpdk.org (Postfix) with ESMTP id 3331B5A5D for ; Tue, 27 Oct 2015 19:47:50 +0100 (CET) Received: by wicfx6 with SMTP id fx6so172765752wic.1 for ; Tue, 27 Oct 2015 11:47:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cloudius-systems_com.20150623.gappssmtp.com; s=20150623; h=subject:to:references:cc:from:message-id:date:user-agent :mime-version:in-reply-to:content-type:content-transfer-encoding; bh=4jwA9/0ictxvENrFcDqIVn3UTWcWmWhS90jahEZWoWc=; b=QVy/9DOrtRsDFalRREE0j6J24y9XVx5YgvIkxUy4/NgIrBCdlhCYFkCV7n00f+5252 TnbQDnkiX4dyI0V4MFMXGqkBJAQHQVOe5eunqnUE2iC4unwSmx3pe9B5AXVsklZ1+PVI dOGs/wAhyP9wpv7C0/x5haHD0HNV+nrrV3dGsWgJlZZqxct8MdlWq1AnOFwtfy9eQEz1 hy0lp34o6LqCEI5sdRasMuX/rPTaLtzlmtdfyJii/UXZjZyiHxM0FDFyIFRevBkLe0jY bb+ahguByk278uGlTDFFYHixf2TqyPu36PY/b+OETHH68J435GoMk45dtIK+n9Qjeqh3 a72g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:subject:to:references:cc:from:message-id:date :user-agent:mime-version:in-reply-to:content-type :content-transfer-encoding; bh=4jwA9/0ictxvENrFcDqIVn3UTWcWmWhS90jahEZWoWc=; b=f0OFfLEPi411Ygr+mTFjdmrX8ycjX46ClrnoPw7LP6Vu0OZjf8LNeNgRTt5GpYNFAL hW30YCppV1ZuEjipXstgWGCWKfsW3yALKKCjhIB4UuNjS3qMiKsZqE4kGXdP2eaJekpe YHH7ha8dvxeFECbhYUXRVxiS3E59GwucoXkh0RnaEBSZGJtms2uBWUElamVFnCSUgHB5 HnV3MAxngeobdepdXNfTdZ5e/omB2iLtdIPGBMOIBmeU9dBSCHW3RHjUphs4rxH1XssH pJdhiZ2j5wzhkP58PYorg0W8LL0h+609dc73Dzyo2uEAP5lQIb6BZ+sKWCboyZQklVKy jtZw== X-Gm-Message-State: ALoCoQlOZiTLUeGO1K60acmXY6Nhu2ajrgJV84lf5GwHWx+OJPhwNPdcNH7tsmxddS8um0piMCpH X-Received: by 10.194.24.38 with SMTP id r6mr32433371wjf.5.1445971669981; Tue, 27 Oct 2015 11:47:49 -0700 (PDT) Received: from [10.0.0.2] (bzq-79-180-197-252.red.bezeqint.net. [79.180.197.252]) by smtp.googlemail.com with ESMTPSA id ju5sm21772649wjc.1.2015.10.27.11.47.48 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Oct 2015 11:47:49 -0700 (PDT) To: Thomas Monjalon , Konstantin Ananyev , helin.zhang@intel.com References: <1440085070-13989-1-git-send-email-vladz@cloudius-systems.com> <55DAD1C9.3010802@cloudius-systems.com> <1764015.lv7zT9MUyf@xps13> From: Vlad Zolotarov Message-ID: <562FC6D4.8000202@cloudius-systems.com> Date: Tue, 27 Oct 2015 20:47:48 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.1.0 MIME-Version: 1.0 In-Reply-To: <1764015.lv7zT9MUyf@xps13> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Cc: dev@dpdk.org, jeffrey.t.kirsher@intel.com, jesse.brandeburg@intel.com Subject: Re: [dpdk-dev] [PATCH v4] ixgbe_pmd: enforce RS bit on every EOP descriptor for devices newer than 82598 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 Oct 2015 18:47:50 -0000 On 10/27/15 20:09, Thomas Monjalon wrote: > Any Follow-up to this discussion? > Should we mark this patch as rejected? Hmmm... This patch fixes an obvious spec violation. Why would it be rejected? > > 2015-08-24 11:11, Vlad Zolotarov: >> On 08/20/15 18:37, Vlad Zolotarov wrote: >>> According to 82599 and x540 HW specifications RS bit *must* be >>> set in the last descriptor of *every* packet. >>> >>> Before this patch there were 3 types of Tx callbacks that were setting >>> RS bit every tx_rs_thresh descriptors. This patch introduces a set of >>> new callbacks, one for each type mentioned above, that will set the RS >>> bit in every EOP descriptor. >>> >>> ixgbe_set_tx_function() will set the appropriate Tx callback according >>> to the device family. >> [+Jesse and Jeff] >> >> I've started to look at the i40e PMD and it has the same RS bit >> deferring logic >> as ixgbe PMD has (surprise, surprise!.. ;)). To recall, i40e PMD uses a >> descriptor write-back >> completion mode. >> >> From the HW Spec it's unclear if RS bit should be set on *every* descriptor >> with EOP bit. However I noticed that Linux driver, before it moved to >> HEAD write-back mode, was setting RS >> bit on every EOP descriptor. >> >> So, here is a question to Intel guys: could u, pls., clarify this point? >> >> Thanks in advance, >> vlad > >