From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) by dpdk.org (Postfix) with ESMTP id 8277B2A63 for ; Tue, 16 Jan 2018 01:22:00 +0100 (CET) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 0E8D320E35; Mon, 15 Jan 2018 19:22:00 -0500 (EST) Received: from frontend1 ([10.202.2.160]) by compute1.internal (MEProxy); Mon, 15 Jan 2018 19:22:00 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-sender :x-me-sender:x-sasl-enc; s=mesmtp; bh=RlCOzR3iZ4awDLkq5/yBEaaBP9 djZapNJE1WvXb5UAY=; b=pmFlkI2eK71juSO5iK1BZEEbe4VuM9ulPNYHfb0qiZ 3cM5ZW/vPMo5hy/tq2zYf+1hgZW21LEOiHzjVNLh86LSxK3jXCe+IaQ+l7AZMHk8 /P0aC98+B09uPcWuRXI6Uxg4ZfWVB/sg2TL7x6yYCr70SialcYo+n+egG1IqgALU M= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=RlCOzR 3iZ4awDLkq5/yBEaaBP9djZapNJE1WvXb5UAY=; b=U8HYiz1lZeyv0lcpCZvgIv 1RZNZ6Vm2WvYNqdjGwAwSiDQBqtHiK1eyk/LTp5xihHV9tey2qevXwB/GLh60zWV Kw1KAQsWhM6lPOWggtQT+3LnPAv5//0oazPp/f2IYT6OEI9IcYyxI9X6yzVwE94g zOojTsUE1Vegu9r6cVlORCfNhJm2teufDUeYyF+UQHKoBm7DdcDRh6jtYkZQEEhX K7B5AArriip7l5E3rezGzzuclO+V/m45uD+zFFn3zAH4ww7tPADypiLdt1AS+5gC u3WvVEL5mfQKrjgbEyk4tuTeRNZ7h3p2JAiXjGlczxKcD3QTziDh0sLrH3EY/97A == X-ME-Sender: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id B89627E353; Mon, 15 Jan 2018 19:21:59 -0500 (EST) From: Thomas Monjalon To: dev@dpdk.org Cc: jerin.jacob@caviumnetworks.com, jia.he@hxt-semitech.com Date: Tue, 16 Jan 2018 01:21:28 +0100 Message-ID: <5787318.2SUBePpODR@xps> In-Reply-To: <20180115235934.16054-1-thomas@monjalon.net> References: <20180115235934.16054-1-thomas@monjalon.net> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH] eal/arm64: fix memory barrier macros X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Jan 2018 00:22:00 -0000 16/01/2018 00:59, Thomas Monjalon: > The macros dsb and dmb are defined as an instruction block with braces. > As a consequence, when it is used in if/else without brace: > if (cond) > rte_mb(); > else > statement; > the added semicolon is parsed outside of if/else, > so the "else" cannot match the "if": > if (cond) { > asm volatile("dsb sy" : : : "memory"); > } > ; > else > statement > > The solution is either to use the "do { } while (0)" construct, > or simply remove the braces because there is only one statement. > > Fixes: 84733fd0d75e ("eal/arm64: fix memory barrier definition") Just seen there is already a patch doing the same thing by Jia He: https://dpdk.org/patch/31896 This patch is in a series waiting for required changes.