From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 4BFC52C37 for ; Thu, 4 Aug 2016 11:02:11 +0200 (CEST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP; 04 Aug 2016 02:02:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,470,1464678000"; d="scan'208";a="1019479760" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.237.220.104]) ([10.237.220.104]) by fmsmga001.fm.intel.com with ESMTP; 04 Aug 2016 02:02:10 -0700 To: Daniel Mrzyglod , dev@dpdk.org References: <1470224651-105433-1-git-send-email-danielx.t.mrzyglod@intel.com> From: Ferruh Yigit Message-ID: <57A30490.9000804@intel.com> Date: Thu, 4 Aug 2016 10:02:08 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.7.2 MIME-Version: 1.0 In-Reply-To: <1470224651-105433-1-git-send-email-danielx.t.mrzyglod@intel.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH] examples/exception_path: fix shift operation in lcore setup X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Aug 2016 09:02:11 -0000 On 8/3/2016 12:44 PM, Daniel Mrzyglod wrote: > The operaton may have an undefined behavior or yield to an unexpected result. > A bit shift operation has a shift amount which is too large or has a negative value. > > Coverity issue: 30688 > Fixes: ea977ff1cb0b ("examples/exception_path: fix shift operation in lcore setup") > The previous patch forget to fix values also for input_cores_mask > > Signed-off-by: Daniel Mrzyglod > --- > examples/exception_path/main.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/examples/exception_path/main.c b/examples/exception_path/main.c > index e5eedcc..88e7708 100644 > --- a/examples/exception_path/main.c > +++ b/examples/exception_path/main.c > @@ -341,7 +341,7 @@ setup_port_lcore_affinities(void) > > /* Setup port_ids[] array, and check masks were ok */ > RTE_LCORE_FOREACH(i) { > - if (input_cores_mask & (1ULL << i)) { > + if (input_cores_mask & (1ULL << (i & 0x3f))) { I guess 0x3f is because "unsigned long long" is 64bits long, not sure if we should hardcode this assumption. ULL can be >= 64bits. RTE_LCORE_FOREACH(i) already makes sure "i" < RTE_MAX_CORE, and RTE_MAX_CORE is 128 with current default config. So if user provides a core value > 64, it is valid but will be ignored because of this check. Another thing is "input_cores_mask" is also 64bits long, so even this fixed application will not able to use this setting correctly. I think it is good to a) add flexible variable size set_bit/clear_bit/test_bit functions, like Linux ones b) make "input_cores_mask" an array that is large enough to keep RTE_MAX_CORE Although not sure if that is too much effort for this fix. > /* Skip ports that are not enabled */ > while ((ports_mask & (1 << rx_port)) == 0) { > rx_port++; >