From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 581B3A0547; Wed, 21 Apr 2021 13:59:28 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0A0AD41A8F; Wed, 21 Apr 2021 13:59:28 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id E300441A72 for ; Wed, 21 Apr 2021 13:59:25 +0200 (CEST) IronPort-SDR: 9Qkn3HZeghnJmO3Bd0imRmtZW0NT6gwjIW8DvsLkhXUVNbWMWRkiuYwSmA5F/94t+K6EEwjctW E3dIfqGJcDFA== X-IronPort-AV: E=McAfee;i="6200,9189,9960"; a="195239767" X-IronPort-AV: E=Sophos;i="5.82,238,1613462400"; d="scan'208";a="195239767" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Apr 2021 04:59:24 -0700 IronPort-SDR: 9CqDILZ5YjqNv8nEm2WsoIa0XxoP0Ej2bhlJPPPPC+3Av2X/o6EVlmzKRyJVRZUB5UuwKcFVWE MbPBbjyPYL4w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,238,1613462400"; d="scan'208";a="617319541" Received: from fmsmsx604.amr.corp.intel.com ([10.18.126.84]) by fmsmga005.fm.intel.com with ESMTP; 21 Apr 2021 04:59:24 -0700 Received: from shsmsx605.ccr.corp.intel.com (10.109.6.215) by fmsmsx604.amr.corp.intel.com (10.18.126.84) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Wed, 21 Apr 2021 04:59:23 -0700 Received: from shsmsx601.ccr.corp.intel.com (10.109.6.141) by SHSMSX605.ccr.corp.intel.com (10.109.6.215) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Wed, 21 Apr 2021 19:59:16 +0800 Received: from shsmsx601.ccr.corp.intel.com ([10.109.6.141]) by SHSMSX601.ccr.corp.intel.com ([10.109.6.141]) with mapi id 15.01.2106.013; Wed, 21 Apr 2021 19:59:15 +0800 From: "Zhang, Qi Z" To: "Wang, Haiyue" , "dev@dpdk.org" CC: "Wang, Liang-min" Thread-Topic: [PATCH v1 0/3] Fix PF reset causes VF memory request failure Thread-Index: AQHXNm5Xyi6rP3v0c0qQXJmZ/39Bxqq+3YoQ Date: Wed, 21 Apr 2021 11:59:15 +0000 Message-ID: <5806f9ba227842a79c8c0c31e9e72159@intel.com> References: <20210421050243.130585-1-haiyue.wang@intel.com> In-Reply-To: <20210421050243.130585-1-haiyue.wang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.5.1.3 dlp-product: dlpe-windows x-originating-ip: [10.239.127.36] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v1 0/3] Fix PF reset causes VF memory request failure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Wang, Haiyue > Sent: Wednesday, April 21, 2021 1:03 PM > To: dev@dpdk.org > Cc: Zhang, Qi Z ; Wang, Liang-min > ; Wang, Haiyue > Subject: [PATCH v1 0/3] Fix PF reset causes VF memory request failure >=20 > By triggerring the VF reset from PF reset, > echo 1 > /sys/bus/pci/devices/PF-BDF/reset >=20 > the PCI bus master bit will cleared on VF, so the VF needs to enable this= bit > before restart. >=20 > This patch set adds the API to enable PCI bus master. >=20 > Haiyue Wang (3): > bus/pci: enable PCI master in command register > net/iavf: enable PCI bus master after reset > net/i40e: enable PCI bus master after reset >=20 > drivers/bus/pci/pci_common.c | 20 ++++++++++++++++++++ > drivers/bus/pci/rte_bus_pci.h | 12 ++++++++++++ > drivers/bus/pci/version.map | 1 + > drivers/net/i40e/i40e_ethdev_vf.c | 7 ++++++- > drivers/net/iavf/iavf_ethdev.c | 3 +++ > lib/librte_pci/rte_pci.h | 4 ++++ > 6 files changed, 46 insertions(+), 1 deletion(-) >=20 > -- > 2.31.1 Tested-by: Qi Zhang on iavf with ice kernel PF. Thanks Qi