From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7E5B9A00E6 for ; Mon, 8 Jul 2019 10:59:44 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6CF823195; Mon, 8 Jul 2019 10:59:43 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id F2C722F42; Mon, 8 Jul 2019 10:59:40 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Jul 2019 01:59:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,466,1557212400"; d="scan'208";a="248755172" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga001.jf.intel.com with ESMTP; 08 Jul 2019 01:59:39 -0700 Received: from fmsmsx120.amr.corp.intel.com (10.18.124.208) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 8 Jul 2019 01:59:38 -0700 Received: from shsmsx154.ccr.corp.intel.com (10.239.6.54) by fmsmsx120.amr.corp.intel.com (10.18.124.208) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 8 Jul 2019 01:59:38 -0700 Received: from shsmsx105.ccr.corp.intel.com ([169.254.11.232]) by SHSMSX154.ccr.corp.intel.com ([169.254.7.240]) with mapi id 14.03.0439.000; Mon, 8 Jul 2019 16:59:36 +0800 From: "Pei, Andy" To: "Zhang, Qi Z" , "dev@dpdk.org" CC: "Wu, Jingjing" , "Xing, Beilei" , "Yigit, Ferruh" , "Xu, Rosen" , "Ye, Xiaolong" , "Zhang, Roy Fan" , "stable@dpdk.org" Thread-Topic: [PATCH v3] net/i40e: i40e get link status update from ipn3ke Thread-Index: AQHVMjaC2Oolegwk1kOB+OnZ9cNzj6bABWOggABs3WA= Date: Mon, 8 Jul 2019 08:59:35 +0000 Message-ID: <5941F446C088714A85408FA3132CFCBB01045CC6@SHSMSX105.ccr.corp.intel.com> References: <1561710791-356325-1-git-send-email-andy.pei@intel.com> <1562223367-292259-1-git-send-email-andy.pei@intel.com> <039ED4275CED7440929022BC67E7061153D613B5@SHSMSX105.ccr.corp.intel.com> In-Reply-To: <039ED4275CED7440929022BC67E7061153D613B5@SHSMSX105.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3] net/i40e: i40e get link status update from ipn3ke X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Yes. I think you are right. I will try your suggestion. -----Original Message----- From: Zhang, Qi Z=20 Sent: Monday, July 8, 2019 1:56 PM To: Pei, Andy ; dev@dpdk.org Cc: Wu, Jingjing ; Xing, Beilei ; Yigit, Ferruh ; Xu, Rosen = ; Ye, Xiaolong ; Zhang, Roy Fan ; stable@dpdk.org Subject: RE: [PATCH v3] net/i40e: i40e get link status update from ipn3ke Hi Andy: > -----Original Message----- > From: Pei, Andy > Sent: Thursday, July 4, 2019 2:56 PM > To: dev@dpdk.org > Cc: Pei, Andy ; Zhang, Qi Z=20 > ; Wu, Jingjing ; Xing,=20 > Beilei ; Yigit, Ferruh=20 > ; Xu, Rosen ; Ye, Xiaolong=20 > ; Zhang, Roy Fan ;=20 > stable@dpdk.org > Subject: [PATCH v3] net/i40e: i40e get link status update from ipn3ke >=20 > Add switch_mode argument for i40e PF to specify the specific FPGA that=20 > i40e PF is connected to. i40e PF get link status update via the connected= FPGA. > Add switch_ethdev to rte_eth_dev_data to track the bind switch device. > Try to bind i40e pf to switch device when i40e device is probed. If it=20 > fail to find correct switch device, bind will occur again when update=20 > i40e device link status. > ...... =20 > int > i40e_dev_link_update(struct rte_eth_dev *dev, > int wait_to_complete) > @@ -2786,6 +2905,8 @@ void i40e_flex_payload_reg_set_default(struct > i40e_hw *hw) > struct i40e_hw *hw =3D > I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); > struct rte_eth_link link; > bool enable_lse =3D dev->data->dev_conf.intr_conf.lsc ? true : false; > + struct rte_pci_device *pci_dev =3D RTE_ETH_DEV_TO_PCI(dev); > + struct rte_devargs *devargs; > int ret; >=20 > memset(&link, 0, sizeof(link)); > @@ -2800,6 +2921,16 @@ void i40e_flex_payload_reg_set_default(struct > i40e_hw *hw) > else > update_link_aq(hw, &link, enable_lse, wait_to_complete); >=20 > + if (!dev->data->switch_ethdev) { > + devargs =3D pci_dev->device.devargs; > + if (devargs) > + dev->data->switch_ethdev =3D > + i40e_get_switch_ethdev_from_devargs( > + pci_dev->device.devargs); > + } For regular mode, switch_ethdev is always null, seems above code did unnece= ssary devargs parsing for every link_update call Can we add an intermediate= flag (add a field in i40e_pf indicate if switch mode is required like othe= r devargs ) so during probe this flag can be initialized, and it can be reu= sed later. So all switch mode related code can be braces with that flag.=20 If (xxx_flag) { ..... } > + i40e_pf_linkstatus_get_from_switch_ethdev(dev->data->switch_ethdev, > + &link); Why i40e_pf_linkstatus_get_from_switch_ethdev is always be called?, should = we do If (dev->data->switch_ethdev) i40e_pf_linkstatus_get_from_switch_ethdev(dev->data->switch_ethdev, &link)= ;