From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BB872A2E1B for ; Wed, 4 Sep 2019 04:06:05 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7C9CF1EBD3; Wed, 4 Sep 2019 04:06:05 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 20A451EBAA for ; Wed, 4 Sep 2019 04:06:03 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Sep 2019 19:06:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,465,1559545200"; d="scan'208";a="212212707" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga002.fm.intel.com with ESMTP; 03 Sep 2019 19:06:02 -0700 Received: from shsmsx108.ccr.corp.intel.com (10.239.4.97) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 3 Sep 2019 19:06:02 -0700 Received: from shsmsx105.ccr.corp.intel.com ([169.254.11.23]) by SHSMSX108.ccr.corp.intel.com ([169.254.8.146]) with mapi id 14.03.0439.000; Wed, 4 Sep 2019 10:06:00 +0800 From: "Pei, Andy" To: "Ye, Xiaolong" CC: "dev@dpdk.org" , "Zhang, Qi Z" , "Yigit, Ferruh" , "Xu, Rosen" Thread-Topic: [PATCH v4] net/ipn3ke: setup MTU when HW init Thread-Index: AQHVYlw5FS+JFDz04U+fjiU1BmxgCacaxb7Q Date: Wed, 4 Sep 2019 02:05:59 +0000 Message-ID: <5941F446C088714A85408FA3132CFCBB0106D572@SHSMSX105.ccr.corp.intel.com> References: <1567392847-445709-1-git-send-email-andy.pei@intel.com> <1567500378-89175-1-git-send-email-andy.pei@intel.com> <20190903133152.GA19294@intel.com> In-Reply-To: <20190903133152.GA19294@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v4] net/ipn3ke: setup MTU when HW init X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Xiaolong OK. I will do that in v5. -----Original Message----- From: Ye, Xiaolong=20 Sent: Tuesday, September 3, 2019 9:32 PM To: Pei, Andy Cc: dev@dpdk.org; Zhang, Qi Z ; Yigit, Ferruh ; Xu, Rosen Subject: Re: [PATCH v4] net/ipn3ke: setup MTU when HW init On 09/03, Andy Pei wrote: >set up mtu to the minimun in tx mtu, rx mtu and IPN3KE_MAC_FRAME_SIZE_MAX. > >Signed-off-by: Andy Pei >--- > >Cc: qi.z.zhang@intel.com >Cc: ferruh.yigit@intel.com >Cc: rosen.xu@intel.com >Cc: xiaolong.ye@intel.com > >v2: >modify low bound and upper bound. > >v3: >delete unnecessary MACROs. >extract the duplicated code to a common function. > >v4: >delete unnecessary MACROs. >extract the duplicated code to a common function. > > drivers/net/ipn3ke/ipn3ke_ethdev.c | 87=20 > ++++++++++++++++++++++++++++++++++++++ > drivers/net/ipn3ke/ipn3ke_ethdev.h | 6 +++ > 2 files changed, 93 insertions(+) > >diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c=20 >b/drivers/net/ipn3ke/ipn3ke_ethdev.c >index c226d63..e619ba3 100644 >--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c >+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c >@@ -209,6 +209,90 @@ > return 0; > } >=20 >+static uint32_t >+ipn3ke_mtu_cal(uint32_t tx, uint32_t rx) { >+ uint32_t tmp; >+ tmp =3D RTE_MIN(tx, rx); >+ tmp =3D RTE_MAX(tmp, (uint32_t)RTE_ETHER_MIN_MTU); >+ tmp =3D RTE_MIN(tmp, (uint32_t)(IPN3KE_MAC_FRAME_SIZE_MAX - >+ IPN3KE_ETH_OVERHEAD)); >+ return tmp; >+} >+ >+static void >+ipn3ke_mtu_set >+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel,=20 >+uint32_t txaddr, uint32_t rxaddr) It's quite rare to start the arguments in a separate line, better to follow= the common convention like static void rte_eth_dev_config_restore(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info, uint16_t port= _id) Thanks, Xiaolong >+{ >+ uint32_t tx; >+ uint32_t rx; >+ uint32_t tmp; >+ >+ if (!(*hw->f_mac_read) || !(*hw->f_mac_write)) >+ return; >+ >+ (*hw->f_mac_read)(hw, >+ &tx, >+ txaddr, >+ mac_num, >+ eth_group_sel); >+ >+ (*hw->f_mac_read)(hw, >+ &rx, >+ rxaddr, >+ mac_num, >+ eth_group_sel); >+ >+ tmp =3D ipn3ke_mtu_cal(tx, rx); >+ >+ (*hw->f_mac_write)(hw, >+ tmp, >+ txaddr, >+ mac_num, >+ eth_group_sel); >+ >+ (*hw->f_mac_write)(hw, >+ tmp, >+ rxaddr, >+ mac_num, >+ eth_group_sel); >+} >+ >+static void >+ipn3ke_10G_mtu_setup >+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel) { >+ ipn3ke_mtu_set(hw, mac_num, eth_group_sel, >+ IPN3KE_10G_TX_FRAME_MAXLENGTH, IPN3KE_10G_RX_FRAME_MAXLENGTH); } >+ >+static void >+ipn3ke_25G_mtu_setup >+(struct ipn3ke_hw *hw, uint32_t mac_num, uint32_t eth_group_sel) { >+ ipn3ke_mtu_set(hw, mac_num, eth_group_sel, >+ IPN3KE_25G_MAX_TX_SIZE_CONFIG, IPN3KE_25G_MAX_RX_SIZE_CONFIG); } >+ >+static void >+ipn3ke_mtu_setup(struct ipn3ke_hw *hw) { >+ int i; >+ if (hw->retimer.mac_type =3D=3D IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) = { >+ for (i =3D 0; i < hw->port_num; i++) { >+ ipn3ke_10G_mtu_setup(hw, i, 0); >+ ipn3ke_10G_mtu_setup(hw, i, 1); >+ } >+ } else if (hw->retimer.mac_type =3D=3D >+ IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) { >+ for (i =3D 0; i < hw->port_num; i++) { >+ ipn3ke_25G_mtu_setup(hw, i, 0); >+ ipn3ke_25G_mtu_setup(hw, i, 1); >+ } >+ } >+} >+ > static int > ipn3ke_hw_init(struct rte_afu_device *afu_dev, > struct ipn3ke_hw *hw) >@@ -303,6 +387,9 @@ > } > } >=20 >+ /* init mtu */ >+ ipn3ke_mtu_setup(hw); >+ > ret =3D rte_eth_switch_domain_alloc(&hw->switch_domain_id); > if (ret) > IPN3KE_AFU_PMD_WARN("failed to allocate switch domain for device=20 >%d", diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h=20 >b/drivers/net/ipn3ke/ipn3ke_ethdev.h >index c7b336b..fc45826 100644 >--- a/drivers/net/ipn3ke/ipn3ke_ethdev.h >+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h >@@ -654,6 +654,12 @@ static inline void _ipn3ke_indrct_write(struct=20 >ipn3ke_hw *hw, #define IPN3KE_MAC_RX_FRAME_MAXLENGTH_MASK \ > IPN3KE_MASK(0xFFFF, IPN3KE_MAC_RX_FRAME_MAXLENGTH_SHIFT) >=20 >+#define IPN3KE_25G_MAX_TX_SIZE_CONFIG 0x40= 7 >+#define IPN3KE_25G_MAX_RX_SIZE_CONFIG 0x50= 6 >+ >+#define IPN3KE_10G_TX_FRAME_MAXLENGTH 0x00= 2C >+#define IPN3KE_10G_RX_FRAME_MAXLENGTH 0x00= AE >+ > #define IPN3KE_REGISTER_WIDTH 32 >=20 > /*Bits[2:0]: Configuration of TX statistics counters: >-- >1.8.3.1 >