From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from bilemail1.empirix.com (bilemail1.empirix.com [208.67.76.245]) by dpdk.org (Postfix) with ESMTP id B5A778E88 for ; Mon, 12 Oct 2015 14:25:30 +0200 (CEST) Received: from BILEMAIL1.empirix.com (10.17.8.30) by bilemail1.empirix.com (10.17.8.30) with Microsoft SMTP Server (TLS) id 15.0.775.38; Mon, 12 Oct 2015 08:25:29 -0400 Received: from BILEMAIL1.empirix.com ([fe80::f9e0:9293:2523:f021]) by bilemail1.empirix.com ([fe80::f9e0:9293:2523:f021%22]) with mapi id 15.00.0775.031; Mon, 12 Oct 2015 08:25:29 -0400 From: "Montorsi, Francesco" To: "Mcnamara, John" , "Lu, Wenzhuo" , "dev@dpdk.org" Thread-Topic: Accurate timestamps in received packets Thread-Index: AdECoeRGBbnp2n4lTluzoJeGQ8/KtgAdUWggAGtJMGAAAPEEQAAIDFgw Date: Mon, 12 Oct 2015 12:25:28 +0000 Message-ID: <5b03ff2e2449490981c6106d606745be@bilemail1.empirix.com> References: <825e846fd8934cc0b34293a8a1542bd2@bilemail1.empirix.com> <6A0DE07E22DDAD4C9103DF62FEBC09090209D3D5@shsmsx102.ccr.corp.intel.com> <0dfde10b3f384fdb82358031522649b7@bilemail1.empirix.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.12.50.106] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] Accurate timestamps in received packets X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 12 Oct 2015 12:25:31 -0000 Hi John,=20 Thanks for your reply. > -----Original Message----- > From: Mcnamara, John [mailto:john.mcnamara@intel.com] > AFAIK, timestamping of every packet isn't supported by ixgbe/i40e nics an= d I > don't know about non-Intel nics. It was supported for some(?) igb nics an= d > hence the patch you linked to. Also, there isn't any DPDK API to > enable/disable it even if it is supported by the nic. What a pity, that's a bad news for me.=20 Another question in case you know: AFAIUI ixgbe/i40e devices receive packet= s in burst/sequences. What's the timeout for flushing the receive queue? In other words, if I send a single packet to the PHY of the NIC, after how = much time will the Intel network controller will stop waiting for further p= ackets (to put in the same "burst") and send that single packet to the CPU? Thanks, Francesco