From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f66.google.com (mail-wm0-f66.google.com [74.125.82.66]) by dpdk.org (Postfix) with ESMTP id 01B921BA55 for ; Thu, 26 Oct 2017 00:39:18 +0200 (CEST) Received: by mail-wm0-f66.google.com with SMTP id p75so4549067wmg.3 for ; Wed, 25 Oct 2017 15:39:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=LYkZdlG7BY1TNBX/OebAwrgVqrbB6IgQsN6TotHu3vI=; b=PR/mgCEGETtdOqJcBmIQ7hWMTCzKcLibEgxMLL1Uf01XodDiMEEP3Zyp6lVxNKp6oN AgpO24mC1SSsw91HZkBZozmPniz51tak2Kmv/+dBHKNdwtQvcKqvePqX6S7XKAz6nl7D uQWCwgav5upsHPUV2st1pvCCCPtYI962Ey9PFXEwKxMsdepekP+rmVMFLQTfjUuk5ihY KEVLlE9211NBrRFMmEPV1wa9GYNKGk9PJPBe9jh8H320WTlDaYB5Y/ruYT7bxi3fuVfj /dg+JAGdlzDAk3jGwKASqR1IfMv1DI0DBID71E/jqP7J21F2ccKKYAMAt2HxWEMROP81 ThGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=LYkZdlG7BY1TNBX/OebAwrgVqrbB6IgQsN6TotHu3vI=; b=trWa7Jlmy/TJ3BixfaAO/HzwRD0wknwaSQfNcAycMEaypKTsAhNq6mGWOQ5LyH7Tpi NkU/D7lqCbWEvftr+NYWf/Z70KpKgrvQv7l/TyZrDC9+uy2BjK2XwFhZ7ZWAGS9/uVDO I8wCl2Wo8pzhw51mcnnC8aHiWnNKlZwwLbU5VZst9Rpwy/CrGfA31B8tcGEyXoZ5V88z fITOTffdy0Vj8vc+f7Tp2JumW6PqDcFDaVxhiJA6iIqwxY9UDHzqZuE8caD5KvXDc71k nMxcN8+TVcWVTpwt2C3Hg0/0VdGwvaH++TKTJYx1dgebdWRbZplmkHkktmiQW1WCJrnV liCw== X-Gm-Message-State: AMCzsaViH0Lt/F692E7Bqxvy9oC2YMfkVg/kF9W95NsbkHWy5b9qHS7p EdjhPQKiNUL1ngDglMTlKjLWXtRI X-Google-Smtp-Source: ABhQp+Rrh/Liy7j9I3S6XttfO7vGXzIKuOjY68nsLpFXSlooMNfrFPjP7dYm4GaTNyX9kWcJsFrC7w== X-Received: by 10.28.5.148 with SMTP id 142mr3106854wmf.142.1508971157324; Wed, 25 Oct 2017 15:39:17 -0700 (PDT) Received: from bidouze.dev.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id r63sm4466124wmg.13.2017.10.25.15.39.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 25 Oct 2017 15:39:16 -0700 (PDT) From: Gaetan Rivet To: dev@dpdk.org Cc: Gaetan Rivet Date: Thu, 26 Oct 2017 00:38:28 +0200 Message-Id: <5b52f10368b16a45c42ea9fa554cacc0a40c935c.1508970254.git.gaetan.rivet@6wind.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH v7 06/25] eal: expose internal config elements X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Oct 2017 22:39:18 -0000 Some internal configuration elements set by the user on the command line are necessary outside the EAL, when the PCI bus is detached. Expose: + rte_eal_create_uio_dev + rte_eal_has_pci + rte_eal_vfio_intr_mode Signed-off-by: Gaetan Rivet --- lib/librte_eal/bsdapp/eal/eal.c | 16 ++++++++++++++++ lib/librte_eal/common/include/rte_eal.h | 28 ++++++++++++++++++++++++++++ lib/librte_eal/linuxapp/eal/eal.c | 16 ++++++++++++++++ lib/librte_eal/rte_eal_version.map | 3 +++ 4 files changed, 63 insertions(+) diff --git a/lib/librte_eal/bsdapp/eal/eal.c b/lib/librte_eal/bsdapp/eal/eal.c index e981721..d54a280 100644 --- a/lib/librte_eal/bsdapp/eal/eal.c +++ b/lib/librte_eal/bsdapp/eal/eal.c @@ -723,3 +723,19 @@ rte_eal_process_type(void) { return rte_config.process_type; } + +int rte_eal_has_pci(void) +{ + return !internal_config.no_pci; +} + +int rte_eal_create_uio_dev(void) +{ + return internal_config.create_uio_dev; +} + +enum rte_intr_mode +rte_eal_vfio_intr_mode(void) +{ + return RTE_INTR_MODE_NONE; +} diff --git a/lib/librte_eal/common/include/rte_eal.h b/lib/librte_eal/common/include/rte_eal.h index 4ea2ff4..cc2636c 100644 --- a/lib/librte_eal/common/include/rte_eal.h +++ b/lib/librte_eal/common/include/rte_eal.h @@ -47,6 +47,8 @@ #include #include +#include + #ifdef __cplusplus extern "C" { #endif @@ -268,6 +270,32 @@ rte_set_application_usage_hook(rte_usage_hook_t usage_func); int rte_eal_has_hugepages(void); /** + * Whether EAL is using PCI bus. + * Disabled by --no-pci option. + * + * @return + * Nonzero if the PCI bus is enabled. + */ +int rte_eal_has_pci(void); + +/** + * Whether the EAL was asked to create UIO device. + * + * @return + * Nonzero if true. + */ +int rte_eal_create_uio_dev(void); + +/** + * The user-configured vfio interrupt mode. + * + * @return + * Interrupt mode configured with the command line, + * RTE_INTR_MODE_NONE by default. + */ +enum rte_intr_mode rte_eal_vfio_intr_mode(void); + +/** * A wrap API for syscall gettid. * * @return diff --git a/lib/librte_eal/linuxapp/eal/eal.c b/lib/librte_eal/linuxapp/eal/eal.c index 02381d0..18a07b0 100644 --- a/lib/librte_eal/linuxapp/eal/eal.c +++ b/lib/librte_eal/linuxapp/eal/eal.c @@ -989,6 +989,22 @@ int rte_eal_has_hugepages(void) return ! internal_config.no_hugetlbfs; } +int rte_eal_has_pci(void) +{ + return !internal_config.no_pci; +} + +int rte_eal_create_uio_dev(void) +{ + return internal_config.create_uio_dev; +} + +enum rte_intr_mode +rte_eal_vfio_intr_mode(void) +{ + return internal_config.vfio_intr_mode; +} + int rte_eal_check_module(const char *module_name) { diff --git a/lib/librte_eal/rte_eal_version.map b/lib/librte_eal/rte_eal_version.map index bcc594d..9f06d23 100644 --- a/lib/librte_eal/rte_eal_version.map +++ b/lib/librte_eal/rte_eal_version.map @@ -241,10 +241,13 @@ EXPERIMENTAL { DPDK_17.11 { global: + rte_eal_create_uio_dev; rte_bus_get_iommu_class; + rte_eal_has_pci; rte_eal_iova_mode; rte_eal_mbuf_default_mempool_ops; rte_eal_using_phys_addrs; + rte_eal_vfio_intr_mode; rte_lcore_has_role; rte_memcpy_ptr; rte_pci_get_iommu_class; -- 2.1.4