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To: Ruifeng Wang <Ruifeng.Wang@arm.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: "thomas@monjalon.net" <thomas@monjalon.net>,
"jerinj@marvell.com" <jerinj@marvell.com>,
Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>,
=?UTF-8?Q?Juraj_Linke=c5=a1?= <juraj.linkes@pantheon.tech>, nd <nd@arm.com>
References: <20210525082402.8051-1-thierry.herbelot@6wind.com>
<876d348bb6ab493f404c2c1f288262ff3112cada.1623917721.git.thierry.herbelot@6wind.com>
<AM5PR0802MB2465D72ED4838AB96320055D9E0E9@AM5PR0802MB2465.eurprd08.prod.outlook.com>
From: Thierry Herbelot <thierry.herbelot@6wind.com>
Message-ID: <60bf1e0d-5b39-1f7f-c75b-c2d4b0b45107@6wind.com>
Date: Thu, 17 Jun 2021 13:24:54 +0200
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Subject: Re: [dpdk-dev] [PATCH V3] config/arm: add Qualcomm Centriq 2400
part number
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On 6/17/21 12:03 PM, Ruifeng Wang wrote:
>> -----Original Message-----
>> From: Thierry Herbelot <thierry.herbelot@6wind.com>
>> Sent: Thursday, June 17, 2021 4:16 PM
>> To: dev@dpdk.org
>> Cc: Thierry Herbelot <thierry.herbelot@6wind.com>; thomas@monjalon.net;
>> jerinj@marvell.com; Ruifeng Wang <Ruifeng.Wang@arm.com>; Honnappa
>> Nagarahalli <Honnappa.Nagarahalli@arm.com>; Juraj Linkeš
>> <juraj.linkes@pantheon.tech>
>> Subject: [PATCH V3] config/arm: add Qualcomm Centriq 2400 part number
>>
>> 0xc00 is for "SoC 2.0" Qualcomm Centriq servers.
>> 0x800 is for "SoC 1.1".
>>
>> Cc: Jerin Jacob <jerinj@marvell.com>
>> Cc: Ruifeng Wang <ruifeng.wang@arm.com>
>> Cc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
>> Cc: Juraj Linkeš <juraj.linkes@pantheon.tech>
>>
>> Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
>> --
>> V2: add maintainers as Cc
>> V3: fix meson syntax for the SoC v1.1 machine description
>> ---
>> config/arm/meson.build | 12 ++++++++++--
>> 1 file changed, 10 insertions(+), 2 deletions(-)
>>
>> diff --git a/config/arm/meson.build b/config/arm/meson.build index
>> e83a56e0d589..b33303d09023 100644
>> --- a/config/arm/meson.build
>> +++ b/config/arm/meson.build
>> @@ -179,7 +179,8 @@ implementer_qualcomm = {
>> ['RTE_MAX_NUMA_NODES', 1]
>> ],
>> 'part_number_config': {
>> - '0xc00': {'machine_args': ['-march=armv8-a+crc']}
>> + '0x800': {'machine_args': ['-march=armv8-a+crc']},
>> + '0xc00': {'machine_args': ['-march=armv8-a+crc']},
>> }
>> }
>>
>> @@ -223,8 +224,15 @@ soc_bluefield = {
>> 'numa': false
>> }
>>
>> +soc_centriq2400_v1_1 = {
>> + 'description': 'Qualcomm Centriq 2400 (SoC v1.1)',
>> + 'implementer': '0x51',
>> + 'part_number': '0x800',
>> + 'numa': false
>> +}
>> +
> What is the difference between SoC v1.1 and SoC v2.0. Do they have different instruction levels or extensions?
> They have the same machine_args. I think the two part numbers can share the same soc_xx. Because cross built binary can run on both SoCs.
> What do you think?
Hello,
There is no visible differences between the two versions.
How do we merge the soc_centriq2400 configurations ?
It would seem it is only possible to have one part_number per soc
configuration.
Thierry
>
> Thanks.
>> soc_centriq2400 = {
>> - 'description': 'Qualcomm Centriq 2400',
>> + 'description': 'Qualcomm Centriq 2400 (SoC v2.0)',
>> 'implementer': '0x51',
>> 'part_number': '0xc00',
>> 'numa': false
>> --
>> 2.29.2
>
--
Thierry Herbelot
Senior Software Engineer
Tel: +33 1 39 30 92 61
http://www.6wind.com/
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