From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2359B42369; Thu, 12 Oct 2023 01:43:51 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id ABB4F402BB; Thu, 12 Oct 2023 01:43:50 +0200 (CEST) Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by mails.dpdk.org (Postfix) with ESMTP id 9CAAD402BA for ; Thu, 12 Oct 2023 01:43:48 +0200 (CEST) Received: from compute7.internal (compute7.nyi.internal [10.202.2.48]) by mailout.nyi.internal (Postfix) with ESMTP id 3605C5C0367; Wed, 11 Oct 2023 19:43:48 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute7.internal (MEProxy); Wed, 11 Oct 2023 19:43:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to; s=fm2; t= 1697067828; x=1697154228; bh=q0YHz/VJyN+FPQqe81y/lU+vh9AzUXzsDwm lzxhHZ8o=; b=A0AAl5cKFBsiv7YmhctJNHUNkXQu77q1DFoJmfDJnz8gZpW7LWz XqsUxAfWiCfzRz1s+70D+YmFJnto8FJLOwxHQtll4Mj+o8UdySRBdVbVNquRyjZI xUDPdrVRXKv7bFWFl7WE3/7c8oqngJHm7mWyOTSViL0Da32h3FGIOKbEmRFchfiW PRYxpF0xhFwiJWf1mvSONXx3UW78b06Cft9EnnrieR6cP0xmlwvGit/DTvc2+nCA jOvNSKG/LeWJgw1rKj5M6AeAYNl8I7WWdoIT1t1u3BUbcNfWUGHbTn472KVxyUAD y+NS+9O+s/4VHBy56gxaI8l0uqYcBmqUhZQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t= 1697067828; x=1697154228; bh=q0YHz/VJyN+FPQqe81y/lU+vh9AzUXzsDwm lzxhHZ8o=; b=Z3fjav7XW+lKUq4jpgKYPVuJTEYt2PD/TI4JfE+bBED0CPOMb6D P2EhOwLsbo84BxfXUiutI8Og7lziC258/ILDzjfaibIstpm0YwsDDKMad+4eGUgL gd21daJoVer1B4TMYdRjUv6B8arTIrkqTU7fCjcBMF0EmKWOeuCEm9gmJpGh1M4n igENj6DJ2oqccVXoq6I3nNrTbPuon3UE1/4S6SUhJTZ0/GxT35H6RXR5QOnjhZRF nXpMx15W5abG8/VacCjW1ZRLP3yOftw2gHIvtB0vKHTNNBcoVVnmYg61zoTgVB2v m6beoWwfJkoqoc7BViJvkPvWT2EquliPSmw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvkedrheelgddvfecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvfevufffkfgjfhgggfgtsehtqhertddttddunecuhfhrohhmpefvhhhomhgr shcuofhonhhjrghlohhnuceothhhohhmrghssehmohhnjhgrlhhonhdrnhgvtheqnecugg ftrfgrthhtvghrnhepfefhjeeluedvvedtuddtuedtvefhieejtefhffeujefhteduudev tdektdeikeffnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepthhhohhmrghssehmohhnjhgrlhhonhdrnhgvth X-ME-Proxy: Feedback-ID: i47234305:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 11 Oct 2023 19:43:46 -0400 (EDT) From: Thomas Monjalon To: Morten =?ISO-8859-1?Q?Br=F8rup?= Cc: david.marchand@redhat.com, honnappa.nagarahalli@arm.com, konstantin.v.ananyev@yandex.ru, bruce.richardson@intel.com, mattias.ronnblom@ericsson.com, dev@dpdk.org, olivier.matz@6wind.com, andrew.rybchenko@oktetlabs.ru, dev@dpdk.org Subject: Re: [PATCH] clarify purpose of empty cache lines Date: Thu, 12 Oct 2023 01:43:44 +0200 Message-ID: <6554142.G0QQBjFxQf@thomas> In-Reply-To: <20230904084349.12044-1-mb@smartsharesystems.com> References: <20230904084349.12044-1-mb@smartsharesystems.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="iso-8859-1" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 04/09/2023 10:43, Morten Br=F8rup: > /** Force minimum cache line alignment. */ > #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE) > =20 > +#define _RTE_CACHE_GUARD_HELPER2(unique) \ > + char cache_guard_ ## unique[RTE_CACHE_LINE_SIZE * RTE_CACHE_GUARD_LINE= S] \ > + __rte_cache_aligned > +#define _RTE_CACHE_GUARD_HELPER1(unique) _RTE_CACHE_GUARD_HELPER2(unique) What is the reason for this intermediate helper macro? > +/** > + * Empty cache lines, to guard against false sharing-like effects > + * on systems with a next-N-lines hardware prefetcher. > + * > + * Use as spacing between data accessed by different lcores, > + * to prevent cache thrashing on hardware with speculative prefetching. > + */ > +#define RTE_CACHE_GUARD _RTE_CACHE_GUARD_HELPER1(__COUNTER__)