From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BA2D6A0613 for ; Sat, 28 Sep 2019 03:39:29 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C216E2C08; Sat, 28 Sep 2019 03:39:27 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 730BC1041 for ; Sat, 28 Sep 2019 03:39:26 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Sep 2019 18:39:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,557,1559545200"; d="scan'208";a="193471388" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga003.jf.intel.com with ESMTP; 27 Sep 2019 18:39:25 -0700 Received: from fmsmsx116.amr.corp.intel.com (10.18.116.20) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 27 Sep 2019 18:39:24 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx116.amr.corp.intel.com (10.18.116.20) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 27 Sep 2019 18:39:24 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.32]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.132]) with mapi id 14.03.0439.000; Sat, 28 Sep 2019 09:39:22 +0800 From: "Su, Simei" To: "Zhang, Qi Z" , "Wu, Jingjing" , "Ye, Xiaolong" CC: "dev@dpdk.org" Thread-Topic: [PATCH v4 2/3] ethdev: extend RSS offload types Thread-Index: AQHVdREsQabHPd7ng0Of4fA7twyJI6c/wOIAgACPxqA= Date: Sat, 28 Sep 2019 01:39:22 +0000 Message-ID: <65F28F834D25B54B9EC1999B623071B30C44B656@SHSMSX104.ccr.corp.intel.com> References: <1569420404-163301-1-git-send-email-simei.su@intel.com> <1569574449-47991-1-git-send-email-simei.su@intel.com> <1569574449-47991-3-git-send-email-simei.su@intel.com> <039ED4275CED7440929022BC67E7061153D9F306@SHSMSX105.ccr.corp.intel.com> In-Reply-To: <039ED4275CED7440929022BC67E7061153D9F306@SHSMSX105.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMTBlMDUyN2EtZjgwMi00NzY3LTgzZWQtOTQwNjUyYjlhOGIwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoicXhlVmE1YXVcL0p5cFIxcTRTSkJmQkkxUGQ3NWdqQStkb0xVamJuSkZNUXhid0t1RnFWRHAxYXBNZ3RxK3dqWHMifQ== x-ctpclassification: CTP_NT x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v4 2/3] ethdev: extend RSS offload types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, Zhangqi > -----Original Message----- > From: Zhang, Qi Z > Sent: Saturday, September 28, 2019 9:04 AM > To: Su, Simei ; Wu, Jingjing ;= Ye, > Xiaolong > Cc: dev@dpdk.org > Subject: RE: [PATCH v4 2/3] ethdev: extend RSS offload types >=20 >=20 >=20 > > -----Original Message----- > > From: Su, Simei > > Sent: Friday, September 27, 2019 4:54 PM > > To: Zhang, Qi Z ; Wu, Jingjing > > ; Ye, Xiaolong > > Cc: dev@dpdk.org; Su, Simei > > Subject: [PATCH v4 2/3] ethdev: extend RSS offload types > > > > This patch reserves several bits as input set selection from the high > > end of the > > 64 bits. It is combined with exisiting ETH_RSS_* to represent rss types= . > > > > for example: > > ETH_RSS_IPV4 | ETH_RSS_L3_SRC_ONLY: hash on src ip address only > > ETH_RSS_IPV4_UDP | ETH_RSS_L4_DST_ONLY: hash on src/dst IP and > > dst UDP port > > > > Signed-off-by: Simei Su > > --- > > lib/librte_ethdev/rte_ethdev.h | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/lib/librte_ethdev/rte_ethdev.h > > b/lib/librte_ethdev/rte_ethdev.h index 1605467..106b67f 100644 > > --- a/lib/librte_ethdev/rte_ethdev.h > > +++ b/lib/librte_ethdev/rte_ethdev.h > > @@ -505,6 +505,19 @@ struct rte_eth_rss_conf { > > #define ETH_RSS_GENEVE (1ULL << 20) > > #define ETH_RSS_NVGRE (1ULL << 21) > > > > +/* > > + * We use the following macros to combine with above ETH_RSS_* for > > + * more specific input set selection. These bits are defined starting > > + * from the high end of the 64 bits. > > + * Note: If we use above ETH_RSS_* without SRC/DST_ONLY, it > > +represents > > + * both SRC and DST are taken into account. SRC_ONLY and DST_ONLY > > +can't >=20 > To be more accurate, should be SRC_ONLY and DST_ONLY of the same level ca= n't > be used simultaneously. Ok, I will modify it in v5. Thanks. >=20 > > + * be used simultaneously. > > + */ > > +#define ETH_RSS_L3_SRC_ONLY (1ULL << 63) > > +#define ETH_RSS_L3_DST_ONLY (1ULL << 62) > > +#define ETH_RSS_L4_SRC_ONLY (1ULL << 61) > > +#define ETH_RSS_L4_DST_ONLY (1ULL << 60) > > + > > #define ETH_RSS_IP ( \ > > ETH_RSS_IPV4 | \ > > ETH_RSS_FRAG_IPV4 | \ > > -- > > 1.8.3.1